2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief emit assembler for a backend graph
40 #include "raw_bitset.h"
43 #include "../besched.h"
44 #include "../beblocksched.h"
46 #include "../begnuas.h"
47 #include "../be_dbgout.h"
48 #include "../benode.h"
50 #include "sparc_emitter.h"
51 #include "gen_sparc_emitter.h"
52 #include "sparc_nodes_attr.h"
53 #include "sparc_new_nodes.h"
54 #include "gen_sparc_regalloc_if.h"
57 #define SNPRINTF_BUF_LEN 128
58 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
61 * attribute of SAVE node which follows immediatelly after the START node
62 * we need this to correct all offsets since SPARC expects
63 * some reserved stack space after the stackpointer
65 const sparc_save_attr_t *save_attr;
68 * Returns the register at in position pos.
70 static const arch_register_t *get_in_reg(const ir_node *node, int pos)
73 const arch_register_t *reg = NULL;
75 assert(get_irn_arity(node) > pos && "Invalid IN position");
77 /* The out register of the operator at position pos is the
78 in register we need. */
79 op = get_irn_n(node, pos);
81 reg = arch_get_irn_register(op);
83 assert(reg && "no in register found");
88 * Returns the register at out position pos.
90 static const arch_register_t *get_out_reg(const ir_node *node, int pos)
93 const arch_register_t *reg = NULL;
95 /* 1st case: irn is not of mode_T, so it has only */
96 /* one OUT register -> good */
97 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
98 /* Proj with the corresponding projnum for the register */
100 if (get_irn_mode(node) != mode_T) {
101 reg = arch_get_irn_register(node);
102 } else if (is_sparc_irn(node)) {
103 reg = arch_irn_get_register(node, pos);
105 const ir_edge_t *edge;
107 foreach_out_edge(node, edge) {
108 proj = get_edge_src_irn(edge);
109 assert(is_Proj(proj) && "non-Proj from mode_T node");
110 if (get_Proj_proj(proj) == pos) {
111 reg = arch_get_irn_register(proj);
117 assert(reg && "no out register found");
121 void sparc_emit_immediate(const ir_node *node)
123 int const val = get_sparc_attr_const(node)->immediate_value;
124 assert(-4096 <= val && val < 4096);
125 be_emit_irprintf("%d", val);
128 void sparc_emit_source_register(const ir_node *node, int pos)
130 const arch_register_t *reg = get_in_reg(node, pos);
132 be_emit_string(arch_register_get_name(reg));
135 void sparc_emit_dest_register(const ir_node *node, int pos)
137 const arch_register_t *reg = get_out_reg(node, pos);
139 be_emit_string(arch_register_get_name(reg));
143 * Emits either a imm or register depending on arity of node
145 * @param register no (-1 if no register)
147 void sparc_emit_reg_or_imm(const ir_node *node, int pos)
149 if (get_irn_arity(node) > pos) {
151 sparc_emit_source_register(node, pos);
153 // we have a imm input
154 sparc_emit_immediate(node);
161 void sparc_emit_offset(const ir_node *node)
163 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
164 assert(attr->base.is_load_store);
166 if (attr->offset != 0) {
167 be_emit_irprintf("%+ld", attr->offset);
173 * Emit load mode char
175 void sparc_emit_load_mode(const ir_node *node)
177 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
178 ir_mode *mode = attr->load_store_mode;
179 int bits = get_mode_size_bits(mode);
180 bool is_signed = mode_is_signed(mode);
183 be_emit_string(is_signed ? "sh" : "uh");
184 } else if (bits == 8) {
185 be_emit_string(is_signed ? "sb" : "ub");
186 } else if (bits == 64) {
194 * Emit store mode char
196 void sparc_emit_store_mode(const ir_node *node)
198 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
199 ir_mode *mode = attr->load_store_mode;
200 int bits = get_mode_size_bits(mode);
204 } else if (bits == 8) {
206 } else if (bits == 64) {
214 * emit integer signed/unsigned prefix char
216 void sparc_emit_mode_sign_prefix(const ir_node *node)
218 ir_mode *mode = get_irn_mode(node);
219 bool is_signed = mode_is_signed(mode);
220 be_emit_string(is_signed ? "s" : "u");
224 * emit FP load mode char
226 void sparc_emit_fp_load_mode(const ir_node *node)
228 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
229 ir_mode *mode = attr->load_store_mode;
230 int bits = get_mode_size_bits(mode);
232 assert(mode_is_float(mode));
236 } else if (bits == 64) {
237 be_emit_string("df");
239 panic("FP load mode > 64bits not implemented yet");
244 * emit FP store mode char
246 void sparc_emit_fp_store_mode(const ir_node *node)
248 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
249 ir_mode *mode = attr->load_store_mode;
250 int bits = get_mode_size_bits(mode);
252 assert(mode_is_float(mode));
256 } else if (bits == 64) {
257 be_emit_string("df");
259 panic("FP store mode > 64bits not implemented yet");
264 * emits the FP mode suffix char
266 void sparc_emit_fp_mode_suffix(const ir_node *node)
268 ir_mode *mode = get_irn_mode(node);
269 int bits = get_mode_size_bits(mode);
271 assert(mode_is_float(mode));
275 } else if (bits == 64) {
278 panic("FP mode > 64bits not implemented yet");
283 * Returns the target label for a control flow node.
285 static void sparc_emit_cfop_target(const ir_node *node)
287 ir_node *block = get_irn_link(node);
288 be_gas_emit_block_name(block);
294 static void sparc_emit_entity(ir_entity *entity)
296 be_gas_emit_entity(entity);
300 * Emits code for stack space management
302 static void emit_be_IncSP(const ir_node *irn)
304 int offs = -be_get_IncSP_offset(irn);
309 /* SPARC stack grows downwards */
311 be_emit_cstring("\tsub ");
314 be_emit_cstring("\tadd ");
317 sparc_emit_source_register(irn, 0);
318 be_emit_irprintf(", %d", offs);
319 be_emit_cstring(", ");
320 sparc_emit_dest_register(irn, 0);
321 be_emit_finish_line_gas(irn);
325 * emits code for save instruction with min. required stack space
327 static void emit_sparc_Save(const ir_node *irn)
329 save_attr = get_sparc_save_attr_const(irn);
330 be_emit_cstring("\tsave ");
331 sparc_emit_source_register(irn, 0);
332 be_emit_irprintf(", %d, ", -save_attr->initial_stacksize);
333 sparc_emit_dest_register(irn, 0);
334 be_emit_finish_line_gas(irn);
338 * emits code to load hi 22 bit of a constant
340 static void emit_sparc_HiImm(const ir_node *irn)
342 const sparc_attr_t *attr = get_sparc_attr_const(irn);
343 be_emit_cstring("\tsethi ");
344 be_emit_irprintf("%%hi(%d), ", attr->immediate_value);
345 sparc_emit_dest_register(irn, 0);
346 be_emit_finish_line_gas(irn);
350 * emits code to load lo 10bits of a constant
352 static void emit_sparc_LoImm(const ir_node *irn)
354 const sparc_attr_t *attr = get_sparc_attr_const(irn);
355 be_emit_cstring("\tor ");
356 sparc_emit_source_register(irn, 0);
357 be_emit_irprintf(", %%lo(%d), ", attr->immediate_value);
358 sparc_emit_dest_register(irn, 0);
359 be_emit_finish_line_gas(irn);
363 * emit code for div with the correct sign prefix
365 static void emit_sparc_Div(const ir_node *irn)
367 be_emit_cstring("\t");
368 sparc_emit_mode_sign_prefix(irn);
369 be_emit_cstring("div ");
371 sparc_emit_source_register(irn, 0);
372 be_emit_cstring(", ");
373 sparc_emit_reg_or_imm(irn, 1);
374 be_emit_cstring(", ");
375 sparc_emit_dest_register(irn, 0);
376 be_emit_finish_line_gas(irn);
380 * emit code for mul with the correct sign prefix
382 static void emit_sparc_Mul(const ir_node *irn)
384 be_emit_cstring("\t");
385 sparc_emit_mode_sign_prefix(irn);
386 be_emit_cstring("mul ");
388 sparc_emit_source_register(irn, 0);
389 be_emit_cstring(", ");
390 sparc_emit_reg_or_imm(irn, 1);
391 be_emit_cstring(", ");
392 sparc_emit_dest_register(irn, 0);
393 be_emit_finish_line_gas(irn);
397 * emits code for mulh
399 static void emit_sparc_Mulh(const ir_node *irn)
401 be_emit_cstring("\t");
402 sparc_emit_mode_sign_prefix(irn);
403 be_emit_cstring("mul ");
405 sparc_emit_source_register(irn, 0);
406 be_emit_cstring(", ");
407 sparc_emit_reg_or_imm(irn, 1);
408 be_emit_cstring(", ");
409 sparc_emit_dest_register(irn, 0);
410 be_emit_finish_line_gas(irn);
412 // our result is in the y register now
413 // we just copy it to the assigned target reg
414 be_emit_cstring("\tmov ");
416 be_emit_string(arch_register_get_name(&sparc_flags_regs[REG_Y]));
417 be_emit_cstring(", ");
418 sparc_emit_dest_register(irn, 0);
419 be_emit_finish_line_gas(irn);
423 * Emits code for return node
425 static void emit_be_Return(const ir_node *irn)
427 be_emit_cstring("\tret");
428 //be_emit_cstring("\tjmp %i7+8");
429 be_emit_finish_line_gas(irn);
430 be_emit_cstring("\trestore");
431 be_emit_finish_line_gas(irn);
435 * Emits code for Call node
437 static void emit_be_Call(const ir_node *irn)
439 ir_entity *entity = be_Call_get_entity(irn);
441 if (entity != NULL) {
442 be_emit_cstring("\tcall ");
443 sparc_emit_entity(entity);
444 be_emit_cstring(", 0");
445 be_emit_finish_line_gas(irn);
446 be_emit_cstring("\tnop");
447 be_emit_pad_comment();
448 be_emit_cstring("/* TODO: use delay slot */\n");
450 be_emit_cstring("\tnop\n");
451 be_emit_pad_comment();
452 be_emit_cstring("/* TODO: Entity == NULL */\n");
453 be_emit_finish_line_gas(irn);
458 * Emit code for Perm node
460 static void emit_be_Perm(const ir_node *irn)
462 be_emit_cstring("\txor ");
463 sparc_emit_source_register(irn, 1);
464 be_emit_cstring(", ");
465 sparc_emit_source_register(irn, 0);
466 be_emit_cstring(", ");
467 sparc_emit_source_register(irn, 0);
468 be_emit_finish_line_gas(NULL);
470 be_emit_cstring("\txor ");
471 sparc_emit_source_register(irn, 1);
472 be_emit_cstring(", ");
473 sparc_emit_source_register(irn, 0);
474 be_emit_cstring(", ");
475 sparc_emit_source_register(irn, 1);
476 be_emit_finish_line_gas(NULL);
478 be_emit_cstring("\txor ");
479 sparc_emit_source_register(irn, 1);
480 be_emit_cstring(", ");
481 sparc_emit_source_register(irn, 0);
482 be_emit_cstring(", ");
483 sparc_emit_source_register(irn, 0);
484 be_emit_finish_line_gas(irn);
488 * TODO: not really tested but seems to work with memperm_arity == 1
490 static void emit_be_MemPerm(const ir_node *node)
496 /* TODO: this implementation is slower than necessary.
497 The longterm goal is however to avoid the memperm node completely */
499 memperm_arity = be_get_MemPerm_entity_arity(node);
500 // we use our local registers - so this is limited to 8 inputs !
501 if (memperm_arity > 8)
502 panic("memperm with more than 8 inputs not supported yet");
504 for (i = 0; i < memperm_arity; ++i) {
506 ir_entity *entity = be_get_MemPerm_in_entity(node, i);
510 be_emit_irprintf("\tst %%l%d, [%%sp-%d]", i, sp_change);
511 be_emit_finish_line_gas(node);
513 /* load from entity */
514 offset = get_entity_offset(entity) + sp_change;
515 be_emit_irprintf("\tld [%%sp+%d], %%l%d", offset, i);
516 be_emit_finish_line_gas(node);
519 for (i = memperm_arity-1; i >= 0; --i) {
521 ir_entity *entity = be_get_MemPerm_out_entity(node, i);
523 /* store to new entity */
524 offset = get_entity_offset(entity) + sp_change;
525 be_emit_irprintf("\tst %%l%d, [%%sp+%d]", i, offset);
526 be_emit_finish_line_gas(node);
527 /* restore register */
528 be_emit_irprintf("\tld [%%sp-%d], %%l%d", sp_change, i);
530 be_emit_finish_line_gas(node);
532 assert(sp_change == 0);
538 static void emit_sparc_SymConst(const ir_node *irn)
540 const sparc_symconst_attr_t *attr = get_sparc_symconst_attr_const(irn);
542 //sethi %hi(const32),%reg
543 //or %reg,%lo(const32),%reg
545 be_emit_cstring("\tsethi %hi(");
546 be_gas_emit_entity(attr->entity);
547 be_emit_cstring("), ");
548 sparc_emit_dest_register(irn, 0);
549 be_emit_cstring("\n ");
551 // TODO: could be combined with the following load/store instruction
552 be_emit_cstring("\tor ");
553 sparc_emit_dest_register(irn, 0);
554 be_emit_cstring(", %lo(");
555 be_gas_emit_entity(attr->entity);
556 be_emit_cstring("), ");
557 sparc_emit_dest_register(irn, 0);
558 be_emit_finish_line_gas(irn);
562 * Emits code for FrameAddr fix
564 static void emit_sparc_FrameAddr(const ir_node *irn)
566 const sparc_symconst_attr_t *attr = get_irn_generic_attr_const(irn);
568 // no need to fix offset as we are adressing via the framepointer
569 if (attr->fp_offset >= 0) {
570 be_emit_cstring("\tadd ");
571 sparc_emit_source_register(irn, 0);
572 be_emit_cstring(", ");
573 be_emit_irprintf("%ld", attr->fp_offset + save_attr->initial_stacksize);
575 be_emit_cstring("\tsub ");
576 sparc_emit_source_register(irn, 0);
577 be_emit_cstring(", ");
578 be_emit_irprintf("%ld", -attr->fp_offset);
581 be_emit_cstring(", ");
582 sparc_emit_dest_register(irn, 0);
583 be_emit_finish_line_gas(irn);
588 * Emits code for Branch
590 static void emit_sparc_BXX(const ir_node *irn)
592 const ir_edge_t *edge;
593 const ir_node *proj_true = NULL;
594 const ir_node *proj_false = NULL;
595 const ir_node *block;
596 const ir_node *next_block;
597 ir_node *op1 = get_irn_n(irn, 0);
599 int proj_num = get_sparc_jmp_cond_proj_num(irn);
600 const sparc_cmp_attr_t *cmp_attr = get_irn_generic_attr_const(op1);
601 // bool is_signed = !cmp_attr->is_unsigned;
603 assert(is_sparc_Cmp(op1) || is_sparc_Tst(op1));
605 foreach_out_edge(irn, edge) {
606 ir_node *proj = get_edge_src_irn(edge);
607 long nr = get_Proj_proj(proj);
608 if (nr == pn_Cond_true) {
615 if (cmp_attr->ins_permuted) {
616 proj_num = get_mirrored_pnc(proj_num);
619 /* for now, the code works for scheduled and non-schedules blocks */
620 block = get_nodes_block(irn);
622 /* we have a block schedule */
623 next_block = get_irn_link(block);
625 assert(proj_num != pn_Cmp_False);
626 assert(proj_num != pn_Cmp_True);
628 if (get_irn_link(proj_true) == next_block) {
629 /* exchange both proj's so the second one can be omitted */
630 const ir_node *t = proj_true;
632 proj_true = proj_false;
634 proj_num = get_negated_pnc(proj_num, mode_Iu);
639 case pn_Cmp_Eq: suffix = "e"; break;
640 case pn_Cmp_Lt: suffix = "l"; break;
641 case pn_Cmp_Le: suffix = "le"; break;
642 case pn_Cmp_Gt: suffix = "g"; break;
643 case pn_Cmp_Ge: suffix = "ge"; break;
644 case pn_Cmp_Lg: suffix = "ne"; break;
645 case pn_Cmp_Leg: suffix = "a"; break;
646 default: panic("Cmp has unsupported pnc");
649 /* emit the true proj */
650 be_emit_irprintf("\tb%s ", suffix);
651 sparc_emit_cfop_target(proj_true);
652 be_emit_finish_line_gas(proj_true);
654 be_emit_cstring("\tnop");
655 be_emit_pad_comment();
656 be_emit_cstring("/* TODO: use delay slot */\n");
658 if (get_irn_link(proj_false) == next_block) {
659 be_emit_cstring("\t/* false-fallthrough to ");
660 sparc_emit_cfop_target(proj_false);
661 be_emit_cstring(" */");
662 be_emit_finish_line_gas(proj_false);
664 be_emit_cstring("\tba ");
665 sparc_emit_cfop_target(proj_false);
666 be_emit_finish_line_gas(proj_false);
667 be_emit_cstring("\tnop\t\t/* TODO: use delay slot */\n");
668 be_emit_finish_line_gas(proj_false);
673 * emit Jmp (which actually is a branch always (ba) instruction)
675 static void emit_sparc_Ba(const ir_node *node)
677 ir_node *block, *next_block;
679 /* for now, the code works for scheduled and non-schedules blocks */
680 block = get_nodes_block(node);
682 /* we have a block schedule */
683 next_block = get_irn_link(block);
684 if (get_irn_link(node) != next_block) {
685 be_emit_cstring("\tba ");
686 sparc_emit_cfop_target(node);
687 be_emit_finish_line_gas(node);
688 be_emit_cstring("\tnop\t\t/* TODO: use delay slot */\n");
690 be_emit_cstring("\t/* fallthrough to ");
691 sparc_emit_cfop_target(node);
692 be_emit_cstring(" */");
694 be_emit_finish_line_gas(node);
700 static void emit_be_Copy(const ir_node *irn)
702 ir_mode *mode = get_irn_mode(irn);
704 if (get_in_reg(irn, 0) == get_out_reg(irn, 0)) {
709 if (mode_is_float(mode)) {
710 panic("emit_be_Copy: move not supported for FP");
711 } else if (mode_is_data(mode)) {
712 be_emit_cstring("\tmov ");
713 sparc_emit_source_register(irn, 0);
714 be_emit_cstring(", ");
715 sparc_emit_dest_register(irn, 0);
716 be_emit_finish_line_gas(irn);
718 panic("emit_be_Copy: move not supported for this mode");
724 * dummy emitter for ignored nodes
726 static void emit_nothing(const ir_node *irn)
734 * type of emitter function
736 typedef void (*emit_func) (const ir_node *);
739 * Set a node emitter. Make it a bit more type safe.
741 static inline void set_emitter(ir_op *op, emit_func sparc_emit_node)
743 op->ops.generic = (op_func)sparc_emit_node;
747 * Enters the emitter functions for handled nodes into the generic
748 * pointer of an opcode.
750 static void sparc_register_emitters(void)
752 /* first clear the generic function pointer for all ops */
753 clear_irp_opcodes_generic_func();
754 /* register all emitter functions defined in spec */
755 sparc_register_spec_emitters();
758 set_emitter(op_be_Call, emit_be_Call);
759 set_emitter(op_be_Copy, emit_be_Copy);
760 set_emitter(op_be_CopyKeep, emit_be_Copy);
761 set_emitter(op_be_IncSP, emit_be_IncSP);
762 set_emitter(op_be_MemPerm, emit_be_MemPerm);
763 set_emitter(op_be_Perm, emit_be_Perm);
764 set_emitter(op_be_Return, emit_be_Return);
765 set_emitter(op_sparc_BXX, emit_sparc_BXX);
766 set_emitter(op_sparc_Div, emit_sparc_Div);
767 set_emitter(op_sparc_FrameAddr, emit_sparc_FrameAddr);
768 set_emitter(op_sparc_HiImm, emit_sparc_HiImm);
769 set_emitter(op_sparc_Ba, emit_sparc_Ba);
770 set_emitter(op_sparc_LoImm, emit_sparc_LoImm);
771 set_emitter(op_sparc_Mul, emit_sparc_Mul);
772 set_emitter(op_sparc_Mulh, emit_sparc_Mulh);
773 set_emitter(op_sparc_Save, emit_sparc_Save);
774 set_emitter(op_sparc_SymConst, emit_sparc_SymConst);
776 /* no need to emit anything for the following nodes */
777 set_emitter(op_be_Barrier, emit_nothing);
778 set_emitter(op_be_Keep, emit_nothing);
779 set_emitter(op_be_Start, emit_nothing);
780 set_emitter(op_Phi, emit_nothing);
784 * Emits code for a node.
786 static void sparc_emit_node(const ir_node *node)
788 ir_op *op = get_irn_op(node);
790 if (op->ops.generic) {
791 emit_func func = (emit_func) op->ops.generic;
792 be_dbg_set_dbg_info(get_irn_dbg_info(node));
795 panic("Error: No emit handler for node %+F (graph %+F)\n",
796 node, current_ir_graph);
801 * Walks over the nodes in a block connected by scheduling edges
802 * and emits code for each node.
804 static void sparc_gen_block(ir_node *block, void *data)
809 if (! is_Block(block))
812 be_gas_emit_block_name(block);
813 be_emit_cstring(":\n");
814 be_emit_write_line();
816 sched_foreach(block, node) {
817 sparc_emit_node(node);
823 * Emits code for function start.
825 static void sparc_emit_func_prolog(ir_graph *irg)
827 ir_entity *ent = get_irg_entity(irg);
828 be_gas_emit_function_prolog(ent, 4);
829 be_emit_write_line();
833 * Emits code for function end
835 static void sparc_emit_func_epilog(ir_graph *irg)
837 ir_entity *ent = get_irg_entity(irg);
838 const char *irg_name = get_entity_ld_name(ent);
839 be_emit_write_line();
840 be_emit_irprintf("\t.size %s, .-%s\n", irg_name, irg_name);
841 be_emit_cstring("# -- End ");
842 be_emit_string(irg_name);
843 be_emit_cstring("\n");
844 be_emit_write_line();
849 * TODO: Sets labels for control flow nodes (jump target).
850 * Links control predecessors to there destination blocks.
852 static void sparc_gen_labels(ir_node *block, void *env)
855 int n = get_Block_n_cfgpreds(block);
858 for (n--; n >= 0; n--) {
859 pred = get_Block_cfgpred(block, n);
860 set_irn_link(pred, block); // link the pred of a block (which is a jmp)
868 void sparc_gen_routine(const sparc_code_gen_t *cg, ir_graph *irg)
871 ir_node *last_block = NULL;
872 ir_entity *entity = get_irg_entity(irg);
876 be_gas_elf_type_char = '#';
877 be_gas_object_file_format = OBJECT_FILE_FORMAT_ELF_SPARC;
879 /* register all emitter functions */
880 sparc_register_emitters();
881 be_dbg_method_begin(entity);
883 /* create the block schedule. For now, we don't need it earlier. */
884 blk_sched = be_create_block_schedule(irg);
886 // emit function prolog
887 sparc_emit_func_prolog(irg);
889 // generate BLOCK labels
890 irg_block_walk_graph(irg, sparc_gen_labels, NULL, NULL);
892 // inject block scheduling links & emit code of each block
893 n = ARR_LEN(blk_sched);
894 for (i = 0; i < n;) {
895 ir_node *block, *next_bl;
897 block = blk_sched[i];
899 next_bl = i < n ? blk_sched[i] : NULL;
901 /* set here the link. the emitter expects to find the next block here */
902 set_irn_link(block, next_bl);
903 sparc_gen_block(block, last_block);
907 // emit function epilog
908 sparc_emit_func_epilog(irg);
911 void sparc_init_emitter(void)
913 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.emit");