2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief emit assembler for a backend graph
23 * @author Hannes Rapp, Matthias Braun
41 #include "raw_bitset.h"
45 #include "../besched.h"
46 #include "../beblocksched.h"
48 #include "../begnuas.h"
49 #include "../be_dbgout.h"
50 #include "../benode.h"
51 #include "../bestack.h"
53 #include "sparc_emitter.h"
54 #include "gen_sparc_emitter.h"
55 #include "sparc_nodes_attr.h"
56 #include "sparc_new_nodes.h"
57 #include "gen_sparc_regalloc_if.h"
59 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
61 static ir_heights_t *heights;
62 static const ir_node *delay_slot_filler; /**< this node has been choosen to fill
63 the next delay slot */
65 static void sparc_emit_node(const ir_node *node);
67 void sparc_emit_immediate(const ir_node *node)
69 const sparc_attr_t *attr = get_sparc_attr_const(node);
70 ir_entity *entity = attr->immediate_value_entity;
73 int32_t value = attr->immediate_value;
74 assert(sparc_is_value_imm_encodeable(value));
75 be_emit_irprintf("%d", value);
77 be_emit_cstring("%lo(");
78 be_gas_emit_entity(entity);
79 if (attr->immediate_value != 0) {
80 be_emit_irprintf("%+d", attr->immediate_value);
86 void sparc_emit_high_immediate(const ir_node *node)
88 const sparc_attr_t *attr = get_sparc_attr_const(node);
89 ir_entity *entity = attr->immediate_value_entity;
91 be_emit_cstring("%hi(");
93 uint32_t value = (uint32_t) attr->immediate_value;
94 be_emit_irprintf("0x%X", value);
96 be_gas_emit_entity(entity);
97 if (attr->immediate_value != 0) {
98 be_emit_irprintf("%+d", attr->immediate_value);
104 void sparc_emit_source_register(const ir_node *node, int pos)
106 const arch_register_t *reg = arch_get_irn_register_in(node, pos);
108 be_emit_string(arch_register_get_name(reg));
111 void sparc_emit_dest_register(const ir_node *node, int pos)
113 const arch_register_t *reg = arch_get_irn_register_out(node, pos);
115 be_emit_string(arch_register_get_name(reg));
119 * Emits either a imm or register depending on arity of node
121 * @param register no (-1 if no register)
123 void sparc_emit_reg_or_imm(const ir_node *node, int pos)
125 if (arch_get_irn_flags(node) & ((arch_irn_flags_t)sparc_arch_irn_flag_immediate_form)) {
126 // we have a imm input
127 sparc_emit_immediate(node);
130 sparc_emit_source_register(node, pos);
137 void sparc_emit_offset(const ir_node *node, int offset_node_pos)
139 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
141 if (attr->is_reg_reg) {
142 assert(!attr->is_frame_entity);
143 assert(attr->base.immediate_value == 0);
144 assert(attr->base.immediate_value_entity == NULL);
146 sparc_emit_source_register(node, offset_node_pos);
147 } else if (attr->is_frame_entity) {
148 int32_t offset = attr->base.immediate_value;
150 assert(sparc_is_value_imm_encodeable(offset));
151 be_emit_irprintf("%+ld", offset);
153 } else if (attr->base.immediate_value != 0
154 || attr->base.immediate_value_entity != NULL) {
156 sparc_emit_immediate(node);
160 void sparc_emit_float_load_store_mode(const ir_node *node)
162 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
163 ir_mode *mode = attr->load_store_mode;
164 int bits = get_mode_size_bits(mode);
166 assert(mode_is_float(mode));
170 case 64: be_emit_char('d'); return;
171 case 128: be_emit_char('q'); return;
173 panic("invalid flaot load/store mode %+F", mode);
177 * Emit load mode char
179 void sparc_emit_load_mode(const ir_node *node)
181 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
182 ir_mode *mode = attr->load_store_mode;
183 int bits = get_mode_size_bits(mode);
184 bool is_signed = mode_is_signed(mode);
187 be_emit_string(is_signed ? "sh" : "uh");
188 } else if (bits == 8) {
189 be_emit_string(is_signed ? "sb" : "ub");
190 } else if (bits == 64) {
198 * Emit store mode char
200 void sparc_emit_store_mode(const ir_node *node)
202 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
203 ir_mode *mode = attr->load_store_mode;
204 int bits = get_mode_size_bits(mode);
208 } else if (bits == 8) {
210 } else if (bits == 64) {
218 * emit integer signed/unsigned prefix char
220 void sparc_emit_mode_sign_prefix(const ir_node *node)
222 ir_mode *mode = get_irn_mode(node);
223 bool is_signed = mode_is_signed(mode);
224 be_emit_string(is_signed ? "s" : "u");
227 static void emit_fp_suffix(const ir_mode *mode)
229 unsigned bits = get_mode_size_bits(mode);
230 assert(mode_is_float(mode));
234 } else if (bits == 64) {
236 } else if (bits == 128) {
239 panic("invalid FP mode");
243 void sparc_emit_fp_conv_source(const ir_node *node)
245 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
246 emit_fp_suffix(attr->src_mode);
249 void sparc_emit_fp_conv_destination(const ir_node *node)
251 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
252 emit_fp_suffix(attr->dest_mode);
256 * emits the FP mode suffix char
258 void sparc_emit_fp_mode_suffix(const ir_node *node)
260 const sparc_fp_attr_t *attr = get_sparc_fp_attr_const(node);
261 emit_fp_suffix(attr->fp_mode);
264 static ir_node *get_jump_target(const ir_node *jump)
266 return (ir_node*)get_irn_link(jump);
270 * Returns the target label for a control flow node.
272 static void sparc_emit_cfop_target(const ir_node *node)
274 ir_node *block = get_jump_target(node);
275 be_gas_emit_block_name(block);
278 static int get_sparc_Call_dest_addr_pos(const ir_node *node)
280 return get_irn_arity(node)-1;
283 static bool ba_is_fallthrough(const ir_node *node)
285 ir_node *block = get_nodes_block(node);
286 ir_node *next_block = (ir_node*)get_irn_link(block);
287 return get_irn_link(node) == next_block;
290 static bool is_no_instruction(const ir_node *node)
292 /* copies are nops if src_reg == dest_reg */
293 if (be_is_Copy(node) || be_is_CopyKeep(node)) {
294 const arch_register_t *src_reg = arch_get_irn_register_in(node, 0);
295 const arch_register_t *dest_reg = arch_get_irn_register_out(node, 0);
297 if (src_reg == dest_reg)
300 if (be_is_IncSP(node) && be_get_IncSP_offset(node) == 0)
302 /* Ba is not emitted if it is a simple fallthrough */
303 if (is_sparc_Ba(node) && ba_is_fallthrough(node))
306 return be_is_Keep(node) || be_is_Start(node) || is_Phi(node);
309 static bool has_delay_slot(const ir_node *node)
311 if (is_sparc_Ba(node) && ba_is_fallthrough(node))
314 return is_sparc_Bicc(node) || is_sparc_fbfcc(node) || is_sparc_Ba(node)
315 || is_sparc_SwitchJmp(node) || is_sparc_Call(node)
316 || is_sparc_SDiv(node) || is_sparc_UDiv(node)
317 || is_sparc_Return(node);
320 /** returns true if the emitter for this sparc node can produce more than one
321 * actual sparc instruction.
322 * Usually it is a bad sign if we have to add instructions here. We should
323 * rather try to get them lowered down. So we can actually put them into
324 * delay slots and make them more accessible to the scheduler.
326 static bool emits_multiple_instructions(const ir_node *node)
328 if (has_delay_slot(node))
331 if (is_sparc_Call(node)) {
332 return arch_get_irn_flags(node) & sparc_arch_irn_flag_aggregate_return;
335 return is_sparc_Mulh(node) || is_sparc_SDiv(node) || is_sparc_UDiv(node)
336 || be_is_MemPerm(node) || be_is_Perm(node);
340 * search for an instruction that can fill the delay slot of @p node
342 static const ir_node *pick_delay_slot_for(const ir_node *node)
344 const ir_node *check = node;
345 const ir_node *schedpoint = node;
347 /* currently we don't track which registers are still alive, so we can't
348 * pick any other instructions other than the one directly preceding */
349 static const unsigned PICK_DELAY_SLOT_MAX_DISTANCE = 1;
351 assert(has_delay_slot(node));
353 if (is_sparc_Call(node)) {
354 const sparc_attr_t *attr = get_sparc_attr_const(node);
355 ir_entity *entity = attr->immediate_value_entity;
356 if (entity != NULL) {
357 check = NULL; /* pick any instruction, dependencies on Call
360 /* we only need to check the value for the call destination */
361 check = get_irn_n(node, get_sparc_Call_dest_addr_pos(node));
364 /* the Call also destroys the value of %o7, but since this is currently
365 * marked as ignore register in the backend, it should never be used by
366 * the instruction in the delay slot. */
367 } else if (is_sparc_Return(node)) {
368 /* we only have to check the jump destination value */
369 int arity = get_irn_arity(node);
373 for (i = 0; i < arity; ++i) {
374 ir_node *in = get_irn_n(node, i);
375 const arch_register_t *reg = arch_get_irn_register(in);
376 if (reg == &sparc_registers[REG_O7]) {
377 check = skip_Proj(in);
385 while (sched_has_prev(schedpoint)) {
386 schedpoint = sched_prev(schedpoint);
388 if (has_delay_slot(schedpoint))
391 /* skip things which don't really result in instructions */
392 if (is_no_instruction(schedpoint))
395 if (tries++ >= PICK_DELAY_SLOT_MAX_DISTANCE)
398 if (emits_multiple_instructions(schedpoint))
401 /* allowed for delayslot: any instruction which is not necessary to
402 * compute an input to the branch. */
404 && heights_reachable_in_block(heights, check, schedpoint))
407 /* found something */
415 * Emits code for stack space management
417 static void emit_be_IncSP(const ir_node *irn)
419 int offset = be_get_IncSP_offset(irn);
424 /* SPARC stack grows downwards */
426 be_emit_cstring("\tsub ");
429 be_emit_cstring("\tadd ");
432 sparc_emit_source_register(irn, 0);
433 be_emit_irprintf(", %d", -offset);
434 be_emit_cstring(", ");
435 sparc_emit_dest_register(irn, 0);
436 be_emit_finish_line_gas(irn);
440 * emits code for mulh
442 static void emit_sparc_Mulh(const ir_node *irn)
444 be_emit_cstring("\t");
445 sparc_emit_mode_sign_prefix(irn);
446 be_emit_cstring("mul ");
448 sparc_emit_source_register(irn, 0);
449 be_emit_cstring(", ");
450 sparc_emit_reg_or_imm(irn, 1);
451 be_emit_cstring(", ");
452 sparc_emit_dest_register(irn, 0);
453 be_emit_finish_line_gas(irn);
455 // our result is in the y register now
456 // we just copy it to the assigned target reg
457 be_emit_cstring("\tmov %y, ");
458 sparc_emit_dest_register(irn, 0);
459 be_emit_finish_line_gas(irn);
462 static void fill_delay_slot(void)
464 if (delay_slot_filler != NULL) {
465 sparc_emit_node(delay_slot_filler);
466 delay_slot_filler = NULL;
468 be_emit_cstring("\tnop\n");
469 be_emit_write_line();
473 static void emit_sparc_Div(const ir_node *node, bool is_signed)
475 /* can we get the delay count of the wr instruction somewhere? */
476 unsigned wry_delay_count = 3;
479 be_emit_cstring("\twr ");
480 sparc_emit_source_register(node, 0);
481 be_emit_cstring(", 0, %y");
482 be_emit_finish_line_gas(node);
484 for (i = 0; i < wry_delay_count; ++i) {
488 be_emit_irprintf("\t%s ", is_signed ? "sdiv" : "udiv");
489 sparc_emit_source_register(node, 1);
490 be_emit_cstring(", ");
491 sparc_emit_reg_or_imm(node, 2);
492 be_emit_cstring(", ");
493 sparc_emit_dest_register(node, 0);
494 be_emit_finish_line_gas(node);
497 static void emit_sparc_SDiv(const ir_node *node)
499 emit_sparc_Div(node, true);
502 static void emit_sparc_UDiv(const ir_node *node)
504 emit_sparc_Div(node, false);
508 * Emits code for Call node
510 static void emit_sparc_Call(const ir_node *node)
512 const sparc_attr_t *attr = get_sparc_attr_const(node);
513 ir_entity *entity = attr->immediate_value_entity;
515 be_emit_cstring("\tcall ");
516 if (entity != NULL) {
517 be_gas_emit_entity(entity);
518 if (attr->immediate_value != 0) {
519 be_emit_irprintf("%+d", attr->immediate_value);
521 be_emit_cstring(", 0");
523 int dest_addr = get_sparc_Call_dest_addr_pos(node);
524 sparc_emit_source_register(node, dest_addr);
526 be_emit_finish_line_gas(node);
530 if (arch_get_irn_flags(node) & sparc_arch_irn_flag_aggregate_return) {
531 be_emit_cstring("\tunimp 8\n");
532 be_emit_write_line();
537 * Emit code for Perm node
539 static void emit_be_Perm(const ir_node *irn)
541 be_emit_cstring("\txor ");
542 sparc_emit_source_register(irn, 1);
543 be_emit_cstring(", ");
544 sparc_emit_source_register(irn, 0);
545 be_emit_cstring(", ");
546 sparc_emit_source_register(irn, 0);
547 be_emit_finish_line_gas(NULL);
549 be_emit_cstring("\txor ");
550 sparc_emit_source_register(irn, 1);
551 be_emit_cstring(", ");
552 sparc_emit_source_register(irn, 0);
553 be_emit_cstring(", ");
554 sparc_emit_source_register(irn, 1);
555 be_emit_finish_line_gas(NULL);
557 be_emit_cstring("\txor ");
558 sparc_emit_source_register(irn, 1);
559 be_emit_cstring(", ");
560 sparc_emit_source_register(irn, 0);
561 be_emit_cstring(", ");
562 sparc_emit_source_register(irn, 0);
563 be_emit_finish_line_gas(irn);
566 static void emit_be_MemPerm(const ir_node *node)
571 ir_graph *irg = get_irn_irg(node);
572 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
574 /* this implementation only works with frame pointers currently */
575 assert(layout->sp_relative == false);
577 /* TODO: this implementation is slower than necessary.
578 The longterm goal is however to avoid the memperm node completely */
580 memperm_arity = be_get_MemPerm_entity_arity(node);
581 // we use our local registers - so this is limited to 8 inputs !
582 if (memperm_arity > 8)
583 panic("memperm with more than 8 inputs not supported yet");
585 be_emit_irprintf("\tsub %%sp, %d, %%sp", memperm_arity*4);
586 be_emit_finish_line_gas(node);
588 for (i = 0; i < memperm_arity; ++i) {
589 ir_entity *entity = be_get_MemPerm_in_entity(node, i);
590 int offset = be_get_stack_entity_offset(layout, entity, 0);
593 be_emit_irprintf("\tst %%l%d, [%%sp%+d]", i, sp_change + SPARC_MIN_STACKSIZE);
594 be_emit_finish_line_gas(node);
596 /* load from entity */
597 be_emit_irprintf("\tld [%%fp%+d], %%l%d", offset, i);
598 be_emit_finish_line_gas(node);
602 for (i = memperm_arity-1; i >= 0; --i) {
603 ir_entity *entity = be_get_MemPerm_out_entity(node, i);
604 int offset = be_get_stack_entity_offset(layout, entity, 0);
608 /* store to new entity */
609 be_emit_irprintf("\tst %%l%d, [%%fp%+d]", i, offset);
610 be_emit_finish_line_gas(node);
611 /* restore register */
612 be_emit_irprintf("\tld [%%sp%+d], %%l%d", sp_change + SPARC_MIN_STACKSIZE, i);
613 be_emit_finish_line_gas(node);
616 be_emit_irprintf("\tadd %%sp, %d, %%sp", memperm_arity*4);
617 be_emit_finish_line_gas(node);
619 assert(sp_change == 0);
622 static void emit_sparc_Return(const ir_node *node)
624 ir_graph *irg = get_irn_irg(node);
625 ir_entity *entity = get_irg_entity(irg);
626 ir_type *type = get_entity_type(entity);
628 const char *destreg = "%o7";
630 /* hack: we don't explicitely model register changes because of the
631 * restore node. So we have to do it manually here */
632 if (delay_slot_filler != NULL &&
633 (is_sparc_Restore(delay_slot_filler)
634 || is_sparc_RestoreZero(delay_slot_filler))) {
637 be_emit_cstring("\tjmp ");
638 be_emit_string(destreg);
639 if (type->attr.ma.has_compound_ret_parameter) {
640 be_emit_cstring("+12");
642 be_emit_cstring("+8");
644 be_emit_finish_line_gas(node);
648 static void emit_sparc_FrameAddr(const ir_node *node)
650 const sparc_attr_t *attr = get_sparc_attr_const(node);
651 int32_t offset = attr->immediate_value;
654 be_emit_cstring("\tadd ");
655 sparc_emit_source_register(node, 0);
656 be_emit_cstring(", ");
657 assert(sparc_is_value_imm_encodeable(offset));
658 be_emit_irprintf("%ld", offset);
660 be_emit_cstring("\tsub ");
661 sparc_emit_source_register(node, 0);
662 be_emit_cstring(", ");
663 assert(sparc_is_value_imm_encodeable(-offset));
664 be_emit_irprintf("%ld", -offset);
667 be_emit_cstring(", ");
668 sparc_emit_dest_register(node, 0);
669 be_emit_finish_line_gas(node);
672 static const char *get_icc_unsigned(ir_relation relation)
674 switch (relation & (ir_relation_less_equal_greater)) {
675 case ir_relation_false: return "bn";
676 case ir_relation_equal: return "be";
677 case ir_relation_less: return "blu";
678 case ir_relation_less_equal: return "bleu";
679 case ir_relation_greater: return "bgu";
680 case ir_relation_greater_equal: return "bgeu";
681 case ir_relation_less_greater: return "bne";
682 case ir_relation_less_equal_greater: return "ba";
683 default: panic("Cmp has unsupported relation");
687 static const char *get_icc_signed(ir_relation relation)
689 switch (relation & (ir_relation_less_equal_greater)) {
690 case ir_relation_false: return "bn";
691 case ir_relation_equal: return "be";
692 case ir_relation_less: return "bl";
693 case ir_relation_less_equal: return "ble";
694 case ir_relation_greater: return "bg";
695 case ir_relation_greater_equal: return "bge";
696 case ir_relation_less_greater: return "bne";
697 case ir_relation_less_equal_greater: return "ba";
698 default: panic("Cmp has unsupported relation");
702 static const char *get_fcc(ir_relation relation)
705 case ir_relation_false: return "fbn";
706 case ir_relation_equal: return "fbe";
707 case ir_relation_less: return "fbl";
708 case ir_relation_less_equal: return "fble";
709 case ir_relation_greater: return "fbg";
710 case ir_relation_greater_equal: return "fbge";
711 case ir_relation_less_greater: return "fblg";
712 case ir_relation_less_equal_greater: return "fbo";
713 case ir_relation_unordered: return "fbu";
714 case ir_relation_unordered_equal: return "fbue";
715 case ir_relation_unordered_less: return "fbul";
716 case ir_relation_unordered_less_equal: return "fbule";
717 case ir_relation_unordered_greater: return "fbug";
718 case ir_relation_unordered_greater_equal: return "fbuge";
719 case ir_relation_unordered_less_greater: return "fbne";
720 case ir_relation_true: return "fba";
722 panic("invalid relation");
725 typedef const char* (*get_cc_func)(ir_relation relation);
727 static void emit_sparc_branch(const ir_node *node, get_cc_func get_cc)
729 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
730 ir_relation relation = attr->relation;
731 const ir_node *proj_true = NULL;
732 const ir_node *proj_false = NULL;
733 const ir_edge_t *edge;
734 const ir_node *block;
735 const ir_node *next_block;
737 foreach_out_edge(node, edge) {
738 ir_node *proj = get_edge_src_irn(edge);
739 long nr = get_Proj_proj(proj);
740 if (nr == pn_Cond_true) {
747 /* for now, the code works for scheduled and non-schedules blocks */
748 block = get_nodes_block(node);
750 /* we have a block schedule */
751 next_block = (ir_node*)get_irn_link(block);
753 if (get_irn_link(proj_true) == next_block) {
754 /* exchange both proj's so the second one can be omitted */
755 const ir_node *t = proj_true;
757 proj_true = proj_false;
759 relation = get_negated_relation(relation);
762 /* emit the true proj */
763 be_emit_cstring("\t");
764 be_emit_string(get_cc(relation));
766 sparc_emit_cfop_target(proj_true);
767 be_emit_finish_line_gas(proj_true);
771 if (get_irn_link(proj_false) == next_block) {
772 be_emit_cstring("\t/* fallthrough to ");
773 sparc_emit_cfop_target(proj_false);
774 be_emit_cstring(" */");
775 be_emit_finish_line_gas(proj_false);
777 be_emit_cstring("\tba ");
778 sparc_emit_cfop_target(proj_false);
779 be_emit_finish_line_gas(proj_false);
784 static void emit_sparc_Bicc(const ir_node *node)
786 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
787 bool is_unsigned = attr->is_unsigned;
788 emit_sparc_branch(node, is_unsigned ? get_icc_unsigned : get_icc_signed);
791 static void emit_sparc_fbfcc(const ir_node *node)
793 /* if the flags producing node was immediately in front of us, emit
795 ir_node *flags = get_irn_n(node, n_sparc_fbfcc_flags);
796 ir_node *prev = sched_prev(node);
797 if (is_Block(prev)) {
798 /* TODO: when the flags come from another block, then we have to do
799 * more complicated tests to see wether the flag producing node is
800 * potentially in front of us (could happen for fallthroughs) */
801 panic("TODO: fbfcc flags come from other block");
803 if (skip_Proj(flags) == prev) {
804 be_emit_cstring("\tnop\n");
806 emit_sparc_branch(node, get_fcc);
809 static void emit_sparc_Ba(const ir_node *node)
811 if (ba_is_fallthrough(node)) {
812 be_emit_cstring("\t/* fallthrough to ");
813 sparc_emit_cfop_target(node);
814 be_emit_cstring(" */");
816 be_emit_cstring("\tba ");
817 sparc_emit_cfop_target(node);
818 be_emit_finish_line_gas(node);
821 be_emit_finish_line_gas(node);
824 static void emit_sparc_SwitchJmp(const ir_node *node)
826 const sparc_switch_jmp_attr_t *attr = get_sparc_switch_jmp_attr_const(node);
828 be_emit_cstring("\tjmp ");
829 sparc_emit_source_register(node, 0);
830 be_emit_finish_line_gas(node);
833 emit_jump_table(node, attr->default_proj_num, attr->jump_table,
837 static void emit_fmov(const ir_node *node, const arch_register_t *src_reg,
838 const arch_register_t *dst_reg)
840 be_emit_cstring("\tfmovs %");
841 be_emit_string(arch_register_get_name(src_reg));
842 be_emit_cstring(", %");
843 be_emit_string(arch_register_get_name(dst_reg));
844 be_emit_finish_line_gas(node);
847 static const arch_register_t *get_next_fp_reg(const arch_register_t *reg)
849 unsigned idx = reg->global_index;
850 assert(reg == &sparc_registers[idx]);
852 assert(idx - REG_F0 < N_sparc_fp_REGS);
853 return &sparc_registers[idx];
856 static void emit_be_Copy(const ir_node *node)
858 ir_mode *mode = get_irn_mode(node);
859 const arch_register_t *src_reg = arch_get_irn_register_in(node, 0);
860 const arch_register_t *dst_reg = arch_get_irn_register_out(node, 0);
862 if (src_reg == dst_reg)
865 if (mode_is_float(mode)) {
866 unsigned bits = get_mode_size_bits(mode);
867 int n = bits > 32 ? bits > 64 ? 3 : 1 : 0;
869 emit_fmov(node, src_reg, dst_reg);
870 for (i = 0; i < n; ++i) {
871 src_reg = get_next_fp_reg(src_reg);
872 dst_reg = get_next_fp_reg(dst_reg);
873 emit_fmov(node, src_reg, dst_reg);
875 } else if (mode_is_data(mode)) {
876 be_emit_cstring("\tmov ");
877 sparc_emit_source_register(node, 0);
878 be_emit_cstring(", ");
879 sparc_emit_dest_register(node, 0);
880 be_emit_finish_line_gas(node);
882 panic("emit_be_Copy: invalid mode");
886 static void emit_nothing(const ir_node *irn)
891 typedef void (*emit_func) (const ir_node *);
893 static inline void set_emitter(ir_op *op, emit_func sparc_emit_node)
895 op->ops.generic = (op_func)sparc_emit_node;
899 * Enters the emitter functions for handled nodes into the generic
900 * pointer of an opcode.
902 static void sparc_register_emitters(void)
904 /* first clear the generic function pointer for all ops */
905 clear_irp_opcodes_generic_func();
906 /* register all emitter functions defined in spec */
907 sparc_register_spec_emitters();
910 set_emitter(op_be_Copy, emit_be_Copy);
911 set_emitter(op_be_CopyKeep, emit_be_Copy);
912 set_emitter(op_be_IncSP, emit_be_IncSP);
913 set_emitter(op_be_MemPerm, emit_be_MemPerm);
914 set_emitter(op_be_Perm, emit_be_Perm);
915 set_emitter(op_sparc_Ba, emit_sparc_Ba);
916 set_emitter(op_sparc_Bicc, emit_sparc_Bicc);
917 set_emitter(op_sparc_Call, emit_sparc_Call);
918 set_emitter(op_sparc_fbfcc, emit_sparc_fbfcc);
919 set_emitter(op_sparc_FrameAddr, emit_sparc_FrameAddr);
920 set_emitter(op_sparc_Mulh, emit_sparc_Mulh);
921 set_emitter(op_sparc_Return, emit_sparc_Return);
922 set_emitter(op_sparc_SDiv, emit_sparc_SDiv);
923 set_emitter(op_sparc_SwitchJmp, emit_sparc_SwitchJmp);
924 set_emitter(op_sparc_UDiv, emit_sparc_UDiv);
926 /* no need to emit anything for the following nodes */
927 set_emitter(op_be_Keep, emit_nothing);
928 set_emitter(op_sparc_Start, emit_nothing);
929 set_emitter(op_Phi, emit_nothing);
933 * Emits code for a node.
935 static void sparc_emit_node(const ir_node *node)
937 ir_op *op = get_irn_op(node);
939 if (op->ops.generic) {
940 emit_func func = (emit_func) op->ops.generic;
941 be_dbg_set_dbg_info(get_irn_dbg_info(node));
944 panic("No emit handler for node %+F (graph %+F)\n", node,
949 static ir_node *find_next_delay_slot(ir_node *from)
951 ir_node *schedpoint = from;
952 while (!has_delay_slot(schedpoint)) {
953 if (!sched_has_next(schedpoint))
955 schedpoint = sched_next(schedpoint);
961 * Walks over the nodes in a block connected by scheduling edges
962 * and emits code for each node.
964 static void sparc_emit_block(ir_node *block)
967 ir_node *next_delay_slot;
969 assert(is_Block(block));
971 be_gas_emit_block_name(block);
972 be_emit_cstring(":\n");
973 be_emit_write_line();
975 next_delay_slot = find_next_delay_slot(sched_first(block));
976 if (next_delay_slot != NULL)
977 delay_slot_filler = pick_delay_slot_for(next_delay_slot);
979 sched_foreach(block, node) {
980 if (node == delay_slot_filler) {
984 sparc_emit_node(node);
986 if (node == next_delay_slot) {
987 assert(delay_slot_filler == NULL);
988 next_delay_slot = find_next_delay_slot(sched_next(node));
989 if (next_delay_slot != NULL)
990 delay_slot_filler = pick_delay_slot_for(next_delay_slot);
996 * Emits code for function start.
998 static void sparc_emit_func_prolog(ir_graph *irg)
1000 ir_entity *ent = get_irg_entity(irg);
1001 be_gas_emit_function_prolog(ent, 4);
1002 be_emit_write_line();
1006 * Emits code for function end
1008 static void sparc_emit_func_epilog(ir_graph *irg)
1010 ir_entity *ent = get_irg_entity(irg);
1011 const char *irg_name = get_entity_ld_name(ent);
1012 be_emit_write_line();
1013 be_emit_irprintf("\t.size %s, .-%s\n", irg_name, irg_name);
1014 be_emit_cstring("# -- End ");
1015 be_emit_string(irg_name);
1016 be_emit_cstring("\n");
1017 be_emit_write_line();
1020 static void sparc_gen_labels(ir_node *block, void *env)
1023 int n = get_Block_n_cfgpreds(block);
1026 for (n--; n >= 0; n--) {
1027 pred = get_Block_cfgpred(block, n);
1028 set_irn_link(pred, block); // link the pred of a block (which is a jmp)
1032 void sparc_emit_routine(ir_graph *irg)
1034 ir_entity *entity = get_irg_entity(irg);
1035 ir_node **block_schedule;
1039 heights = heights_new(irg);
1041 /* register all emitter functions */
1042 sparc_register_emitters();
1043 be_dbg_method_begin(entity);
1045 /* create the block schedule. For now, we don't need it earlier. */
1046 block_schedule = be_create_block_schedule(irg);
1048 sparc_emit_func_prolog(irg);
1049 irg_block_walk_graph(irg, sparc_gen_labels, NULL, NULL);
1051 /* inject block scheduling links & emit code of each block */
1052 n = ARR_LEN(block_schedule);
1053 for (i = 0; i < n; ++i) {
1054 ir_node *block = block_schedule[i];
1055 ir_node *next_block = i+1 < n ? block_schedule[i+1] : NULL;
1056 set_irn_link(block, next_block);
1059 for (i = 0; i < n; ++i) {
1060 ir_node *block = block_schedule[i];
1061 if (block == get_irg_end_block(irg))
1063 sparc_emit_block(block);
1066 /* emit function epilog */
1067 sparc_emit_func_epilog(irg);
1069 heights_free(heights);
1072 void sparc_init_emitter(void)
1074 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.emit");