2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief emit assembler for a backend graph
40 #include "raw_bitset.h"
43 #include "../besched.h"
44 #include "../beblocksched.h"
46 #include "../begnuas.h"
47 #include "../be_dbgout.h"
48 #include "../benode.h"
50 #include "sparc_emitter.h"
51 #include "gen_sparc_emitter.h"
52 #include "sparc_nodes_attr.h"
53 #include "sparc_new_nodes.h"
54 #include "gen_sparc_regalloc_if.h"
57 #define SNPRINTF_BUF_LEN 128
58 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
61 * attribute of SAVE node which follows immediatelly after the START node
62 * we need this to correct all offsets since SPARC expects
63 * some reserved stack space after the stackpointer
65 const sparc_save_attr_t *save_attr;
68 * Returns the register at in position pos.
70 static const arch_register_t *get_in_reg(const ir_node *node, int pos)
73 const arch_register_t *reg = NULL;
75 assert(get_irn_arity(node) > pos && "Invalid IN position");
77 /* The out register of the operator at position pos is the
78 in register we need. */
79 op = get_irn_n(node, pos);
81 reg = arch_get_irn_register(op);
83 assert(reg && "no in register found");
88 * Returns the register at out position pos.
90 static const arch_register_t *get_out_reg(const ir_node *node, int pos)
93 const arch_register_t *reg = NULL;
95 /* 1st case: irn is not of mode_T, so it has only */
96 /* one OUT register -> good */
97 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
98 /* Proj with the corresponding projnum for the register */
100 if (get_irn_mode(node) != mode_T) {
101 reg = arch_get_irn_register(node);
102 } else if (is_sparc_irn(node)) {
103 reg = arch_irn_get_register(node, pos);
105 const ir_edge_t *edge;
107 foreach_out_edge(node, edge) {
108 proj = get_edge_src_irn(edge);
109 assert(is_Proj(proj) && "non-Proj from mode_T node");
110 if (get_Proj_proj(proj) == pos) {
111 reg = arch_get_irn_register(proj);
117 assert(reg && "no out register found");
121 /*************************************************************
123 * (_) | | / _| | | | |
124 * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
125 * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
126 * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
127 * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
130 *************************************************************/
132 void sparc_emit_immediate(const ir_node *node)
134 const sparc_attr_t *attr = get_sparc_attr_const(node);
135 assert(!(attr->immediate_value < -4096 || attr->immediate_value > 4096));
136 be_emit_irprintf("%d", attr->immediate_value);
139 void sparc_emit_source_register(const ir_node *node, int pos)
141 const arch_register_t *reg = get_in_reg(node, pos);
143 be_emit_string(arch_register_get_name(reg));
146 void sparc_emit_dest_register(const ir_node *node, int pos)
148 const arch_register_t *reg = get_out_reg(node, pos);
150 be_emit_string(arch_register_get_name(reg));
154 * Emits either a imm or register depending on arity of node
156 * @param register no (-1 if no register)
158 void sparc_emit_reg_or_imm(const ir_node *node, int pos)
160 if (get_irn_arity(node) > pos) {
162 sparc_emit_source_register(node, pos);
164 // we have a imm input
165 sparc_emit_immediate(node);
172 void sparc_emit_offset(const ir_node *node)
174 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
175 assert(attr->base.is_load_store);
177 if (attr->offset > 0)
178 be_emit_irprintf("+%ld", attr->offset);
183 * Emit load mode char
185 void sparc_emit_load_mode(const ir_node *node)
187 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
188 ir_mode *mode = attr->load_store_mode;
189 int bits = get_mode_size_bits(mode);
190 bool is_signed = mode_is_signed(mode);
193 be_emit_string(is_signed ? "sh" : "uh");
194 } else if (bits == 8) {
195 be_emit_string(is_signed ? "sb" : "ub");
196 } else if (bits == 64) {
204 * Emit store mode char
206 void sparc_emit_store_mode(const ir_node *node)
208 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
209 ir_mode *mode = attr->load_store_mode;
210 int bits = get_mode_size_bits(mode);
214 } else if (bits == 8) {
216 } else if (bits == 64) {
224 * emit integer signed/unsigned prefix char
226 void sparc_emit_mode_sign_prefix(const ir_node *node)
228 ir_mode *mode = get_irn_mode(node);
229 bool is_signed = mode_is_signed(mode);
230 be_emit_string(is_signed ? "s" : "u");
234 * emit FP load mode char
236 void sparc_emit_fp_load_mode(const ir_node *node)
238 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
239 ir_mode *mode = attr->load_store_mode;
240 int bits = get_mode_size_bits(mode);
242 assert(mode_is_float(mode));
246 } else if (bits == 64) {
247 be_emit_string("df");
249 panic("FP load mode > 64bits not implemented yet");
254 * emit FP store mode char
256 void sparc_emit_fp_store_mode(const ir_node *node)
258 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
259 ir_mode *mode = attr->load_store_mode;
260 int bits = get_mode_size_bits(mode);
262 assert(mode_is_float(mode));
266 } else if (bits == 64) {
267 be_emit_string("df");
269 panic("FP store mode > 64bits not implemented yet");
274 * emits the FP mode suffix char
276 void sparc_emit_fp_mode_suffix(const ir_node *node)
278 ir_mode *mode = get_irn_mode(node);
279 int bits = get_mode_size_bits(mode);
281 assert(mode_is_float(mode));
285 } else if (bits == 64) {
288 panic("FP mode > 64bits not implemented yet");
293 * Returns the target label for a control flow node.
295 static void sparc_emit_cfop_target(const ir_node *node)
297 ir_node *block = get_irn_link(node);
298 be_gas_emit_block_name(block);
304 static void sparc_emit_entity(ir_entity *entity)
306 be_gas_emit_entity(entity);
309 /***********************************************************************************
312 * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
313 * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
314 * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
315 * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
317 ***********************************************************************************/
321 * Emits code for stack space management
323 static void emit_be_IncSP(const ir_node *irn)
325 int offs = -be_get_IncSP_offset(irn);
330 /* SPARC stack grows downwards */
332 be_emit_cstring("\tsub ");
335 be_emit_cstring("\tadd ");
338 sparc_emit_source_register(irn, 0);
339 be_emit_irprintf(", %d", offs);
340 be_emit_cstring(", ");
341 sparc_emit_dest_register(irn, 0);
342 be_emit_finish_line_gas(irn);
346 * emits code for save instruction with min. required stack space
348 static void emit_sparc_Save(const ir_node *irn)
350 save_attr = get_sparc_save_attr_const(irn);
351 be_emit_cstring("\tsave ");
352 sparc_emit_source_register(irn, 0);
353 be_emit_irprintf(", %d, ", -save_attr->initial_stacksize);
354 sparc_emit_dest_register(irn, 0);
355 be_emit_finish_line_gas(irn);
359 * emits code to load hi 22 bit of a constant
361 static void emit_sparc_HiImm(const ir_node *irn)
363 const sparc_attr_t *attr = get_sparc_attr_const(irn);
364 be_emit_cstring("\tsethi ");
365 be_emit_irprintf("%%hi(%d), ", attr->immediate_value);
366 sparc_emit_dest_register(irn, 0);
367 be_emit_finish_line_gas(irn);
371 * emits code to load lo 10bits of a constant
373 static void emit_sparc_LoImm(const ir_node *irn)
375 const sparc_attr_t *attr = get_sparc_attr_const(irn);
376 be_emit_cstring("\tor ");
377 sparc_emit_source_register(irn, 0);
378 be_emit_irprintf(", %%lo(%d), ", attr->immediate_value);
379 sparc_emit_dest_register(irn, 0);
380 be_emit_finish_line_gas(irn);
384 * emit code for div with the correct sign prefix
386 static void emit_sparc_Div(const ir_node *irn)
388 be_emit_cstring("\t");
389 sparc_emit_mode_sign_prefix(irn);
390 be_emit_cstring("div ");
392 sparc_emit_source_register(irn, 0);
393 be_emit_cstring(", ");
394 sparc_emit_reg_or_imm(irn, 1);
395 be_emit_cstring(", ");
396 sparc_emit_dest_register(irn, 0);
397 be_emit_finish_line_gas(irn);
401 * emit code for mul with the correct sign prefix
403 static void emit_sparc_Mul(const ir_node *irn)
405 be_emit_cstring("\t");
406 sparc_emit_mode_sign_prefix(irn);
407 be_emit_cstring("mul ");
409 sparc_emit_source_register(irn, 0);
410 be_emit_cstring(", ");
411 sparc_emit_reg_or_imm(irn, 1);
412 be_emit_cstring(", ");
413 sparc_emit_dest_register(irn, 0);
414 be_emit_finish_line_gas(irn);
418 * emits code for mulh
420 static void emit_sparc_Mulh(const ir_node *irn)
422 be_emit_cstring("\t");
423 sparc_emit_mode_sign_prefix(irn);
424 be_emit_cstring("mul ");
426 sparc_emit_source_register(irn, 0);
427 be_emit_cstring(", ");
428 sparc_emit_reg_or_imm(irn, 1);
429 be_emit_cstring(", ");
430 sparc_emit_dest_register(irn, 0);
431 be_emit_finish_line_gas(irn);
433 // our result is in the y register now
434 // we just copy it to the assigned target reg
435 be_emit_cstring("\tmov ");
437 be_emit_string(arch_register_get_name(&sparc_flags_regs[REG_Y]));
438 be_emit_cstring(", ");
439 sparc_emit_dest_register(irn, 0);
440 be_emit_finish_line_gas(irn);
444 * Emits code for return node
446 static void emit_be_Return(const ir_node *irn)
448 be_emit_cstring("\tret");
449 //be_emit_cstring("\tjmp %i7+8");
450 be_emit_finish_line_gas(irn);
451 be_emit_cstring("\trestore");
452 be_emit_finish_line_gas(irn);
456 * Emits code for Call node
458 static void emit_be_Call(const ir_node *irn)
460 ir_entity *entity = be_Call_get_entity(irn);
462 if (entity != NULL) {
463 be_emit_cstring("\tcall ");
464 sparc_emit_entity(entity);
465 be_emit_cstring(", 0");
466 be_emit_finish_line_gas(irn);
467 be_emit_cstring("\tnop");
468 be_emit_pad_comment();
469 be_emit_cstring("/* TODO: use delay slot */\n");
471 be_emit_cstring("\tnop\n");
472 be_emit_pad_comment();
473 be_emit_cstring("/* TODO: Entity == NULL */\n");
474 be_emit_finish_line_gas(irn);
479 * Emit code for Perm node
481 static void emit_be_Perm(const ir_node *irn)
483 be_emit_cstring("\txor ");
484 sparc_emit_source_register(irn, 1);
485 be_emit_cstring(", ");
486 sparc_emit_source_register(irn, 0);
487 be_emit_cstring(", ");
488 sparc_emit_source_register(irn, 0);
489 be_emit_finish_line_gas(NULL);
491 be_emit_cstring("\txor ");
492 sparc_emit_source_register(irn, 1);
493 be_emit_cstring(", ");
494 sparc_emit_source_register(irn, 0);
495 be_emit_cstring(", ");
496 sparc_emit_source_register(irn, 1);
497 be_emit_finish_line_gas(NULL);
499 be_emit_cstring("\txor ");
500 sparc_emit_source_register(irn, 1);
501 be_emit_cstring(", ");
502 sparc_emit_source_register(irn, 0);
503 be_emit_cstring(", ");
504 sparc_emit_source_register(irn, 0);
505 be_emit_finish_line_gas(irn);
509 * TODO: not really tested but seems to work with memperm_arity == 1
511 static void emit_be_MemPerm(const ir_node *node)
517 /* TODO: this implementation is slower than necessary.
518 The longterm goal is however to avoid the memperm node completely */
520 memperm_arity = be_get_MemPerm_entity_arity(node);
521 // we use our local registers - so this is limited to 8 inputs !
522 if (memperm_arity > 8)
523 panic("memperm with more than 8 inputs not supported yet");
525 for (i = 0; i < memperm_arity; ++i) {
527 ir_entity *entity = be_get_MemPerm_in_entity(node, i);
531 be_emit_irprintf("\tst %%l%d, [%%sp-%d]", i, sp_change);
532 be_emit_finish_line_gas(node);
534 /* load from entity */
535 offset = get_entity_offset(entity) + sp_change;
536 be_emit_irprintf("\tld [%%sp+%d], %%l%d", offset, i);
537 be_emit_finish_line_gas(node);
540 for (i = memperm_arity-1; i >= 0; --i) {
542 ir_entity *entity = be_get_MemPerm_out_entity(node, i);
544 /* store to new entity */
545 offset = get_entity_offset(entity) + sp_change;
546 be_emit_irprintf("\tst %%l%d, [%%sp+%d]", i, offset);
547 be_emit_finish_line_gas(node);
548 /* restore register */
549 be_emit_irprintf("\tld [%%sp-%d], %%l%d", sp_change, i);
551 be_emit_finish_line_gas(node);
553 assert(sp_change == 0);
559 static void emit_sparc_SymConst(const ir_node *irn)
561 const sparc_symconst_attr_t *attr = get_sparc_symconst_attr_const(irn);
563 //sethi %hi(const32),%reg
564 //or %reg,%lo(const32),%reg
566 be_emit_cstring("\tsethi %hi(");
567 be_gas_emit_entity(attr->entity);
568 be_emit_cstring("), ");
569 sparc_emit_dest_register(irn, 0);
570 be_emit_cstring("\n ");
572 // TODO: could be combined with the following load/store instruction
573 be_emit_cstring("\tor ");
574 sparc_emit_dest_register(irn, 0);
575 be_emit_cstring(", %lo(");
576 be_gas_emit_entity(attr->entity);
577 be_emit_cstring("), ");
578 sparc_emit_dest_register(irn, 0);
579 be_emit_finish_line_gas(irn);
583 * Emits code for FrameAddr fix
585 static void emit_sparc_FrameAddr(const ir_node *irn)
587 const sparc_symconst_attr_t *attr = get_irn_generic_attr_const(irn);
589 // no need to fix offset as we are adressing via the framepointer
590 if (attr->fp_offset >= 0) {
591 be_emit_cstring("\tadd ");
592 sparc_emit_source_register(irn, 0);
593 be_emit_cstring(", ");
594 be_emit_irprintf("%ld", attr->fp_offset + save_attr->initial_stacksize);
596 be_emit_cstring("\tsub ");
597 sparc_emit_source_register(irn, 0);
598 be_emit_cstring(", ");
599 be_emit_irprintf("%ld", -attr->fp_offset);
602 be_emit_cstring(", ");
603 sparc_emit_dest_register(irn, 0);
604 be_emit_finish_line_gas(irn);
609 * Emits code for Branch
611 static void emit_sparc_Branch(const ir_node *irn)
613 const ir_edge_t *edge;
614 const ir_node *proj_true = NULL;
615 const ir_node *proj_false = NULL;
616 const ir_node *block;
617 const ir_node *next_block;
618 ir_node *op1 = get_irn_n(irn, 0);
620 int proj_num = get_sparc_jmp_cond_proj_num(irn);
621 const sparc_cmp_attr_t *cmp_attr = get_irn_generic_attr_const(op1);
622 // bool is_signed = !cmp_attr->is_unsigned;
624 assert(is_sparc_Cmp(op1) || is_sparc_Tst(op1));
626 foreach_out_edge(irn, edge) {
627 ir_node *proj = get_edge_src_irn(edge);
628 long nr = get_Proj_proj(proj);
629 if (nr == pn_Cond_true) {
636 if (cmp_attr->ins_permuted) {
637 proj_num = get_mirrored_pnc(proj_num);
640 /* for now, the code works for scheduled and non-schedules blocks */
641 block = get_nodes_block(irn);
643 /* we have a block schedule */
644 next_block = get_irn_link(block);
646 assert(proj_num != pn_Cmp_False);
647 assert(proj_num != pn_Cmp_True);
649 if (get_irn_link(proj_true) == next_block) {
650 /* exchange both proj's so the second one can be omitted */
651 const ir_node *t = proj_true;
653 proj_true = proj_false;
655 proj_num = get_negated_pnc(proj_num, mode_Iu);
660 case pn_Cmp_Eq: suffix = "e"; break;
661 case pn_Cmp_Lt: suffix = "l"; break;
662 case pn_Cmp_Le: suffix = "le"; break;
663 case pn_Cmp_Gt: suffix = "g"; break;
664 case pn_Cmp_Ge: suffix = "ge"; break;
665 case pn_Cmp_Lg: suffix = "ne"; break;
666 case pn_Cmp_Leg: suffix = "a"; break;
667 default: panic("Cmp has unsupported pnc");
670 /* emit the true proj */
671 be_emit_irprintf("\tb%s ", suffix);
672 sparc_emit_cfop_target(proj_true);
673 be_emit_finish_line_gas(proj_true);
675 be_emit_cstring("\tnop");
676 be_emit_pad_comment();
677 be_emit_cstring("/* TODO: use delay slot */\n");
679 if (get_irn_link(proj_false) == next_block) {
680 be_emit_cstring("\t/* false-fallthrough to ");
681 sparc_emit_cfop_target(proj_false);
682 be_emit_cstring(" */");
683 be_emit_finish_line_gas(proj_false);
685 be_emit_cstring("\tba ");
686 sparc_emit_cfop_target(proj_false);
687 be_emit_finish_line_gas(proj_false);
688 be_emit_cstring("\tnop\t\t/* TODO: use delay slot */\n");
689 be_emit_finish_line_gas(proj_false);
694 * emit Jmp (which actually is a branch always (ba) instruction)
696 static void emit_sparc_Jmp(const ir_node *node)
698 ir_node *block, *next_block;
700 /* for now, the code works for scheduled and non-schedules blocks */
701 block = get_nodes_block(node);
703 /* we have a block schedule */
704 next_block = get_irn_link(block);
705 if (get_irn_link(node) != next_block) {
706 be_emit_cstring("\tba ");
707 sparc_emit_cfop_target(node);
708 be_emit_finish_line_gas(node);
709 be_emit_cstring("\tnop\t\t/* TODO: use delay slot */\n");
711 be_emit_cstring("\t/* fallthrough to ");
712 sparc_emit_cfop_target(node);
713 be_emit_cstring(" */");
715 be_emit_finish_line_gas(node);
721 static void emit_be_Copy(const ir_node *irn)
723 ir_mode *mode = get_irn_mode(irn);
725 if (get_in_reg(irn, 0) == get_out_reg(irn, 0)) {
730 if (mode_is_float(mode)) {
731 panic("emit_be_Copy: move not supported for FP");
732 } else if (mode_is_data(mode)) {
733 be_emit_cstring("\tmov ");
734 sparc_emit_source_register(irn, 0);
735 be_emit_cstring(", ");
736 sparc_emit_dest_register(irn, 0);
737 be_emit_finish_line_gas(irn);
739 panic("emit_be_Copy: move not supported for this mode");
745 * dummy emitter for ignored nodes
747 static void emit_nothing(const ir_node *irn)
755 * type of emitter function
757 typedef void (*emit_func) (const ir_node *);
760 * Set a node emitter. Make it a bit more type safe.
762 static inline void set_emitter(ir_op *op, emit_func sparc_emit_node)
764 op->ops.generic = (op_func)sparc_emit_node;
768 * Enters the emitter functions for handled nodes into the generic
769 * pointer of an opcode.
771 static void sparc_register_emitters(void)
774 /* first clear the generic function pointer for all ops */
775 clear_irp_opcodes_generic_func();
777 /* register all emitter functions defined in spec */
778 sparc_register_spec_emitters();
781 set_emitter(op_be_IncSP, emit_be_IncSP);
782 set_emitter(op_be_Return, emit_be_Return);
783 set_emitter(op_be_Call, emit_be_Call);
784 set_emitter(op_sparc_FrameAddr, emit_sparc_FrameAddr);
785 set_emitter(op_sparc_Branch, emit_sparc_Branch);
786 set_emitter(op_sparc_SymConst, emit_sparc_SymConst);
787 set_emitter(op_sparc_Jmp, emit_sparc_Jmp);
788 set_emitter(op_sparc_Save, emit_sparc_Save);
790 set_emitter(op_sparc_HiImm, emit_sparc_HiImm);
791 set_emitter(op_sparc_LoImm, emit_sparc_LoImm);
792 set_emitter(op_sparc_Div, emit_sparc_Div);
793 set_emitter(op_sparc_Mul, emit_sparc_Mul);
794 set_emitter(op_sparc_Mulh, emit_sparc_Mulh);
796 set_emitter(op_be_Copy, emit_be_Copy);
797 set_emitter(op_be_CopyKeep, emit_be_Copy);
799 set_emitter(op_be_Perm, emit_be_Perm);
800 set_emitter(op_be_MemPerm, emit_be_MemPerm);
803 set_emitter(op_arm_B, emit_arm_B);
804 set_emitter(op_arm_CopyB, emit_arm_CopyB);
805 set_emitter(op_arm_fpaConst, emit_arm_fpaConst);
806 set_emitter(op_arm_fpaDbl2GP, emit_arm_fpaDbl2GP);
807 set_emitter(op_arm_LdTls, emit_arm_LdTls);
808 set_emitter(op_arm_SwitchJmp, emit_arm_SwitchJmp);
811 /* no need to emit anything for the following nodes */
812 set_emitter(op_Phi, emit_nothing);
813 set_emitter(op_be_Keep, emit_nothing);
814 set_emitter(op_be_Start, emit_nothing);
815 set_emitter(op_be_Barrier, emit_nothing);
820 * Emits code for a node.
822 static void sparc_emit_node(const ir_node *node)
824 ir_op *op = get_irn_op(node);
826 if (op->ops.generic) {
827 emit_func func = (emit_func) op->ops.generic;
828 be_dbg_set_dbg_info(get_irn_dbg_info(node));
831 panic("Error: No emit handler for node %+F (graph %+F)\n",
832 node, current_ir_graph);
837 * Walks over the nodes in a block connected by scheduling edges
838 * and emits code for each node.
840 static void sparc_gen_block(ir_node *block, void *data)
845 if (! is_Block(block))
848 be_gas_emit_block_name(block);
849 be_emit_cstring(":\n");
850 be_emit_write_line();
852 sched_foreach(block, node) {
853 sparc_emit_node(node);
859 * Emits code for function start.
861 static void sparc_emit_func_prolog(ir_graph *irg)
863 ir_entity *ent = get_irg_entity(irg);
864 be_gas_emit_function_prolog(ent, 4);
865 be_emit_write_line();
869 * Emits code for function end
871 static void sparc_emit_func_epilog(ir_graph *irg)
873 ir_entity *ent = get_irg_entity(irg);
874 const char *irg_name = get_entity_ld_name(ent);
875 be_emit_write_line();
876 be_emit_irprintf("\t.size %s, .-%s\n", irg_name, irg_name);
877 be_emit_cstring("# -- End ");
878 be_emit_string(irg_name);
879 be_emit_cstring("\n");
880 be_emit_write_line();
885 * TODO: Sets labels for control flow nodes (jump target).
886 * Links control predecessors to there destination blocks.
888 static void sparc_gen_labels(ir_node *block, void *env)
891 int n = get_Block_n_cfgpreds(block);
894 for (n--; n >= 0; n--) {
895 pred = get_Block_cfgpred(block, n);
896 set_irn_link(pred, block); // link the pred of a block (which is a jmp)
904 void sparc_gen_routine(const sparc_code_gen_t *cg, ir_graph *irg)
907 ir_node *last_block = NULL;
908 ir_entity *entity = get_irg_entity(irg);
912 be_gas_elf_type_char = '#';
913 be_gas_object_file_format = OBJECT_FILE_FORMAT_ELF_SPARC;
915 /* register all emitter functions */
916 sparc_register_emitters();
917 be_dbg_method_begin(entity);
919 /* create the block schedule. For now, we don't need it earlier. */
920 blk_sched = be_create_block_schedule(irg);
922 // emit function prolog
923 sparc_emit_func_prolog(irg);
925 // generate BLOCK labels
926 irg_block_walk_graph(irg, sparc_gen_labels, NULL, NULL);
928 // inject block scheduling links & emit code of each block
929 n = ARR_LEN(blk_sched);
930 for (i = 0; i < n;) {
931 ir_node *block, *next_bl;
933 block = blk_sched[i];
935 next_bl = i < n ? blk_sched[i] : NULL;
937 /* set here the link. the emitter expects to find the next block here */
938 set_irn_link(block, next_bl);
939 sparc_gen_block(block, last_block);
944 //irg_walk_blkwise_graph(irg, NULL, sparc_gen_block, NULL);
946 // emit function epilog
947 sparc_emit_func_epilog(irg);
950 void sparc_init_emitter(void)
952 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.emit");