2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief emit assembler for a backend graph
23 * @author Hannes Rapp, Matthias Braun
29 #include "bitfiddle.h"
41 #include "raw_bitset.h"
46 #include "beblocksched.h"
52 #include "bepeephole.h"
54 #include "sparc_emitter.h"
55 #include "gen_sparc_emitter.h"
56 #include "sparc_nodes_attr.h"
57 #include "sparc_new_nodes.h"
58 #include "gen_sparc_regalloc_if.h"
60 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
62 static ir_heights_t *heights;
63 static const ir_node *delay_slot_filler; /**< this node has been choosen to fill
64 the next delay slot */
66 static void sparc_emit_node(const ir_node *node);
67 static bool emitting_delay_slot;
69 void sparc_emit_indent(void)
72 if (emitting_delay_slot)
76 void sparc_emit_immediate(const ir_node *node)
78 const sparc_attr_t *attr = get_sparc_attr_const(node);
79 ir_entity *entity = attr->immediate_value_entity;
82 int32_t value = attr->immediate_value;
83 assert(sparc_is_value_imm_encodeable(value));
84 be_emit_irprintf("%d", value);
86 if (get_entity_owner(entity) == get_tls_type()) {
87 be_emit_cstring("%tle_lox10(");
89 be_emit_cstring("%lo(");
91 be_gas_emit_entity(entity);
92 if (attr->immediate_value != 0) {
93 be_emit_irprintf("%+d", attr->immediate_value);
99 void sparc_emit_high_immediate(const ir_node *node)
101 const sparc_attr_t *attr = get_sparc_attr_const(node);
102 ir_entity *entity = attr->immediate_value_entity;
104 if (entity == NULL) {
105 uint32_t value = (uint32_t) attr->immediate_value;
106 be_emit_irprintf("%%hi(0x%X)", value);
108 if (get_entity_owner(entity) == get_tls_type()) {
109 be_emit_cstring("%tle_hix22(");
111 be_emit_cstring("%hi(");
113 be_gas_emit_entity(entity);
114 if (attr->immediate_value != 0) {
115 be_emit_irprintf("%+d", attr->immediate_value);
121 void sparc_emit_source_register(const ir_node *node, int pos)
123 const arch_register_t *reg = arch_get_irn_register_in(node, pos);
125 be_emit_string(arch_register_get_name(reg));
128 void sparc_emit_dest_register(const ir_node *node, int pos)
130 const arch_register_t *reg = arch_get_irn_register_out(node, pos);
132 be_emit_string(arch_register_get_name(reg));
136 * Emits either a imm or register depending on arity of node
138 * @param register no (-1 if no register)
140 void sparc_emit_reg_or_imm(const ir_node *node, int pos)
142 if (arch_get_irn_flags(node) & ((arch_irn_flags_t)sparc_arch_irn_flag_immediate_form)) {
143 // we have a imm input
144 sparc_emit_immediate(node);
147 sparc_emit_source_register(node, pos);
154 void sparc_emit_offset(const ir_node *node, int offset_node_pos)
156 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
158 if (attr->is_reg_reg) {
159 assert(!attr->is_frame_entity);
160 assert(attr->base.immediate_value == 0);
161 assert(attr->base.immediate_value_entity == NULL);
163 sparc_emit_source_register(node, offset_node_pos);
164 } else if (attr->is_frame_entity) {
165 int32_t offset = attr->base.immediate_value;
167 assert(sparc_is_value_imm_encodeable(offset));
168 be_emit_irprintf("%+ld", offset);
170 } else if (attr->base.immediate_value != 0
171 || attr->base.immediate_value_entity != NULL) {
173 sparc_emit_immediate(node);
177 void sparc_emit_source_reg_and_offset(const ir_node *node, int regpos,
180 const arch_register_t *reg = arch_get_irn_register_in(node, regpos);
181 const sparc_load_store_attr_t *attr;
184 if (reg == &sparc_registers[REG_SP]) {
185 attr = get_sparc_load_store_attr_const(node);
186 if (!attr->is_reg_reg
187 && attr->base.immediate_value < SPARC_SAVE_AREA_SIZE) {
189 ir_fprintf(stderr, "warning: emitting stack pointer relative load/store with offset < %d\n", SPARC_SAVE_AREA_SIZE);
194 sparc_emit_source_register(node, regpos);
195 sparc_emit_offset(node, offpos);
198 void sparc_emit_float_load_store_mode(const ir_node *node)
200 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
201 ir_mode *mode = attr->load_store_mode;
202 int bits = get_mode_size_bits(mode);
204 assert(mode_is_float(mode));
208 case 64: be_emit_char('d'); return;
209 case 128: be_emit_char('q'); return;
211 panic("invalid float load/store mode %+F", mode);
215 * Emit load mode char
217 void sparc_emit_load_mode(const ir_node *node)
219 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
220 ir_mode *mode = attr->load_store_mode;
221 int bits = get_mode_size_bits(mode);
222 bool is_signed = mode_is_signed(mode);
225 be_emit_string(is_signed ? "sh" : "uh");
226 } else if (bits == 8) {
227 be_emit_string(is_signed ? "sb" : "ub");
228 } else if (bits == 64) {
236 * Emit store mode char
238 void sparc_emit_store_mode(const ir_node *node)
240 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
241 ir_mode *mode = attr->load_store_mode;
242 int bits = get_mode_size_bits(mode);
246 } else if (bits == 8) {
248 } else if (bits == 64) {
255 static void emit_fp_suffix(const ir_mode *mode)
257 unsigned bits = get_mode_size_bits(mode);
258 assert(mode_is_float(mode));
262 } else if (bits == 64) {
264 } else if (bits == 128) {
267 panic("invalid FP mode");
271 void sparc_emit_fp_conv_source(const ir_node *node)
273 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
274 emit_fp_suffix(attr->src_mode);
277 void sparc_emit_fp_conv_destination(const ir_node *node)
279 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
280 emit_fp_suffix(attr->dest_mode);
284 * emits the FP mode suffix char
286 void sparc_emit_fp_mode_suffix(const ir_node *node)
288 const sparc_fp_attr_t *attr = get_sparc_fp_attr_const(node);
289 emit_fp_suffix(attr->fp_mode);
292 static ir_node *get_jump_target(const ir_node *jump)
294 return (ir_node*)get_irn_link(jump);
298 * Returns the target label for a control flow node.
300 static void sparc_emit_cfop_target(const ir_node *node)
302 ir_node *block = get_jump_target(node);
303 be_gas_emit_block_name(block);
307 * returns true if a sparc_call calls a register and not an immediate
309 static bool is_sparc_reg_call(const ir_node *node)
311 const sparc_attr_t *attr = get_sparc_attr_const(node);
312 return attr->immediate_value_entity == NULL;
315 static int get_sparc_Call_dest_addr_pos(const ir_node *node)
317 assert(is_sparc_reg_call(node));
318 return get_irn_arity(node)-1;
321 static bool ba_is_fallthrough(const ir_node *node)
323 ir_node *block = get_nodes_block(node);
324 ir_node *next_block = (ir_node*)get_irn_link(block);
325 return get_irn_link(node) == next_block;
328 static bool is_no_instruction(const ir_node *node)
330 /* copies are nops if src_reg == dest_reg */
331 if (be_is_Copy(node) || be_is_CopyKeep(node)) {
332 const arch_register_t *src_reg = arch_get_irn_register_in(node, 0);
333 const arch_register_t *dest_reg = arch_get_irn_register_out(node, 0);
335 if (src_reg == dest_reg)
338 if (be_is_IncSP(node) && be_get_IncSP_offset(node) == 0)
340 /* Ba is not emitted if it is a simple fallthrough */
341 if (is_sparc_Ba(node) && ba_is_fallthrough(node))
344 return be_is_Keep(node) || be_is_Start(node) || is_Phi(node);
347 static bool has_delay_slot(const ir_node *node)
349 if (is_sparc_Ba(node)) {
350 return !ba_is_fallthrough(node);
353 return arch_get_irn_flags(node) & sparc_arch_irn_flag_has_delay_slot;
356 /** returns true if the emitter for this sparc node can produce more than one
357 * actual sparc instruction.
358 * Usually it is a bad sign if we have to add instructions here. We should
359 * rather try to get them lowered down. So we can actually put them into
360 * delay slots and make them more accessible to the scheduler.
362 static bool emits_multiple_instructions(const ir_node *node)
364 if (has_delay_slot(node))
367 if (is_sparc_Call(node)) {
368 return arch_get_irn_flags(node) & sparc_arch_irn_flag_aggregate_return;
371 return is_sparc_SMulh(node) || is_sparc_UMulh(node)
372 || is_sparc_SDiv(node) || is_sparc_UDiv(node)
373 || be_is_MemPerm(node) || be_is_Perm(node)
374 || is_sparc_SubSP(node);
377 static bool uses_reg(const ir_node *node, const arch_register_t *reg)
379 int arity = get_irn_arity(node);
382 for (i = 0; i < arity; ++i) {
383 const arch_register_t *in_reg = arch_get_irn_register_in(node, i);
390 static bool writes_reg(const ir_node *node, const arch_register_t *reg)
392 unsigned n_outs = arch_get_irn_n_outs(node);
394 for (o = 0; o < n_outs; ++o) {
395 const arch_register_t *out_reg = arch_get_irn_register_out(node, o);
402 static bool can_move_into_delayslot(const ir_node *node, const ir_node *to)
404 if (!be_can_move_before(heights, node, to))
407 if (is_sparc_Call(to)) {
409 /** all deps are used after the delay slot so, we're fine */
410 if (!is_sparc_reg_call(to))
413 check = get_irn_n(to, get_sparc_Call_dest_addr_pos(to));
414 if (skip_Proj(check) == node)
417 /* the Call also destroys the value of %o7, but since this is
418 * currently marked as ignore register in the backend, it
419 * should never be used by the instruction in the delay slot. */
420 if (uses_reg(node, &sparc_registers[REG_O7]))
423 } else if (is_sparc_Return(to)) {
424 /* return uses the value of %o7, all other values are not
425 * immediately used */
426 if (writes_reg(node, &sparc_registers[REG_O7]))
430 /* the node must not use our computed values */
431 int arity = get_irn_arity(to);
433 for (i = 0; i < arity; ++i) {
434 ir_node *in = get_irn_n(to, i);
435 if (skip_Proj(in) == node)
443 * search for an instruction that can fill the delay slot of @p node
445 static const ir_node *pick_delay_slot_for(const ir_node *node)
447 const ir_node *schedpoint = node;
449 /* currently we don't track which registers are still alive, so we can't
450 * pick any other instructions other than the one directly preceding */
451 static const unsigned PICK_DELAY_SLOT_MAX_DISTANCE = 10;
453 assert(has_delay_slot(node));
455 while (sched_has_prev(schedpoint)) {
456 schedpoint = sched_prev(schedpoint);
458 if (has_delay_slot(schedpoint))
461 /* skip things which don't really result in instructions */
462 if (is_no_instruction(schedpoint))
465 if (tries++ >= PICK_DELAY_SLOT_MAX_DISTANCE)
468 if (emits_multiple_instructions(schedpoint))
471 if (!can_move_into_delayslot(schedpoint, node))
474 /* found something */
482 * Emits code for stack space management
484 static void emit_be_IncSP(const ir_node *irn)
486 int offset = be_get_IncSP_offset(irn);
491 /* SPARC stack grows downwards */
494 be_emit_cstring("sub ");
497 be_emit_cstring("add ");
500 sparc_emit_source_register(irn, 0);
501 be_emit_irprintf(", %d", -offset);
502 be_emit_cstring(", ");
503 sparc_emit_dest_register(irn, 0);
504 be_emit_finish_line_gas(irn);
508 * Emits code for stack space management.
510 static void emit_sparc_SubSP(const ir_node *irn)
513 be_emit_cstring("sub ");
514 sparc_emit_source_register(irn, 0);
515 be_emit_cstring(", ");
516 sparc_emit_reg_or_imm(irn, 1);
517 be_emit_cstring(", ");
518 sparc_emit_dest_register(irn, 0);
519 be_emit_finish_line_gas(irn);
522 be_emit_cstring("add ");
523 sparc_emit_source_register(irn, 0);
524 be_emit_irprintf(", %u, ", SPARC_MIN_STACKSIZE);
525 sparc_emit_dest_register(irn, 1);
526 be_emit_finish_line_gas(irn);
530 * emits code for mulh
532 static void emit_sparc_Mulh(const ir_node *irn)
535 if (is_sparc_UMulh(irn)) {
538 assert(is_sparc_SMulh(irn));
541 be_emit_cstring("mul ");
543 sparc_emit_source_register(irn, 0);
544 be_emit_cstring(", ");
545 sparc_emit_reg_or_imm(irn, 1);
546 be_emit_cstring(", ");
547 sparc_emit_dest_register(irn, 0);
548 be_emit_finish_line_gas(irn);
550 // our result is in the y register now
551 // we just copy it to the assigned target reg
553 be_emit_cstring("mov %y, ");
554 sparc_emit_dest_register(irn, 0);
555 be_emit_finish_line_gas(irn);
558 static void fill_delay_slot(void)
560 emitting_delay_slot = true;
561 if (delay_slot_filler != NULL) {
562 sparc_emit_node(delay_slot_filler);
563 delay_slot_filler = NULL;
566 be_emit_cstring("nop\n");
567 be_emit_write_line();
569 emitting_delay_slot = false;
572 static void emit_sparc_Div(const ir_node *node, bool is_signed)
574 /* can we get the delay count of the wr instruction somewhere? */
575 unsigned wry_delay_count = 3;
579 be_emit_cstring("wr ");
580 sparc_emit_source_register(node, 0);
581 be_emit_cstring(", 0, %y");
582 be_emit_finish_line_gas(node);
584 for (i = 0; i < wry_delay_count; ++i) {
589 be_emit_irprintf("%s ", is_signed ? "sdiv" : "udiv");
590 sparc_emit_source_register(node, 1);
591 be_emit_cstring(", ");
592 sparc_emit_reg_or_imm(node, 2);
593 be_emit_cstring(", ");
594 sparc_emit_dest_register(node, 0);
595 be_emit_finish_line_gas(node);
598 static void emit_sparc_SDiv(const ir_node *node)
600 emit_sparc_Div(node, true);
603 static void emit_sparc_UDiv(const ir_node *node)
605 emit_sparc_Div(node, false);
608 static void emit_sparc_Call(const ir_node *node)
611 be_emit_cstring("call ");
612 if (is_sparc_reg_call(node)) {
613 int dest_addr = get_sparc_Call_dest_addr_pos(node);
614 sparc_emit_source_register(node, dest_addr);
616 const sparc_attr_t *attr = get_sparc_attr_const(node);
617 ir_entity *entity = attr->immediate_value_entity;
618 be_gas_emit_entity(entity);
619 if (attr->immediate_value != 0) {
620 be_emit_irprintf("%+d", attr->immediate_value);
622 be_emit_cstring(", 0");
624 be_emit_finish_line_gas(node);
628 if (arch_get_irn_flags(node) & sparc_arch_irn_flag_aggregate_return) {
630 be_emit_cstring("unimp 8\n");
631 be_emit_write_line();
635 static void emit_be_Perm(const ir_node *irn)
638 be_emit_cstring("xor ");
639 sparc_emit_source_register(irn, 1);
640 be_emit_cstring(", ");
641 sparc_emit_source_register(irn, 0);
642 be_emit_cstring(", ");
643 sparc_emit_source_register(irn, 0);
644 be_emit_finish_line_gas(NULL);
647 be_emit_cstring("xor ");
648 sparc_emit_source_register(irn, 1);
649 be_emit_cstring(", ");
650 sparc_emit_source_register(irn, 0);
651 be_emit_cstring(", ");
652 sparc_emit_source_register(irn, 1);
653 be_emit_finish_line_gas(NULL);
656 be_emit_cstring("xor ");
657 sparc_emit_source_register(irn, 1);
658 be_emit_cstring(", ");
659 sparc_emit_source_register(irn, 0);
660 be_emit_cstring(", ");
661 sparc_emit_source_register(irn, 0);
662 be_emit_finish_line_gas(irn);
665 /* The stack pointer must always be SPARC_STACK_ALIGNMENT bytes aligned, so get
666 * the next bigger integer that's evenly divisible by it. */
667 static unsigned get_aligned_sp_change(const unsigned num_regs)
669 const unsigned bytes = num_regs * SPARC_REGISTER_SIZE;
670 return round_up2(bytes, SPARC_STACK_ALIGNMENT);
673 /* Spill register l0 or both l0 and l1, depending on n_spilled and n_to_spill.*/
674 static void memperm_emit_spill_registers(const ir_node *node, int n_spilled,
677 assert(n_spilled < n_to_spill);
679 if (n_spilled == 0) {
680 /* We always reserve stack space for two registers because during copy
681 * processing we don't know yet if we also need to handle a cycle which
682 * needs two registers. More complicated code in emit_MemPerm would
683 * prevent wasting SPARC_REGISTER_SIZE bytes of stack space but
684 * it is not worth the worse readability of emit_MemPerm. */
686 /* Keep stack pointer aligned. */
687 unsigned sp_change = get_aligned_sp_change(2);
689 be_emit_irprintf("sub %%sp, %u, %%sp", sp_change);
690 be_emit_finish_line_gas(node);
692 /* Spill register l0. */
694 be_emit_irprintf("st %%l0, [%%sp%+d]", SPARC_MIN_STACKSIZE);
695 be_emit_finish_line_gas(node);
698 if (n_to_spill == 2) {
699 /* Spill register l1. */
701 be_emit_irprintf("st %%l1, [%%sp%+d]", SPARC_MIN_STACKSIZE + SPARC_REGISTER_SIZE);
702 be_emit_finish_line_gas(node);
706 /* Restore register l0 or both l0 and l1, depending on n_spilled. */
707 static void memperm_emit_restore_registers(const ir_node *node, int n_spilled)
711 if (n_spilled == 2) {
712 /* Restore register l1. */
714 be_emit_irprintf("ld [%%sp%+d], %%l1", SPARC_MIN_STACKSIZE + SPARC_REGISTER_SIZE);
715 be_emit_finish_line_gas(node);
718 /* Restore register l0. */
720 be_emit_irprintf("ld [%%sp%+d], %%l0", SPARC_MIN_STACKSIZE);
721 be_emit_finish_line_gas(node);
723 /* Restore stack pointer. */
724 sp_change = get_aligned_sp_change(2);
726 be_emit_irprintf("add %%sp, %u, %%sp", sp_change);
727 be_emit_finish_line_gas(node);
730 /* Emit code to copy in_ent to out_ent. Only uses l0. */
731 static void memperm_emit_copy(const ir_node *node, ir_entity *in_ent,
734 ir_graph *irg = get_irn_irg(node);
735 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
736 int off_in = be_get_stack_entity_offset(layout, in_ent, 0);
737 int off_out = be_get_stack_entity_offset(layout, out_ent, 0);
739 /* Load from input entity. */
741 be_emit_irprintf("ld [%%fp%+d], %%l0", off_in);
742 be_emit_finish_line_gas(node);
744 /* Store to output entity. */
746 be_emit_irprintf("st %%l0, [%%fp%+d]", off_out);
747 be_emit_finish_line_gas(node);
750 /* Emit code to swap ent1 and ent2. Uses l0 and l1. */
751 static void memperm_emit_swap(const ir_node *node, ir_entity *ent1,
754 ir_graph *irg = get_irn_irg(node);
755 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
756 int off1 = be_get_stack_entity_offset(layout, ent1, 0);
757 int off2 = be_get_stack_entity_offset(layout, ent2, 0);
759 /* Load from first input entity. */
761 be_emit_irprintf("ld [%%fp%+d], %%l0", off1);
762 be_emit_finish_line_gas(node);
764 /* Load from second input entity. */
766 be_emit_irprintf("ld [%%fp%+d], %%l1", off2);
767 be_emit_finish_line_gas(node);
769 /* Store first value to second output entity. */
771 be_emit_irprintf("st %%l0, [%%fp%+d]", off2);
772 be_emit_finish_line_gas(node);
774 /* Store second value to first output entity. */
776 be_emit_irprintf("st %%l1, [%%fp%+d]", off1);
777 be_emit_finish_line_gas(node);
780 /* Find the index of ent in ents or return -1 if not found. */
781 static int get_index(ir_entity **ents, int n, ir_entity *ent)
785 for (i = 0; i < n; ++i)
793 * Emit code for a MemPerm node.
795 * Analyze MemPerm for copy chains and cyclic swaps and resolve them using
797 * This function is conceptually very similar to permute_values in
800 static void emit_be_MemPerm(const ir_node *node)
802 int memperm_arity = be_get_MemPerm_entity_arity(node);
803 /* Upper limit for the number of participating entities is twice the
804 * arity, e.g., for a simple copying MemPerm node with one input/output. */
805 int max_size = 2 * memperm_arity;
806 ir_entity **entities = ALLOCANZ(ir_entity *, max_size);
807 /* sourceof contains the input entity for each entity. If an entity is
808 * never used as an output, its entry in sourceof is a fix point. */
809 int *sourceof = ALLOCANZ(int, max_size);
810 /* n_users counts how many output entities use this entity as their input.*/
811 int *n_users = ALLOCANZ(int, max_size);
812 /* n_spilled records the number of spilled registers, either 1 or 2. */
816 /* This implementation currently only works with frame pointers. */
817 ir_graph *irg = get_irn_irg(node);
818 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
819 assert(!layout->sp_relative && "MemPerms currently do not work without frame pointers");
821 for (i = 0; i < max_size; ++i) {
825 for (i = n = 0; i < memperm_arity; ++i) {
826 ir_entity *out = be_get_MemPerm_out_entity(node, i);
827 ir_entity *in = be_get_MemPerm_in_entity(node, i);
828 int oidx; /* Out index */
829 int iidx; /* In index */
831 /* Insert into entities to be able to operate on unique indices. */
832 if (get_index(entities, n, out) == -1)
834 if (get_index(entities, n, in) == -1)
837 oidx = get_index(entities, n, out);
838 iidx = get_index(entities, n, in);
840 sourceof[oidx] = iidx; /* Remember the source. */
841 ++n_users[iidx]; /* Increment number of users of this entity. */
844 /* First do all the copies. */
845 for (oidx = 0; oidx < n; /* empty */) {
846 int iidx = sourceof[oidx];
848 /* Nothing to do for fix points.
849 * Also, if entities[oidx] is used as an input by another copy, we
850 * can't overwrite entities[oidx] yet.*/
851 if (iidx == oidx || n_users[oidx] > 0) {
856 /* We found the end of a 'chain', so do the copy. */
857 if (n_spilled == 0) {
858 memperm_emit_spill_registers(node, n_spilled, /*n_to_spill=*/1);
861 memperm_emit_copy(node, entities[iidx], entities[oidx]);
864 sourceof[oidx] = oidx;
866 assert(n_users[iidx] > 0);
867 /* Decrementing the number of users might enable us to do another
871 if (iidx < oidx && n_users[iidx] == 0) {
878 /* The rest are cycles. */
879 for (oidx = 0; oidx < n; /* empty */) {
880 int iidx = sourceof[oidx];
883 /* Nothing to do for fix points. */
889 assert(n_users[iidx] == 1);
891 /* Swap the two values to resolve the cycle. */
893 memperm_emit_spill_registers(node, n_spilled, /*n_to_spill=*/2);
896 memperm_emit_swap(node, entities[iidx], entities[oidx]);
898 tidx = sourceof[iidx];
900 sourceof[iidx] = iidx;
902 /* The source of oidx is now the old source of iidx, because we swapped
903 * the two entities. */
904 sourceof[oidx] = tidx;
908 /* Only fix points should remain. */
909 for (i = 0; i < max_size; ++i) {
910 assert(sourceof[i] == i);
914 assert(n_spilled > 0 && "Useless MemPerm node");
916 memperm_emit_restore_registers(node, n_spilled);
919 static void emit_sparc_Return(const ir_node *node)
921 ir_graph *irg = get_irn_irg(node);
922 ir_entity *entity = get_irg_entity(irg);
923 ir_type *type = get_entity_type(entity);
925 const char *destreg = "%o7";
927 /* hack: we don't explicitely model register changes because of the
928 * restore node. So we have to do it manually here */
929 if (delay_slot_filler != NULL &&
930 (is_sparc_Restore(delay_slot_filler)
931 || is_sparc_RestoreZero(delay_slot_filler))) {
935 be_emit_cstring("jmp ");
936 be_emit_string(destreg);
937 if (get_method_calling_convention(type) & cc_compound_ret) {
938 be_emit_cstring("+12");
940 be_emit_cstring("+8");
942 be_emit_finish_line_gas(node);
946 static const arch_register_t *map_i_to_o_reg(const arch_register_t *reg)
948 unsigned idx = reg->global_index;
949 if (idx < REG_I0 || idx > REG_I7)
951 idx += REG_O0 - REG_I0;
952 assert(REG_O0 <= idx && idx <= REG_O7);
953 return &sparc_registers[idx];
956 static void emit_sparc_Restore(const ir_node *node)
958 const arch_register_t *destreg
959 = arch_get_irn_register_out(node, pn_sparc_Restore_res);
961 be_emit_cstring("restore ");
962 sparc_emit_source_register(node, 2);
963 be_emit_cstring(", ");
964 sparc_emit_reg_or_imm(node, 3);
965 be_emit_cstring(", ");
966 destreg = map_i_to_o_reg(destreg);
968 be_emit_string(arch_register_get_name(destreg));
969 be_emit_finish_line_gas(node);
972 static void emit_sparc_FrameAddr(const ir_node *node)
974 const sparc_attr_t *attr = get_sparc_attr_const(node);
975 int32_t offset = attr->immediate_value;
979 be_emit_cstring("add ");
980 sparc_emit_source_register(node, 0);
981 be_emit_cstring(", ");
982 assert(sparc_is_value_imm_encodeable(offset));
983 be_emit_irprintf("%ld", offset);
985 be_emit_cstring("sub ");
986 sparc_emit_source_register(node, 0);
987 be_emit_cstring(", ");
988 assert(sparc_is_value_imm_encodeable(-offset));
989 be_emit_irprintf("%ld", -offset);
992 be_emit_cstring(", ");
993 sparc_emit_dest_register(node, 0);
994 be_emit_finish_line_gas(node);
997 static const char *get_icc_unsigned(ir_relation relation)
999 switch (relation & (ir_relation_less_equal_greater)) {
1000 case ir_relation_false: return "bn";
1001 case ir_relation_equal: return "be";
1002 case ir_relation_less: return "blu";
1003 case ir_relation_less_equal: return "bleu";
1004 case ir_relation_greater: return "bgu";
1005 case ir_relation_greater_equal: return "bgeu";
1006 case ir_relation_less_greater: return "bne";
1007 case ir_relation_less_equal_greater: return "ba";
1008 default: panic("Cmp has unsupported relation");
1012 static const char *get_icc_signed(ir_relation relation)
1014 switch (relation & (ir_relation_less_equal_greater)) {
1015 case ir_relation_false: return "bn";
1016 case ir_relation_equal: return "be";
1017 case ir_relation_less: return "bl";
1018 case ir_relation_less_equal: return "ble";
1019 case ir_relation_greater: return "bg";
1020 case ir_relation_greater_equal: return "bge";
1021 case ir_relation_less_greater: return "bne";
1022 case ir_relation_less_equal_greater: return "ba";
1023 default: panic("Cmp has unsupported relation");
1027 static const char *get_fcc(ir_relation relation)
1030 case ir_relation_false: return "fbn";
1031 case ir_relation_equal: return "fbe";
1032 case ir_relation_less: return "fbl";
1033 case ir_relation_less_equal: return "fble";
1034 case ir_relation_greater: return "fbg";
1035 case ir_relation_greater_equal: return "fbge";
1036 case ir_relation_less_greater: return "fblg";
1037 case ir_relation_less_equal_greater: return "fbo";
1038 case ir_relation_unordered: return "fbu";
1039 case ir_relation_unordered_equal: return "fbue";
1040 case ir_relation_unordered_less: return "fbul";
1041 case ir_relation_unordered_less_equal: return "fbule";
1042 case ir_relation_unordered_greater: return "fbug";
1043 case ir_relation_unordered_greater_equal: return "fbuge";
1044 case ir_relation_unordered_less_greater: return "fbne";
1045 case ir_relation_true: return "fba";
1047 panic("invalid relation");
1050 typedef const char* (*get_cc_func)(ir_relation relation);
1052 static void emit_sparc_branch(const ir_node *node, get_cc_func get_cc)
1054 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
1055 ir_relation relation = attr->relation;
1056 const ir_node *proj_true = NULL;
1057 const ir_node *proj_false = NULL;
1058 const ir_node *block;
1059 const ir_node *next_block;
1061 foreach_out_edge(node, edge) {
1062 ir_node *proj = get_edge_src_irn(edge);
1063 long nr = get_Proj_proj(proj);
1064 if (nr == pn_Cond_true) {
1071 /* for now, the code works for scheduled and non-schedules blocks */
1072 block = get_nodes_block(node);
1074 /* we have a block schedule */
1075 next_block = (ir_node*)get_irn_link(block);
1077 if (get_irn_link(proj_true) == next_block) {
1078 /* exchange both proj's so the second one can be omitted */
1079 const ir_node *t = proj_true;
1081 proj_true = proj_false;
1083 relation = get_negated_relation(relation);
1086 /* emit the true proj */
1087 sparc_emit_indent();
1088 be_emit_string(get_cc(relation));
1090 sparc_emit_cfop_target(proj_true);
1091 be_emit_finish_line_gas(proj_true);
1095 if (get_irn_link(proj_false) == next_block) {
1096 if (be_options.verbose_asm) {
1097 sparc_emit_indent();
1098 be_emit_cstring("/* fallthrough to ");
1099 sparc_emit_cfop_target(proj_false);
1100 be_emit_cstring(" */");
1101 be_emit_finish_line_gas(proj_false);
1104 sparc_emit_indent();
1105 be_emit_cstring("ba ");
1106 sparc_emit_cfop_target(proj_false);
1107 be_emit_finish_line_gas(proj_false);
1112 static void emit_sparc_Bicc(const ir_node *node)
1114 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
1115 bool is_unsigned = attr->is_unsigned;
1116 emit_sparc_branch(node, is_unsigned ? get_icc_unsigned : get_icc_signed);
1119 static void emit_sparc_fbfcc(const ir_node *node)
1121 /* if the flags producing node was immediately in front of us, emit
1123 ir_node *flags = get_irn_n(node, n_sparc_fbfcc_flags);
1124 ir_node *prev = sched_prev(node);
1125 if (is_Block(prev)) {
1126 /* TODO: when the flags come from another block, then we have to do
1127 * more complicated tests to see wether the flag producing node is
1128 * potentially in front of us (could happen for fallthroughs) */
1129 panic("TODO: fbfcc flags come from other block");
1131 if (skip_Proj(flags) == prev) {
1132 sparc_emit_indent();
1133 be_emit_cstring("nop\n");
1135 emit_sparc_branch(node, get_fcc);
1138 static void emit_sparc_Ba(const ir_node *node)
1140 if (ba_is_fallthrough(node)) {
1141 if (be_options.verbose_asm) {
1142 sparc_emit_indent();
1143 be_emit_cstring("/* fallthrough to ");
1144 sparc_emit_cfop_target(node);
1145 be_emit_cstring(" */");
1146 be_emit_finish_line_gas(node);
1149 sparc_emit_indent();
1150 be_emit_cstring("ba ");
1151 sparc_emit_cfop_target(node);
1152 be_emit_finish_line_gas(node);
1157 static void emit_sparc_SwitchJmp(const ir_node *node)
1159 const sparc_switch_jmp_attr_t *attr = get_sparc_switch_jmp_attr_const(node);
1161 sparc_emit_indent();
1162 be_emit_cstring("jmp ");
1163 sparc_emit_source_register(node, 0);
1164 be_emit_finish_line_gas(node);
1167 be_emit_jump_table(node, attr->table, attr->table_entity, get_jump_target);
1170 static void emit_fmov(const ir_node *node, const arch_register_t *src_reg,
1171 const arch_register_t *dst_reg)
1173 sparc_emit_indent();
1174 be_emit_cstring("fmovs %");
1175 be_emit_string(arch_register_get_name(src_reg));
1176 be_emit_cstring(", %");
1177 be_emit_string(arch_register_get_name(dst_reg));
1178 be_emit_finish_line_gas(node);
1181 static const arch_register_t *get_next_fp_reg(const arch_register_t *reg)
1183 unsigned idx = reg->global_index;
1184 assert(reg == &sparc_registers[idx]);
1186 assert(idx - REG_F0 < N_sparc_fp_REGS);
1187 return &sparc_registers[idx];
1190 static void emit_be_Copy(const ir_node *node)
1192 ir_mode *mode = get_irn_mode(node);
1193 const arch_register_t *src_reg = arch_get_irn_register_in(node, 0);
1194 const arch_register_t *dst_reg = arch_get_irn_register_out(node, 0);
1196 if (src_reg == dst_reg)
1199 if (mode_is_float(mode)) {
1200 unsigned bits = get_mode_size_bits(mode);
1201 int n = bits > 32 ? bits > 64 ? 3 : 1 : 0;
1203 emit_fmov(node, src_reg, dst_reg);
1204 for (i = 0; i < n; ++i) {
1205 src_reg = get_next_fp_reg(src_reg);
1206 dst_reg = get_next_fp_reg(dst_reg);
1207 emit_fmov(node, src_reg, dst_reg);
1209 } else if (mode_is_data(mode)) {
1210 sparc_emit_indent();
1211 be_emit_cstring("mov ");
1212 sparc_emit_source_register(node, 0);
1213 be_emit_cstring(", ");
1214 sparc_emit_dest_register(node, 0);
1215 be_emit_finish_line_gas(node);
1217 panic("emit_be_Copy: invalid mode");
1221 static void emit_nothing(const ir_node *irn)
1226 typedef void (*emit_func) (const ir_node *);
1228 static inline void set_emitter(ir_op *op, emit_func sparc_emit_node)
1230 op->ops.generic = (op_func)sparc_emit_node;
1234 * Enters the emitter functions for handled nodes into the generic
1235 * pointer of an opcode.
1237 static void sparc_register_emitters(void)
1239 /* first clear the generic function pointer for all ops */
1240 ir_clear_opcodes_generic_func();
1241 /* register all emitter functions defined in spec */
1242 sparc_register_spec_emitters();
1244 /* custom emitter */
1245 set_emitter(op_be_Copy, emit_be_Copy);
1246 set_emitter(op_be_CopyKeep, emit_be_Copy);
1247 set_emitter(op_be_IncSP, emit_be_IncSP);
1248 set_emitter(op_be_MemPerm, emit_be_MemPerm);
1249 set_emitter(op_be_Perm, emit_be_Perm);
1250 set_emitter(op_sparc_Ba, emit_sparc_Ba);
1251 set_emitter(op_sparc_Bicc, emit_sparc_Bicc);
1252 set_emitter(op_sparc_Call, emit_sparc_Call);
1253 set_emitter(op_sparc_fbfcc, emit_sparc_fbfcc);
1254 set_emitter(op_sparc_FrameAddr, emit_sparc_FrameAddr);
1255 set_emitter(op_sparc_SMulh, emit_sparc_Mulh);
1256 set_emitter(op_sparc_SubSP, emit_sparc_SubSP);
1257 set_emitter(op_sparc_UMulh, emit_sparc_Mulh);
1258 set_emitter(op_sparc_Restore, emit_sparc_Restore);
1259 set_emitter(op_sparc_Return, emit_sparc_Return);
1260 set_emitter(op_sparc_SDiv, emit_sparc_SDiv);
1261 set_emitter(op_sparc_SwitchJmp, emit_sparc_SwitchJmp);
1262 set_emitter(op_sparc_UDiv, emit_sparc_UDiv);
1264 /* no need to emit anything for the following nodes */
1265 set_emitter(op_be_Keep, emit_nothing);
1266 set_emitter(op_sparc_Start, emit_nothing);
1267 set_emitter(op_Phi, emit_nothing);
1271 * Emits code for a node.
1273 static void sparc_emit_node(const ir_node *node)
1275 ir_op *op = get_irn_op(node);
1277 if (op->ops.generic) {
1278 emit_func func = (emit_func) op->ops.generic;
1279 be_dwarf_location(get_irn_dbg_info(node));
1282 panic("No emit handler for node %+F (graph %+F)\n", node,
1287 static ir_node *find_next_delay_slot(ir_node *from)
1289 ir_node *schedpoint = from;
1290 while (!has_delay_slot(schedpoint)) {
1291 if (!sched_has_next(schedpoint))
1293 schedpoint = sched_next(schedpoint);
1298 static bool block_needs_label(const ir_node *block, const ir_node *sched_prev)
1302 if (get_Block_entity(block) != NULL)
1305 n_cfgpreds = get_Block_n_cfgpreds(block);
1306 if (n_cfgpreds == 0) {
1308 } else if (n_cfgpreds > 1) {
1311 ir_node *cfgpred = get_Block_cfgpred(block, 0);
1312 ir_node *cfgpred_block = get_nodes_block(cfgpred);
1313 if (is_Proj(cfgpred) && is_sparc_SwitchJmp(get_Proj_pred(cfgpred)))
1315 return sched_prev != cfgpred_block || get_irn_link(cfgpred) != block;
1320 * Walks over the nodes in a block connected by scheduling edges
1321 * and emits code for each node.
1323 static void sparc_emit_block(ir_node *block, ir_node *prev)
1325 ir_node *next_delay_slot;
1326 bool needs_label = block_needs_label(block, prev);
1328 be_gas_begin_block(block, needs_label);
1330 next_delay_slot = find_next_delay_slot(sched_first(block));
1331 if (next_delay_slot != NULL)
1332 delay_slot_filler = pick_delay_slot_for(next_delay_slot);
1334 sched_foreach(block, node) {
1335 if (node == delay_slot_filler) {
1339 sparc_emit_node(node);
1341 if (node == next_delay_slot) {
1342 assert(delay_slot_filler == NULL);
1343 next_delay_slot = find_next_delay_slot(sched_next(node));
1344 if (next_delay_slot != NULL)
1345 delay_slot_filler = pick_delay_slot_for(next_delay_slot);
1351 * Emits code for function start.
1353 static void sparc_emit_func_prolog(ir_graph *irg)
1355 ir_entity *entity = get_irg_entity(irg);
1356 be_gas_emit_function_prolog(entity, 4, NULL);
1360 * Emits code for function end
1362 static void sparc_emit_func_epilog(ir_graph *irg)
1364 ir_entity *entity = get_irg_entity(irg);
1365 be_gas_emit_function_epilog(entity);
1368 static void sparc_gen_labels(ir_node *block, void *env)
1371 int n = get_Block_n_cfgpreds(block);
1374 for (n--; n >= 0; n--) {
1375 pred = get_Block_cfgpred(block, n);
1376 set_irn_link(pred, block); // link the pred of a block (which is a jmp)
1380 void sparc_emit_routine(ir_graph *irg)
1382 ir_node **block_schedule;
1386 heights = heights_new(irg);
1388 /* register all emitter functions */
1389 sparc_register_emitters();
1391 /* create the block schedule. For now, we don't need it earlier. */
1392 block_schedule = be_create_block_schedule(irg);
1394 sparc_emit_func_prolog(irg);
1395 irg_block_walk_graph(irg, sparc_gen_labels, NULL, NULL);
1397 /* inject block scheduling links & emit code of each block */
1398 n = ARR_LEN(block_schedule);
1399 for (i = 0; i < n; ++i) {
1400 ir_node *block = block_schedule[i];
1401 ir_node *next_block = i+1 < n ? block_schedule[i+1] : NULL;
1402 set_irn_link(block, next_block);
1405 for (i = 0; i < n; ++i) {
1406 ir_node *block = block_schedule[i];
1407 ir_node *prev = i>=1 ? block_schedule[i-1] : NULL;
1408 if (block == get_irg_end_block(irg))
1410 sparc_emit_block(block, prev);
1413 /* emit function epilog */
1414 sparc_emit_func_epilog(irg);
1416 heights_free(heights);
1419 void sparc_init_emitter(void)
1421 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.emit");