2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief emit assembler for a backend graph
40 #include "raw_bitset.h"
43 #include "../besched.h"
44 #include "../beblocksched.h"
46 #include "../begnuas.h"
47 #include "../be_dbgout.h"
48 #include "../benode.h"
50 #include "sparc_emitter.h"
51 #include "gen_sparc_emitter.h"
52 #include "sparc_nodes_attr.h"
53 #include "sparc_new_nodes.h"
54 #include "gen_sparc_regalloc_if.h"
56 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
59 * Returns the register at in position pos.
61 static const arch_register_t *get_in_reg(const ir_node *node, int pos)
64 const arch_register_t *reg = NULL;
66 assert(get_irn_arity(node) > pos && "Invalid IN position");
68 /* The out register of the operator at position pos is the
69 in register we need. */
70 op = get_irn_n(node, pos);
72 reg = arch_get_irn_register(op);
74 assert(reg && "no in register found");
79 * Returns the register at out position pos.
81 static const arch_register_t *get_out_reg(const ir_node *node, int pos)
84 const arch_register_t *reg = NULL;
86 /* 1st case: irn is not of mode_T, so it has only */
87 /* one OUT register -> good */
88 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
89 /* Proj with the corresponding projnum for the register */
91 if (get_irn_mode(node) != mode_T) {
92 reg = arch_get_irn_register(node);
93 } else if (is_sparc_irn(node)) {
94 reg = arch_irn_get_register(node, pos);
96 const ir_edge_t *edge;
98 foreach_out_edge(node, edge) {
99 proj = get_edge_src_irn(edge);
100 assert(is_Proj(proj) && "non-Proj from mode_T node");
101 if (get_Proj_proj(proj) == pos) {
102 reg = arch_get_irn_register(proj);
108 assert(reg && "no out register found");
112 void sparc_emit_immediate(const ir_node *node)
114 int const val = get_sparc_attr_const(node)->immediate_value;
115 assert(-4096 <= val && val < 4096);
116 be_emit_irprintf("%d", val);
119 void sparc_emit_source_register(const ir_node *node, int pos)
121 const arch_register_t *reg = get_in_reg(node, pos);
123 be_emit_string(arch_register_get_name(reg));
126 void sparc_emit_dest_register(const ir_node *node, int pos)
128 const arch_register_t *reg = get_out_reg(node, pos);
130 be_emit_string(arch_register_get_name(reg));
134 * Emits either a imm or register depending on arity of node
136 * @param register no (-1 if no register)
138 void sparc_emit_reg_or_imm(const ir_node *node, int pos)
140 if (get_irn_arity(node) > pos) {
142 sparc_emit_source_register(node, pos);
144 // we have a imm input
145 sparc_emit_immediate(node);
149 static bool is_stack_pointer_relative(const ir_node *node)
151 const arch_register_t *sp = &sparc_gp_regs[REG_SP];
152 return (is_sparc_St(node) && get_in_reg(node, n_sparc_St_ptr) == sp)
153 || (is_sparc_Ld(node) && get_in_reg(node, n_sparc_Ld_ptr) == sp);
159 void sparc_emit_offset(const ir_node *node)
161 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
162 long offset = attr->offset;
164 /* bad hack: the real stack stuff is behind the always-there spill
165 * space for the register window and stack */
166 if (is_stack_pointer_relative(node))
167 offset += SPARC_MIN_STACKSIZE;
169 be_emit_irprintf("%+ld", offset);
175 * Emit load mode char
177 void sparc_emit_load_mode(const ir_node *node)
179 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
180 ir_mode *mode = attr->load_store_mode;
181 int bits = get_mode_size_bits(mode);
182 bool is_signed = mode_is_signed(mode);
185 be_emit_string(is_signed ? "sh" : "uh");
186 } else if (bits == 8) {
187 be_emit_string(is_signed ? "sb" : "ub");
188 } else if (bits == 64) {
196 * Emit store mode char
198 void sparc_emit_store_mode(const ir_node *node)
200 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
201 ir_mode *mode = attr->load_store_mode;
202 int bits = get_mode_size_bits(mode);
206 } else if (bits == 8) {
208 } else if (bits == 64) {
216 * emit integer signed/unsigned prefix char
218 void sparc_emit_mode_sign_prefix(const ir_node *node)
220 ir_mode *mode = get_irn_mode(node);
221 bool is_signed = mode_is_signed(mode);
222 be_emit_string(is_signed ? "s" : "u");
226 * emit FP load mode char
228 void sparc_emit_fp_load_mode(const ir_node *node)
230 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
231 ir_mode *mode = attr->load_store_mode;
232 int bits = get_mode_size_bits(mode);
234 assert(mode_is_float(mode));
238 } else if (bits == 64) {
239 be_emit_string("df");
241 panic("FP load mode > 64bits not implemented yet");
246 * emit FP store mode char
248 void sparc_emit_fp_store_mode(const ir_node *node)
250 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
251 ir_mode *mode = attr->load_store_mode;
252 int bits = get_mode_size_bits(mode);
254 assert(mode_is_float(mode));
258 } else if (bits == 64) {
259 be_emit_string("df");
261 panic("FP store mode > 64bits not implemented yet");
266 * emits the FP mode suffix char
268 void sparc_emit_fp_mode_suffix(const ir_node *node)
270 ir_mode *mode = get_irn_mode(node);
271 int bits = get_mode_size_bits(mode);
273 assert(mode_is_float(mode));
277 } else if (bits == 64) {
280 panic("FP mode > 64bits not implemented yet");
285 * Returns the target label for a control flow node.
287 static void sparc_emit_cfop_target(const ir_node *node)
289 ir_node *block = get_irn_link(node);
290 be_gas_emit_block_name(block);
296 static void sparc_emit_entity(ir_entity *entity)
298 be_gas_emit_entity(entity);
302 * Emits code for stack space management
304 static void emit_be_IncSP(const ir_node *irn)
306 int offs = -be_get_IncSP_offset(irn);
311 /* SPARC stack grows downwards */
313 be_emit_cstring("\tsub ");
316 be_emit_cstring("\tadd ");
319 sparc_emit_source_register(irn, 0);
320 be_emit_irprintf(", %d", offs);
321 be_emit_cstring(", ");
322 sparc_emit_dest_register(irn, 0);
323 be_emit_finish_line_gas(irn);
327 * emits code for save instruction with min. required stack space
329 static void emit_sparc_Save(const ir_node *irn)
331 const sparc_save_attr_t *save_attr = get_sparc_save_attr_const(irn);
332 be_emit_cstring("\tsave ");
333 sparc_emit_source_register(irn, 0);
334 be_emit_irprintf(", %d, ", -save_attr->initial_stacksize);
335 sparc_emit_dest_register(irn, 0);
336 be_emit_finish_line_gas(irn);
340 * emits code to load hi 22 bit of a constant
342 static void emit_sparc_HiImm(const ir_node *irn)
344 const sparc_attr_t *attr = get_sparc_attr_const(irn);
345 be_emit_cstring("\tsethi ");
346 be_emit_irprintf("%%hi(%d), ", attr->immediate_value);
347 sparc_emit_dest_register(irn, 0);
348 be_emit_finish_line_gas(irn);
352 * emits code to load lo 10bits of a constant
354 static void emit_sparc_LoImm(const ir_node *irn)
356 const sparc_attr_t *attr = get_sparc_attr_const(irn);
357 be_emit_cstring("\tor ");
358 sparc_emit_source_register(irn, 0);
359 be_emit_irprintf(", %%lo(%d), ", attr->immediate_value);
360 sparc_emit_dest_register(irn, 0);
361 be_emit_finish_line_gas(irn);
365 * emit code for div with the correct sign prefix
367 static void emit_sparc_Div(const ir_node *irn)
369 be_emit_cstring("\t");
370 sparc_emit_mode_sign_prefix(irn);
371 be_emit_cstring("div ");
373 sparc_emit_source_register(irn, 0);
374 be_emit_cstring(", ");
375 sparc_emit_reg_or_imm(irn, 1);
376 be_emit_cstring(", ");
377 sparc_emit_dest_register(irn, 0);
378 be_emit_finish_line_gas(irn);
382 * emit code for mul with the correct sign prefix
384 static void emit_sparc_Mul(const ir_node *irn)
386 be_emit_cstring("\t");
387 sparc_emit_mode_sign_prefix(irn);
388 be_emit_cstring("mul ");
390 sparc_emit_source_register(irn, 0);
391 be_emit_cstring(", ");
392 sparc_emit_reg_or_imm(irn, 1);
393 be_emit_cstring(", ");
394 sparc_emit_dest_register(irn, 0);
395 be_emit_finish_line_gas(irn);
399 * emits code for mulh
401 static void emit_sparc_Mulh(const ir_node *irn)
403 be_emit_cstring("\t");
404 sparc_emit_mode_sign_prefix(irn);
405 be_emit_cstring("mul ");
407 sparc_emit_source_register(irn, 0);
408 be_emit_cstring(", ");
409 sparc_emit_reg_or_imm(irn, 1);
410 be_emit_cstring(", ");
411 sparc_emit_dest_register(irn, 0);
412 be_emit_finish_line_gas(irn);
414 // our result is in the y register now
415 // we just copy it to the assigned target reg
416 be_emit_cstring("\tmov ");
418 be_emit_string(arch_register_get_name(&sparc_flags_regs[REG_Y]));
419 be_emit_cstring(", ");
420 sparc_emit_dest_register(irn, 0);
421 be_emit_finish_line_gas(irn);
425 * Emits code for return node
427 static void emit_be_Return(const ir_node *irn)
429 be_emit_cstring("\tret");
430 //be_emit_cstring("\tjmp %i7+8");
431 be_emit_finish_line_gas(irn);
432 be_emit_cstring("\trestore");
433 be_emit_finish_line_gas(irn);
437 * Emits code for Call node
439 static void emit_sparc_Call(const ir_node *node)
441 const sparc_attr_t *attr = get_sparc_attr_const(node);
442 ir_entity *entity = attr->immediate_value_entity;
444 be_emit_cstring("\tcall ");
445 if (entity != NULL) {
446 sparc_emit_entity(entity);
447 be_emit_cstring(", 0");
449 int last = get_irn_arity(node);
450 sparc_emit_source_register(node, last-1);
452 be_emit_finish_line_gas(node);
454 /* fill delay slot */
455 be_emit_cstring("\tnop");
456 be_emit_finish_line_gas(node);
460 * Emit code for Perm node
462 static void emit_be_Perm(const ir_node *irn)
464 be_emit_cstring("\txor ");
465 sparc_emit_source_register(irn, 1);
466 be_emit_cstring(", ");
467 sparc_emit_source_register(irn, 0);
468 be_emit_cstring(", ");
469 sparc_emit_source_register(irn, 0);
470 be_emit_finish_line_gas(NULL);
472 be_emit_cstring("\txor ");
473 sparc_emit_source_register(irn, 1);
474 be_emit_cstring(", ");
475 sparc_emit_source_register(irn, 0);
476 be_emit_cstring(", ");
477 sparc_emit_source_register(irn, 1);
478 be_emit_finish_line_gas(NULL);
480 be_emit_cstring("\txor ");
481 sparc_emit_source_register(irn, 1);
482 be_emit_cstring(", ");
483 sparc_emit_source_register(irn, 0);
484 be_emit_cstring(", ");
485 sparc_emit_source_register(irn, 0);
486 be_emit_finish_line_gas(irn);
490 * TODO: not really tested but seems to work with memperm_arity == 1
492 static void emit_be_MemPerm(const ir_node *node)
497 ir_graph *irg = get_irn_irg(node);
498 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
500 /* this implementation only works with frame pointers currently */
501 assert(layout->sp_relative == false);
503 /* TODO: this implementation is slower than necessary.
504 The longterm goal is however to avoid the memperm node completely */
506 memperm_arity = be_get_MemPerm_entity_arity(node);
507 // we use our local registers - so this is limited to 8 inputs !
508 if (memperm_arity > 8)
509 panic("memperm with more than 8 inputs not supported yet");
511 be_emit_irprintf("\tsub %%sp, %d, %%sp", memperm_arity*4);
512 be_emit_finish_line_gas(node);
514 for (i = 0; i < memperm_arity; ++i) {
515 ir_entity *entity = be_get_MemPerm_in_entity(node, i);
516 int offset = be_get_stack_entity_offset(layout, entity, 0);
519 be_emit_irprintf("\tst %%l%d, [%%sp%+d]", i, sp_change + SPARC_MIN_STACKSIZE);
520 be_emit_finish_line_gas(node);
522 /* load from entity */
523 be_emit_irprintf("\tld [%%fp%+d], %%l%d", offset, i);
524 be_emit_finish_line_gas(node);
528 for (i = memperm_arity-1; i >= 0; --i) {
529 ir_entity *entity = be_get_MemPerm_out_entity(node, i);
530 int offset = be_get_stack_entity_offset(layout, entity, 0);
534 /* store to new entity */
535 be_emit_irprintf("\tst %%l%d, [%%fp%+d]", i, offset);
536 be_emit_finish_line_gas(node);
537 /* restore register */
538 be_emit_irprintf("\tld [%%sp%+d], %%l%d", sp_change + SPARC_MIN_STACKSIZE, i);
539 be_emit_finish_line_gas(node);
542 be_emit_irprintf("\tadd %%sp, %d, %%sp", memperm_arity*4);
543 be_emit_finish_line_gas(node);
545 assert(sp_change == 0);
551 static void emit_sparc_SymConst(const ir_node *irn)
553 const sparc_symconst_attr_t *attr = get_sparc_symconst_attr_const(irn);
555 //sethi %hi(const32),%reg
556 //or %reg,%lo(const32),%reg
558 be_emit_cstring("\tsethi %hi(");
559 be_gas_emit_entity(attr->entity);
560 be_emit_cstring("), ");
561 sparc_emit_dest_register(irn, 0);
562 be_emit_cstring("\n ");
564 // TODO: could be combined with the following load/store instruction
565 be_emit_cstring("\tor ");
566 sparc_emit_dest_register(irn, 0);
567 be_emit_cstring(", %lo(");
568 be_gas_emit_entity(attr->entity);
569 be_emit_cstring("), ");
570 sparc_emit_dest_register(irn, 0);
571 be_emit_finish_line_gas(irn);
575 * Emits code for FrameAddr fix
577 static void emit_sparc_FrameAddr(const ir_node *irn)
579 const sparc_symconst_attr_t *attr = get_irn_generic_attr_const(irn);
581 // no need to fix offset as we are adressing via the framepointer
582 if (attr->fp_offset >= 0) {
583 be_emit_cstring("\tadd ");
584 sparc_emit_source_register(irn, 0);
585 be_emit_cstring(", ");
586 be_emit_irprintf("%ld", attr->fp_offset);
588 be_emit_cstring("\tsub ");
589 sparc_emit_source_register(irn, 0);
590 be_emit_cstring(", ");
591 be_emit_irprintf("%ld", -attr->fp_offset);
594 be_emit_cstring(", ");
595 sparc_emit_dest_register(irn, 0);
596 be_emit_finish_line_gas(irn);
601 * Emits code for Branch
603 static void emit_sparc_BXX(const ir_node *node)
605 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
606 int proj_num = attr->proj_num;
607 bool is_unsigned = attr->is_unsigned;
608 const ir_node *proj_true = NULL;
609 const ir_node *proj_false = NULL;
610 const ir_edge_t *edge;
611 const ir_node *block;
612 const ir_node *next_block;
615 foreach_out_edge(node, edge) {
616 ir_node *proj = get_edge_src_irn(edge);
617 long nr = get_Proj_proj(proj);
618 if (nr == pn_Cond_true) {
625 /* for now, the code works for scheduled and non-schedules blocks */
626 block = get_nodes_block(node);
628 /* we have a block schedule */
629 next_block = get_irn_link(block);
631 assert(proj_num != pn_Cmp_False);
632 assert(proj_num != pn_Cmp_True);
634 if (get_irn_link(proj_true) == next_block) {
635 /* exchange both proj's so the second one can be omitted */
636 const ir_node *t = proj_true;
638 proj_true = proj_false;
640 proj_num = get_negated_pnc(proj_num, mode_Iu);
645 case pn_Cmp_Eq: suffix = "e"; break;
646 case pn_Cmp_Lt: suffix = "lu"; break;
647 case pn_Cmp_Le: suffix = "leu"; break;
648 case pn_Cmp_Gt: suffix = "gu"; break;
649 case pn_Cmp_Ge: suffix = "geu"; break;
650 case pn_Cmp_Lg: suffix = "ne"; break;
651 default: panic("Cmp has unsupported pnc");
655 case pn_Cmp_Eq: suffix = "e"; break;
656 case pn_Cmp_Lt: suffix = "l"; break;
657 case pn_Cmp_Le: suffix = "le"; break;
658 case pn_Cmp_Gt: suffix = "g"; break;
659 case pn_Cmp_Ge: suffix = "ge"; break;
660 case pn_Cmp_Lg: suffix = "ne"; break;
661 default: panic("Cmp has unsupported pnc");
665 /* emit the true proj */
666 be_emit_cstring("\tb");
667 be_emit_string(suffix);
669 sparc_emit_cfop_target(proj_true);
670 be_emit_finish_line_gas(proj_true);
672 be_emit_cstring("\tnop");
673 be_emit_pad_comment();
674 be_emit_cstring("/* TODO: use delay slot */\n");
676 if (get_irn_link(proj_false) == next_block) {
677 be_emit_cstring("\t/* false-fallthrough to ");
678 sparc_emit_cfop_target(proj_false);
679 be_emit_cstring(" */");
680 be_emit_finish_line_gas(proj_false);
682 be_emit_cstring("\tba ");
683 sparc_emit_cfop_target(proj_false);
684 be_emit_finish_line_gas(proj_false);
685 be_emit_cstring("\tnop\t\t/* TODO: use delay slot */\n");
686 be_emit_finish_line_gas(proj_false);
691 * emit Jmp (which actually is a branch always (ba) instruction)
693 static void emit_sparc_Ba(const ir_node *node)
695 ir_node *block, *next_block;
697 /* for now, the code works for scheduled and non-schedules blocks */
698 block = get_nodes_block(node);
700 /* we have a block schedule */
701 next_block = get_irn_link(block);
702 if (get_irn_link(node) != next_block) {
703 be_emit_cstring("\tba ");
704 sparc_emit_cfop_target(node);
705 be_emit_finish_line_gas(node);
706 be_emit_cstring("\tnop\t\t/* TODO: use delay slot */\n");
708 be_emit_cstring("\t/* fallthrough to ");
709 sparc_emit_cfop_target(node);
710 be_emit_cstring(" */");
712 be_emit_finish_line_gas(node);
718 static void emit_be_Copy(const ir_node *irn)
720 ir_mode *mode = get_irn_mode(irn);
722 if (get_in_reg(irn, 0) == get_out_reg(irn, 0)) {
727 if (mode_is_float(mode)) {
728 panic("emit_be_Copy: move not supported for FP");
729 } else if (mode_is_data(mode)) {
730 be_emit_cstring("\tmov ");
731 sparc_emit_source_register(irn, 0);
732 be_emit_cstring(", ");
733 sparc_emit_dest_register(irn, 0);
734 be_emit_finish_line_gas(irn);
736 panic("emit_be_Copy: move not supported for this mode");
742 * dummy emitter for ignored nodes
744 static void emit_nothing(const ir_node *irn)
752 * type of emitter function
754 typedef void (*emit_func) (const ir_node *);
757 * Set a node emitter. Make it a bit more type safe.
759 static inline void set_emitter(ir_op *op, emit_func sparc_emit_node)
761 op->ops.generic = (op_func)sparc_emit_node;
765 * Enters the emitter functions for handled nodes into the generic
766 * pointer of an opcode.
768 static void sparc_register_emitters(void)
770 /* first clear the generic function pointer for all ops */
771 clear_irp_opcodes_generic_func();
772 /* register all emitter functions defined in spec */
773 sparc_register_spec_emitters();
776 set_emitter(op_be_Copy, emit_be_Copy);
777 set_emitter(op_be_CopyKeep, emit_be_Copy);
778 set_emitter(op_be_IncSP, emit_be_IncSP);
779 set_emitter(op_be_MemPerm, emit_be_MemPerm);
780 set_emitter(op_be_Perm, emit_be_Perm);
781 set_emitter(op_be_Return, emit_be_Return);
782 set_emitter(op_sparc_BXX, emit_sparc_BXX);
783 set_emitter(op_sparc_Call, emit_sparc_Call);
784 set_emitter(op_sparc_Div, emit_sparc_Div);
785 set_emitter(op_sparc_FrameAddr, emit_sparc_FrameAddr);
786 set_emitter(op_sparc_HiImm, emit_sparc_HiImm);
787 set_emitter(op_sparc_Ba, emit_sparc_Ba);
788 set_emitter(op_sparc_LoImm, emit_sparc_LoImm);
789 set_emitter(op_sparc_Mul, emit_sparc_Mul);
790 set_emitter(op_sparc_Mulh, emit_sparc_Mulh);
791 set_emitter(op_sparc_Save, emit_sparc_Save);
792 set_emitter(op_sparc_SymConst, emit_sparc_SymConst);
794 /* no need to emit anything for the following nodes */
795 set_emitter(op_be_Barrier, emit_nothing);
796 set_emitter(op_be_Keep, emit_nothing);
797 set_emitter(op_be_Start, emit_nothing);
798 set_emitter(op_Phi, emit_nothing);
802 * Emits code for a node.
804 static void sparc_emit_node(const ir_node *node)
806 ir_op *op = get_irn_op(node);
808 if (op->ops.generic) {
809 emit_func func = (emit_func) op->ops.generic;
810 be_dbg_set_dbg_info(get_irn_dbg_info(node));
813 panic("Error: No emit handler for node %+F (graph %+F)\n",
814 node, current_ir_graph);
819 * Walks over the nodes in a block connected by scheduling edges
820 * and emits code for each node.
822 static void sparc_gen_block(ir_node *block, void *data)
827 if (! is_Block(block))
830 be_gas_emit_block_name(block);
831 be_emit_cstring(":\n");
832 be_emit_write_line();
834 sched_foreach(block, node) {
835 sparc_emit_node(node);
841 * Emits code for function start.
843 static void sparc_emit_func_prolog(ir_graph *irg)
845 ir_entity *ent = get_irg_entity(irg);
846 be_gas_emit_function_prolog(ent, 4);
847 be_emit_write_line();
851 * Emits code for function end
853 static void sparc_emit_func_epilog(ir_graph *irg)
855 ir_entity *ent = get_irg_entity(irg);
856 const char *irg_name = get_entity_ld_name(ent);
857 be_emit_write_line();
858 be_emit_irprintf("\t.size %s, .-%s\n", irg_name, irg_name);
859 be_emit_cstring("# -- End ");
860 be_emit_string(irg_name);
861 be_emit_cstring("\n");
862 be_emit_write_line();
867 * TODO: Sets labels for control flow nodes (jump target).
868 * Links control predecessors to there destination blocks.
870 static void sparc_gen_labels(ir_node *block, void *env)
873 int n = get_Block_n_cfgpreds(block);
876 for (n--; n >= 0; n--) {
877 pred = get_Block_cfgpred(block, n);
878 set_irn_link(pred, block); // link the pred of a block (which is a jmp)
886 void sparc_gen_routine(const sparc_code_gen_t *cg, ir_graph *irg)
889 ir_node *last_block = NULL;
890 ir_entity *entity = get_irg_entity(irg);
894 be_gas_elf_type_char = '#';
895 be_gas_object_file_format = OBJECT_FILE_FORMAT_ELF_SPARC;
897 /* register all emitter functions */
898 sparc_register_emitters();
899 be_dbg_method_begin(entity);
901 /* create the block schedule. For now, we don't need it earlier. */
902 blk_sched = be_create_block_schedule(irg);
904 // emit function prolog
905 sparc_emit_func_prolog(irg);
907 // generate BLOCK labels
908 irg_block_walk_graph(irg, sparc_gen_labels, NULL, NULL);
910 // inject block scheduling links & emit code of each block
911 n = ARR_LEN(blk_sched);
912 for (i = 0; i < n;) {
913 ir_node *block, *next_bl;
915 block = blk_sched[i];
917 next_bl = i < n ? blk_sched[i] : NULL;
919 /* set here the link. the emitter expects to find the next block here */
920 set_irn_link(block, next_bl);
921 sparc_gen_block(block, last_block);
925 // emit function epilog
926 sparc_emit_func_epilog(irg);
929 void sparc_init_emitter(void)
931 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.emit");