2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief emit assembler for a backend graph
23 * @author Hannes Rapp, Matthias Braun
41 #include "raw_bitset.h"
45 #include "../besched.h"
46 #include "../beblocksched.h"
48 #include "../begnuas.h"
49 #include "../be_dbgout.h"
50 #include "../benode.h"
51 #include "../bestack.h"
53 #include "sparc_emitter.h"
54 #include "gen_sparc_emitter.h"
55 #include "sparc_nodes_attr.h"
56 #include "sparc_new_nodes.h"
57 #include "gen_sparc_regalloc_if.h"
59 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
61 static ir_heights_t *heights;
62 static const ir_node *delay_slot_filler; /**< this node has been choosen to fill
63 the next delay slot */
65 static void sparc_emit_node(const ir_node *node);
68 * Returns the register at in position pos.
70 static const arch_register_t *get_in_reg(const ir_node *node, int pos)
72 ir_node *op = get_irn_n(node, pos);
73 return arch_get_irn_register(op);
76 void sparc_emit_immediate(const ir_node *node)
78 const sparc_attr_t *attr = get_sparc_attr_const(node);
79 ir_entity *entity = attr->immediate_value_entity;
82 int32_t value = attr->immediate_value;
83 assert(sparc_is_value_imm_encodeable(value));
84 be_emit_irprintf("%d", value);
86 be_emit_cstring("%lo(");
87 be_gas_emit_entity(entity);
88 if (attr->immediate_value != 0) {
89 be_emit_irprintf("%+d", attr->immediate_value);
95 void sparc_emit_high_immediate(const ir_node *node)
97 const sparc_attr_t *attr = get_sparc_attr_const(node);
98 ir_entity *entity = attr->immediate_value_entity;
100 be_emit_cstring("%hi(");
101 if (entity == NULL) {
102 uint32_t value = (uint32_t) attr->immediate_value;
103 be_emit_irprintf("0x%X", value);
105 be_gas_emit_entity(entity);
106 if (attr->immediate_value != 0) {
107 be_emit_irprintf("%+d", attr->immediate_value);
113 void sparc_emit_source_register(const ir_node *node, int pos)
115 const arch_register_t *reg = get_in_reg(node, pos);
117 be_emit_string(arch_register_get_name(reg));
120 void sparc_emit_dest_register(const ir_node *node, int pos)
122 const arch_register_t *reg = arch_irn_get_register(node, pos);
124 be_emit_string(arch_register_get_name(reg));
128 * Emits either a imm or register depending on arity of node
130 * @param register no (-1 if no register)
132 void sparc_emit_reg_or_imm(const ir_node *node, int pos)
134 if (arch_irn_get_flags(node) & ((arch_irn_flags_t)sparc_arch_irn_flag_immediate_form)) {
135 // we have a imm input
136 sparc_emit_immediate(node);
139 sparc_emit_source_register(node, pos);
146 void sparc_emit_offset(const ir_node *node, int offset_node_pos)
148 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
150 if (attr->is_reg_reg) {
151 assert(!attr->is_frame_entity);
152 assert(attr->base.immediate_value == 0);
153 assert(attr->base.immediate_value_entity == NULL);
155 sparc_emit_source_register(node, offset_node_pos);
156 } else if (attr->is_frame_entity) {
157 int32_t offset = attr->base.immediate_value;
159 assert(sparc_is_value_imm_encodeable(offset));
160 be_emit_irprintf("%+ld", offset);
162 } else if (attr->base.immediate_value != 0
163 || attr->base.immediate_value_entity != NULL) {
165 sparc_emit_immediate(node);
169 void sparc_emit_float_load_store_mode(const ir_node *node)
171 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
172 ir_mode *mode = attr->load_store_mode;
173 int bits = get_mode_size_bits(mode);
175 assert(mode_is_float(mode));
179 case 64: be_emit_char('d'); return;
180 case 128: be_emit_char('q'); return;
182 panic("invalid flaot load/store mode %+F", mode);
186 * Emit load mode char
188 void sparc_emit_load_mode(const ir_node *node)
190 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
191 ir_mode *mode = attr->load_store_mode;
192 int bits = get_mode_size_bits(mode);
193 bool is_signed = mode_is_signed(mode);
196 be_emit_string(is_signed ? "sh" : "uh");
197 } else if (bits == 8) {
198 be_emit_string(is_signed ? "sb" : "ub");
199 } else if (bits == 64) {
207 * Emit store mode char
209 void sparc_emit_store_mode(const ir_node *node)
211 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
212 ir_mode *mode = attr->load_store_mode;
213 int bits = get_mode_size_bits(mode);
217 } else if (bits == 8) {
219 } else if (bits == 64) {
227 * emit integer signed/unsigned prefix char
229 void sparc_emit_mode_sign_prefix(const ir_node *node)
231 ir_mode *mode = get_irn_mode(node);
232 bool is_signed = mode_is_signed(mode);
233 be_emit_string(is_signed ? "s" : "u");
236 static void emit_fp_suffix(const ir_mode *mode)
238 unsigned bits = get_mode_size_bits(mode);
239 assert(mode_is_float(mode));
243 } else if (bits == 64) {
245 } else if (bits == 128) {
248 panic("invalid FP mode");
252 void sparc_emit_fp_conv_source(const ir_node *node)
254 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
255 emit_fp_suffix(attr->src_mode);
258 void sparc_emit_fp_conv_destination(const ir_node *node)
260 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
261 emit_fp_suffix(attr->dest_mode);
265 * emits the FP mode suffix char
267 void sparc_emit_fp_mode_suffix(const ir_node *node)
269 const sparc_fp_attr_t *attr = get_sparc_fp_attr_const(node);
270 emit_fp_suffix(attr->fp_mode);
273 static ir_node *get_jump_target(const ir_node *jump)
275 return (ir_node*)get_irn_link(jump);
279 * Returns the target label for a control flow node.
281 static void sparc_emit_cfop_target(const ir_node *node)
283 ir_node *block = get_jump_target(node);
284 be_gas_emit_block_name(block);
287 static int get_sparc_Call_dest_addr_pos(const ir_node *node)
289 return get_irn_arity(node)-1;
292 static bool ba_is_fallthrough(const ir_node *node)
294 ir_node *block = get_nodes_block(node);
295 ir_node *next_block = (ir_node*)get_irn_link(block);
296 return get_irn_link(node) == next_block;
299 static bool is_no_instruction(const ir_node *node)
301 /* copies are nops if src_reg == dest_reg */
302 if (be_is_Copy(node) || be_is_CopyKeep(node)) {
303 const arch_register_t *src_reg = get_in_reg(node, 0);
304 const arch_register_t *dest_reg = arch_irn_get_register(node, 0);
306 if (src_reg == dest_reg)
309 if (be_is_IncSP(node) && be_get_IncSP_offset(node) == 0)
311 /* Ba is not emitted if it is a simple fallthrough */
312 if (is_sparc_Ba(node) && ba_is_fallthrough(node))
315 return be_is_Keep(node) || be_is_Start(node) || is_Phi(node);
318 static bool has_delay_slot(const ir_node *node)
320 if (is_sparc_Ba(node) && ba_is_fallthrough(node))
323 return is_sparc_Bicc(node) || is_sparc_fbfcc(node) || is_sparc_Ba(node)
324 || is_sparc_SwitchJmp(node) || is_sparc_Call(node)
325 || is_sparc_SDiv(node) || is_sparc_UDiv(node)
326 || is_sparc_Return(node);
329 /** returns true if the emitter for this sparc node can produce more than one
330 * actual sparc instruction.
331 * Usually it is a bad sign if we have to add instructions here. We should
332 * rather try to get them lowered down. So we can actually put them into
333 * delay slots and make them more accessible to the scheduler.
335 static bool emits_multiple_instructions(const ir_node *node)
337 if (has_delay_slot(node))
340 return is_sparc_Mulh(node) || is_sparc_SDiv(node) || is_sparc_UDiv(node)
341 || be_is_MemPerm(node) || be_is_Perm(node);
345 * search for an instruction that can fill the delay slot of @p node
347 static const ir_node *pick_delay_slot_for(const ir_node *node)
349 const ir_node *check = node;
350 const ir_node *schedpoint = node;
352 /* currently we don't track which registers are still alive, so we can't
353 * pick any other instructions other than the one directly preceding */
354 static const unsigned PICK_DELAY_SLOT_MAX_DISTANCE = 1;
356 assert(has_delay_slot(node));
358 if (is_sparc_Call(node)) {
359 const sparc_attr_t *attr = get_sparc_attr_const(node);
360 ir_entity *entity = attr->immediate_value_entity;
361 if (entity != NULL) {
362 check = NULL; /* pick any instruction, dependencies on Call
365 /* we only need to check the value for the call destination */
366 check = get_irn_n(node, get_sparc_Call_dest_addr_pos(node));
369 /* the Call also destroys the value of %o7, but since this is currently
370 * marked as ignore register in the backend, it should never be used by
371 * the instruction in the delay slot. */
372 } else if (is_sparc_Return(node)) {
373 /* we only have to check the jump destination value */
374 int arity = get_irn_arity(node);
378 for (i = 0; i < arity; ++i) {
379 ir_node *in = get_irn_n(node, i);
380 const arch_register_t *reg = arch_get_irn_register(in);
381 if (reg == &sparc_registers[REG_O7]) {
382 check = skip_Proj(in);
390 while (sched_has_prev(schedpoint)) {
391 schedpoint = sched_prev(schedpoint);
393 if (has_delay_slot(schedpoint))
396 /* skip things which don't really result in instructions */
397 if (is_no_instruction(schedpoint))
400 if (tries++ >= PICK_DELAY_SLOT_MAX_DISTANCE)
403 if (emits_multiple_instructions(schedpoint))
406 /* allowed for delayslot: any instruction which is not necessary to
407 * compute an input to the branch. */
409 && heights_reachable_in_block(heights, check, schedpoint))
412 /* found something */
420 * Emits code for stack space management
422 static void emit_be_IncSP(const ir_node *irn)
424 int offset = be_get_IncSP_offset(irn);
429 /* SPARC stack grows downwards */
431 be_emit_cstring("\tsub ");
434 be_emit_cstring("\tadd ");
437 sparc_emit_source_register(irn, 0);
438 be_emit_irprintf(", %d", -offset);
439 be_emit_cstring(", ");
440 sparc_emit_dest_register(irn, 0);
441 be_emit_finish_line_gas(irn);
445 * emits code for mulh
447 static void emit_sparc_Mulh(const ir_node *irn)
449 be_emit_cstring("\t");
450 sparc_emit_mode_sign_prefix(irn);
451 be_emit_cstring("mul ");
453 sparc_emit_source_register(irn, 0);
454 be_emit_cstring(", ");
455 sparc_emit_reg_or_imm(irn, 1);
456 be_emit_cstring(", ");
457 sparc_emit_dest_register(irn, 0);
458 be_emit_finish_line_gas(irn);
460 // our result is in the y register now
461 // we just copy it to the assigned target reg
462 be_emit_cstring("\tmov %y, ");
463 sparc_emit_dest_register(irn, 0);
464 be_emit_finish_line_gas(irn);
467 static void fill_delay_slot(void)
469 if (delay_slot_filler != NULL) {
470 sparc_emit_node(delay_slot_filler);
471 delay_slot_filler = NULL;
473 be_emit_cstring("\tnop\n");
474 be_emit_write_line();
478 static void emit_sparc_Div(const ir_node *node, bool is_signed)
480 /* can we get the delay count of the wr instruction somewhere? */
481 unsigned wry_delay_count = 3;
484 be_emit_cstring("\twr ");
485 sparc_emit_source_register(node, 0);
486 be_emit_cstring(", 0, %y");
487 be_emit_finish_line_gas(node);
489 for (i = 0; i < wry_delay_count; ++i) {
493 be_emit_irprintf("\t%s ", is_signed ? "sdiv" : "udiv");
494 sparc_emit_source_register(node, 1);
495 be_emit_cstring(", ");
496 sparc_emit_reg_or_imm(node, 2);
497 be_emit_cstring(", ");
498 sparc_emit_dest_register(node, 0);
499 be_emit_finish_line_gas(node);
502 static void emit_sparc_SDiv(const ir_node *node)
504 emit_sparc_Div(node, true);
507 static void emit_sparc_UDiv(const ir_node *node)
509 emit_sparc_Div(node, false);
513 * Emits code for Call node
515 static void emit_sparc_Call(const ir_node *node)
517 const sparc_attr_t *attr = get_sparc_attr_const(node);
518 ir_entity *entity = attr->immediate_value_entity;
520 be_emit_cstring("\tcall ");
521 if (entity != NULL) {
522 be_gas_emit_entity(entity);
523 if (attr->immediate_value != 0) {
524 be_emit_irprintf("%+d", attr->immediate_value);
526 be_emit_cstring(", 0");
528 int dest_addr = get_sparc_Call_dest_addr_pos(node);
529 sparc_emit_source_register(node, dest_addr);
531 be_emit_finish_line_gas(node);
537 * Emit code for Perm node
539 static void emit_be_Perm(const ir_node *irn)
541 be_emit_cstring("\txor ");
542 sparc_emit_source_register(irn, 1);
543 be_emit_cstring(", ");
544 sparc_emit_source_register(irn, 0);
545 be_emit_cstring(", ");
546 sparc_emit_source_register(irn, 0);
547 be_emit_finish_line_gas(NULL);
549 be_emit_cstring("\txor ");
550 sparc_emit_source_register(irn, 1);
551 be_emit_cstring(", ");
552 sparc_emit_source_register(irn, 0);
553 be_emit_cstring(", ");
554 sparc_emit_source_register(irn, 1);
555 be_emit_finish_line_gas(NULL);
557 be_emit_cstring("\txor ");
558 sparc_emit_source_register(irn, 1);
559 be_emit_cstring(", ");
560 sparc_emit_source_register(irn, 0);
561 be_emit_cstring(", ");
562 sparc_emit_source_register(irn, 0);
563 be_emit_finish_line_gas(irn);
566 static void emit_be_MemPerm(const ir_node *node)
571 ir_graph *irg = get_irn_irg(node);
572 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
574 /* this implementation only works with frame pointers currently */
575 assert(layout->sp_relative == false);
577 /* TODO: this implementation is slower than necessary.
578 The longterm goal is however to avoid the memperm node completely */
580 memperm_arity = be_get_MemPerm_entity_arity(node);
581 // we use our local registers - so this is limited to 8 inputs !
582 if (memperm_arity > 8)
583 panic("memperm with more than 8 inputs not supported yet");
585 be_emit_irprintf("\tsub %%sp, %d, %%sp", memperm_arity*4);
586 be_emit_finish_line_gas(node);
588 for (i = 0; i < memperm_arity; ++i) {
589 ir_entity *entity = be_get_MemPerm_in_entity(node, i);
590 int offset = be_get_stack_entity_offset(layout, entity, 0);
593 be_emit_irprintf("\tst %%l%d, [%%sp%+d]", i, sp_change + SPARC_MIN_STACKSIZE);
594 be_emit_finish_line_gas(node);
596 /* load from entity */
597 be_emit_irprintf("\tld [%%fp%+d], %%l%d", offset, i);
598 be_emit_finish_line_gas(node);
602 for (i = memperm_arity-1; i >= 0; --i) {
603 ir_entity *entity = be_get_MemPerm_out_entity(node, i);
604 int offset = be_get_stack_entity_offset(layout, entity, 0);
608 /* store to new entity */
609 be_emit_irprintf("\tst %%l%d, [%%fp%+d]", i, offset);
610 be_emit_finish_line_gas(node);
611 /* restore register */
612 be_emit_irprintf("\tld [%%sp%+d], %%l%d", sp_change + SPARC_MIN_STACKSIZE, i);
613 be_emit_finish_line_gas(node);
616 be_emit_irprintf("\tadd %%sp, %d, %%sp", memperm_arity*4);
617 be_emit_finish_line_gas(node);
619 assert(sp_change == 0);
622 static void emit_sparc_Return(const ir_node *node)
624 const char *destreg = "%o7";
626 /* hack: we don't explicitely model register changes because of the
627 * restore node. So we have to do it manually here */
628 if (delay_slot_filler != NULL &&
629 (is_sparc_Restore(delay_slot_filler)
630 || is_sparc_RestoreZero(delay_slot_filler))) {
633 be_emit_cstring("\tjmp ");
634 be_emit_string(destreg);
635 be_emit_cstring("+8");
636 be_emit_finish_line_gas(node);
640 static void emit_sparc_FrameAddr(const ir_node *node)
642 const sparc_attr_t *attr = get_sparc_attr_const(node);
643 int32_t offset = attr->immediate_value;
646 be_emit_cstring("\tadd ");
647 sparc_emit_source_register(node, 0);
648 be_emit_cstring(", ");
649 assert(sparc_is_value_imm_encodeable(offset));
650 be_emit_irprintf("%ld", offset);
652 be_emit_cstring("\tsub ");
653 sparc_emit_source_register(node, 0);
654 be_emit_cstring(", ");
655 assert(sparc_is_value_imm_encodeable(-offset));
656 be_emit_irprintf("%ld", -offset);
659 be_emit_cstring(", ");
660 sparc_emit_dest_register(node, 0);
661 be_emit_finish_line_gas(node);
664 static const char *get_icc_unsigned(ir_relation relation)
666 switch (relation & (ir_relation_less_equal_greater)) {
667 case ir_relation_false: return "bn";
668 case ir_relation_equal: return "be";
669 case ir_relation_less: return "blu";
670 case ir_relation_less_equal: return "bleu";
671 case ir_relation_greater: return "bgu";
672 case ir_relation_greater_equal: return "bgeu";
673 case ir_relation_less_greater: return "bne";
674 case ir_relation_less_equal_greater: return "ba";
675 default: panic("Cmp has unsupported relation");
679 static const char *get_icc_signed(ir_relation relation)
681 switch (relation & (ir_relation_less_equal_greater)) {
682 case ir_relation_false: return "bn";
683 case ir_relation_equal: return "be";
684 case ir_relation_less: return "bl";
685 case ir_relation_less_equal: return "ble";
686 case ir_relation_greater: return "bg";
687 case ir_relation_greater_equal: return "bge";
688 case ir_relation_less_greater: return "bne";
689 case ir_relation_less_equal_greater: return "ba";
690 default: panic("Cmp has unsupported relation");
694 static const char *get_fcc(ir_relation relation)
697 case ir_relation_false: return "fbn";
698 case ir_relation_equal: return "fbe";
699 case ir_relation_less: return "fbl";
700 case ir_relation_less_equal: return "fble";
701 case ir_relation_greater: return "fbg";
702 case ir_relation_greater_equal: return "fbge";
703 case ir_relation_less_greater: return "fblg";
704 case ir_relation_less_equal_greater: return "fbo";
705 case ir_relation_unordered: return "fbu";
706 case ir_relation_unordered_equal: return "fbue";
707 case ir_relation_unordered_less: return "fbul";
708 case ir_relation_unordered_less_equal: return "fbule";
709 case ir_relation_unordered_greater: return "fbug";
710 case ir_relation_unordered_greater_equal: return "fbuge";
711 case ir_relation_unordered_less_greater: return "fbne";
712 case ir_relation_true: return "fba";
714 panic("invalid relation");
717 typedef const char* (*get_cc_func)(ir_relation relation);
719 static void emit_sparc_branch(const ir_node *node, get_cc_func get_cc)
721 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
722 ir_relation relation = attr->relation;
723 const ir_node *proj_true = NULL;
724 const ir_node *proj_false = NULL;
725 const ir_edge_t *edge;
726 const ir_node *block;
727 const ir_node *next_block;
729 foreach_out_edge(node, edge) {
730 ir_node *proj = get_edge_src_irn(edge);
731 long nr = get_Proj_proj(proj);
732 if (nr == pn_Cond_true) {
739 /* for now, the code works for scheduled and non-schedules blocks */
740 block = get_nodes_block(node);
742 /* we have a block schedule */
743 next_block = (ir_node*)get_irn_link(block);
745 if (get_irn_link(proj_true) == next_block) {
746 /* exchange both proj's so the second one can be omitted */
747 const ir_node *t = proj_true;
749 proj_true = proj_false;
751 relation = get_negated_relation(relation);
754 /* emit the true proj */
755 be_emit_cstring("\t");
756 be_emit_string(get_cc(relation));
758 sparc_emit_cfop_target(proj_true);
759 be_emit_finish_line_gas(proj_true);
763 if (get_irn_link(proj_false) == next_block) {
764 be_emit_cstring("\t/* fallthrough to ");
765 sparc_emit_cfop_target(proj_false);
766 be_emit_cstring(" */");
767 be_emit_finish_line_gas(proj_false);
769 be_emit_cstring("\tba ");
770 sparc_emit_cfop_target(proj_false);
771 be_emit_finish_line_gas(proj_false);
776 static void emit_sparc_Bicc(const ir_node *node)
778 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
779 bool is_unsigned = attr->is_unsigned;
780 emit_sparc_branch(node, is_unsigned ? get_icc_unsigned : get_icc_signed);
783 static void emit_sparc_fbfcc(const ir_node *node)
785 /* if the flags producing node was immediately in front of us, emit
787 ir_node *flags = get_irn_n(node, n_sparc_fbfcc_flags);
788 ir_node *prev = sched_prev(node);
789 if (is_Block(prev)) {
790 /* TODO: when the flags come from another block, then we have to do
791 * more complicated tests to see wether the flag producing node is
792 * potentially in front of us (could happen for fallthroughs) */
793 panic("TODO: fbfcc flags come from other block");
795 if (skip_Proj(flags) == prev) {
796 be_emit_cstring("\tnop\n");
798 emit_sparc_branch(node, get_fcc);
801 static void emit_sparc_Ba(const ir_node *node)
803 if (ba_is_fallthrough(node)) {
804 be_emit_cstring("\t/* fallthrough to ");
805 sparc_emit_cfop_target(node);
806 be_emit_cstring(" */");
808 be_emit_cstring("\tba ");
809 sparc_emit_cfop_target(node);
810 be_emit_finish_line_gas(node);
813 be_emit_finish_line_gas(node);
816 static void emit_sparc_SwitchJmp(const ir_node *node)
818 const sparc_switch_jmp_attr_t *attr = get_sparc_switch_jmp_attr_const(node);
820 be_emit_cstring("\tjmp ");
821 sparc_emit_source_register(node, 0);
822 be_emit_finish_line_gas(node);
825 emit_jump_table(node, attr->default_proj_num, attr->jump_table,
829 static void emit_fmov(const ir_node *node, const arch_register_t *src_reg,
830 const arch_register_t *dst_reg)
832 be_emit_cstring("\tfmovs %");
833 be_emit_string(arch_register_get_name(src_reg));
834 be_emit_cstring(", %");
835 be_emit_string(arch_register_get_name(dst_reg));
836 be_emit_finish_line_gas(node);
839 static const arch_register_t *get_next_fp_reg(const arch_register_t *reg)
841 unsigned idx = reg->global_index;
842 assert(reg == &sparc_registers[idx]);
844 assert(idx - REG_F0 < N_sparc_fp_REGS);
845 return &sparc_registers[idx];
848 static void emit_be_Copy(const ir_node *node)
850 ir_mode *mode = get_irn_mode(node);
851 const arch_register_t *src_reg = get_in_reg(node, 0);
852 const arch_register_t *dst_reg = arch_irn_get_register(node, 0);
854 if (src_reg == dst_reg)
857 if (mode_is_float(mode)) {
858 unsigned bits = get_mode_size_bits(mode);
859 int n = bits > 32 ? bits > 64 ? 3 : 1 : 0;
861 emit_fmov(node, src_reg, dst_reg);
862 for (i = 0; i < n; ++i) {
863 src_reg = get_next_fp_reg(src_reg);
864 dst_reg = get_next_fp_reg(dst_reg);
865 emit_fmov(node, src_reg, dst_reg);
867 } else if (mode_is_data(mode)) {
868 be_emit_cstring("\tmov ");
869 sparc_emit_source_register(node, 0);
870 be_emit_cstring(", ");
871 sparc_emit_dest_register(node, 0);
872 be_emit_finish_line_gas(node);
874 panic("emit_be_Copy: invalid mode");
878 static void emit_nothing(const ir_node *irn)
883 typedef void (*emit_func) (const ir_node *);
885 static inline void set_emitter(ir_op *op, emit_func sparc_emit_node)
887 op->ops.generic = (op_func)sparc_emit_node;
891 * Enters the emitter functions for handled nodes into the generic
892 * pointer of an opcode.
894 static void sparc_register_emitters(void)
896 /* first clear the generic function pointer for all ops */
897 clear_irp_opcodes_generic_func();
898 /* register all emitter functions defined in spec */
899 sparc_register_spec_emitters();
902 set_emitter(op_be_Copy, emit_be_Copy);
903 set_emitter(op_be_CopyKeep, emit_be_Copy);
904 set_emitter(op_be_IncSP, emit_be_IncSP);
905 set_emitter(op_be_MemPerm, emit_be_MemPerm);
906 set_emitter(op_be_Perm, emit_be_Perm);
907 set_emitter(op_sparc_Ba, emit_sparc_Ba);
908 set_emitter(op_sparc_Bicc, emit_sparc_Bicc);
909 set_emitter(op_sparc_Call, emit_sparc_Call);
910 set_emitter(op_sparc_fbfcc, emit_sparc_fbfcc);
911 set_emitter(op_sparc_FrameAddr, emit_sparc_FrameAddr);
912 set_emitter(op_sparc_Mulh, emit_sparc_Mulh);
913 set_emitter(op_sparc_Return, emit_sparc_Return);
914 set_emitter(op_sparc_SDiv, emit_sparc_SDiv);
915 set_emitter(op_sparc_SwitchJmp, emit_sparc_SwitchJmp);
916 set_emitter(op_sparc_UDiv, emit_sparc_UDiv);
918 /* no need to emit anything for the following nodes */
919 set_emitter(op_be_Keep, emit_nothing);
920 set_emitter(op_sparc_Start, emit_nothing);
921 set_emitter(op_Phi, emit_nothing);
925 * Emits code for a node.
927 static void sparc_emit_node(const ir_node *node)
929 ir_op *op = get_irn_op(node);
931 if (op->ops.generic) {
932 emit_func func = (emit_func) op->ops.generic;
933 be_dbg_set_dbg_info(get_irn_dbg_info(node));
936 panic("No emit handler for node %+F (graph %+F)\n", node,
941 static ir_node *find_next_delay_slot(ir_node *from)
943 ir_node *schedpoint = from;
944 while (!has_delay_slot(schedpoint)) {
945 if (!sched_has_next(schedpoint))
947 schedpoint = sched_next(schedpoint);
953 * Walks over the nodes in a block connected by scheduling edges
954 * and emits code for each node.
956 static void sparc_emit_block(ir_node *block)
959 ir_node *next_delay_slot;
961 assert(is_Block(block));
963 be_gas_emit_block_name(block);
964 be_emit_cstring(":\n");
965 be_emit_write_line();
967 next_delay_slot = find_next_delay_slot(sched_first(block));
968 if (next_delay_slot != NULL)
969 delay_slot_filler = pick_delay_slot_for(next_delay_slot);
971 sched_foreach(block, node) {
972 if (node == delay_slot_filler) {
976 sparc_emit_node(node);
978 if (node == next_delay_slot) {
979 assert(delay_slot_filler == NULL);
980 next_delay_slot = find_next_delay_slot(sched_next(node));
981 if (next_delay_slot != NULL)
982 delay_slot_filler = pick_delay_slot_for(next_delay_slot);
988 * Emits code for function start.
990 static void sparc_emit_func_prolog(ir_graph *irg)
992 ir_entity *ent = get_irg_entity(irg);
993 be_gas_emit_function_prolog(ent, 4);
994 be_emit_write_line();
998 * Emits code for function end
1000 static void sparc_emit_func_epilog(ir_graph *irg)
1002 ir_entity *ent = get_irg_entity(irg);
1003 const char *irg_name = get_entity_ld_name(ent);
1004 be_emit_write_line();
1005 be_emit_irprintf("\t.size %s, .-%s\n", irg_name, irg_name);
1006 be_emit_cstring("# -- End ");
1007 be_emit_string(irg_name);
1008 be_emit_cstring("\n");
1009 be_emit_write_line();
1012 static void sparc_gen_labels(ir_node *block, void *env)
1015 int n = get_Block_n_cfgpreds(block);
1018 for (n--; n >= 0; n--) {
1019 pred = get_Block_cfgpred(block, n);
1020 set_irn_link(pred, block); // link the pred of a block (which is a jmp)
1024 void sparc_emit_routine(ir_graph *irg)
1026 ir_entity *entity = get_irg_entity(irg);
1027 ir_node **block_schedule;
1031 be_gas_elf_type_char = '#';
1032 be_gas_object_file_format = OBJECT_FILE_FORMAT_ELF_SPARC;
1034 heights = heights_new(irg);
1036 /* register all emitter functions */
1037 sparc_register_emitters();
1038 be_dbg_method_begin(entity);
1040 /* create the block schedule. For now, we don't need it earlier. */
1041 block_schedule = be_create_block_schedule(irg);
1043 sparc_emit_func_prolog(irg);
1044 irg_block_walk_graph(irg, sparc_gen_labels, NULL, NULL);
1046 /* inject block scheduling links & emit code of each block */
1047 n = ARR_LEN(block_schedule);
1048 for (i = 0; i < n; ++i) {
1049 ir_node *block = block_schedule[i];
1050 ir_node *next_block = i+1 < n ? block_schedule[i+1] : NULL;
1051 set_irn_link(block, next_block);
1054 for (i = 0; i < n; ++i) {
1055 ir_node *block = block_schedule[i];
1056 if (block == get_irg_end_block(irg))
1058 sparc_emit_block(block);
1061 /* emit function epilog */
1062 sparc_emit_func_epilog(irg);
1064 heights_free(heights);
1067 void sparc_init_emitter(void)
1069 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.emit");