2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief emit assembler for a backend graph
40 #include "raw_bitset.h"
44 #include "../besched.h"
45 #include "../beblocksched.h"
47 #include "../begnuas.h"
48 #include "../be_dbgout.h"
49 #include "../benode.h"
50 #include "../bestack.h"
52 #include "sparc_emitter.h"
53 #include "gen_sparc_emitter.h"
54 #include "sparc_nodes_attr.h"
55 #include "sparc_new_nodes.h"
56 #include "gen_sparc_regalloc_if.h"
58 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
60 static ir_heights_t *heights;
61 static const ir_node *delay_slot_filler; /**< this node has been choosen to fill
62 the next delay slot */
64 static void sparc_emit_node(const ir_node *node);
67 * Returns the register at in position pos.
69 static const arch_register_t *get_in_reg(const ir_node *node, int pos)
72 const arch_register_t *reg = NULL;
74 assert(get_irn_arity(node) > pos && "Invalid IN position");
76 /* The out register of the operator at position pos is the
77 in register we need. */
78 op = get_irn_n(node, pos);
80 reg = arch_get_irn_register(op);
82 assert(reg && "no in register found");
87 * Returns the register at out position pos.
89 static const arch_register_t *get_out_reg(const ir_node *node, int pos)
92 const arch_register_t *reg = NULL;
94 /* 1st case: irn is not of mode_T, so it has only */
95 /* one OUT register -> good */
96 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
97 /* Proj with the corresponding projnum for the register */
99 if (get_irn_mode(node) != mode_T) {
100 reg = arch_get_irn_register(node);
101 } else if (is_sparc_irn(node)) {
102 reg = arch_irn_get_register(node, pos);
104 const ir_edge_t *edge;
106 foreach_out_edge(node, edge) {
107 proj = get_edge_src_irn(edge);
108 assert(is_Proj(proj) && "non-Proj from mode_T node");
109 if (get_Proj_proj(proj) == pos) {
110 reg = arch_get_irn_register(proj);
116 assert(reg && "no out register found");
120 static bool is_valid_immediate(int32_t value)
122 return -4096 <= value && value < 4096;
125 void sparc_emit_immediate(const ir_node *node)
127 const sparc_attr_t *attr = get_sparc_attr_const(node);
128 ir_entity *entity = attr->immediate_value_entity;
130 if (entity == NULL) {
131 int32_t value = attr->immediate_value;
132 assert(is_valid_immediate(value));
133 be_emit_irprintf("%d", value);
135 be_emit_cstring("%lo(");
136 be_gas_emit_entity(entity);
137 if (attr->immediate_value != 0) {
138 be_emit_irprintf("%+d", attr->immediate_value);
144 void sparc_emit_high_immediate(const ir_node *node)
146 const sparc_attr_t *attr = get_sparc_attr_const(node);
147 ir_entity *entity = attr->immediate_value_entity;
149 be_emit_cstring("%hi(");
150 if (entity == NULL) {
151 uint32_t value = (uint32_t) attr->immediate_value;
152 be_emit_irprintf("0x%X", value);
154 be_gas_emit_entity(entity);
155 if (attr->immediate_value != 0) {
156 be_emit_irprintf("%+d", attr->immediate_value);
162 void sparc_emit_source_register(const ir_node *node, int pos)
164 const arch_register_t *reg = get_in_reg(node, pos);
166 be_emit_string(arch_register_get_name(reg));
169 void sparc_emit_dest_register(const ir_node *node, int pos)
171 const arch_register_t *reg = get_out_reg(node, pos);
173 be_emit_string(arch_register_get_name(reg));
177 * Emits either a imm or register depending on arity of node
179 * @param register no (-1 if no register)
181 void sparc_emit_reg_or_imm(const ir_node *node, int pos)
183 if (get_irn_arity(node) > pos) {
185 sparc_emit_source_register(node, pos);
187 // we have a imm input
188 sparc_emit_immediate(node);
192 static bool is_stack_pointer_relative(const ir_node *node)
194 const arch_register_t *sp = &sparc_registers[REG_SP];
195 return (is_sparc_St(node) && get_in_reg(node, n_sparc_St_ptr) == sp)
196 || (is_sparc_Ld(node) && get_in_reg(node, n_sparc_Ld_ptr) == sp);
202 void sparc_emit_offset(const ir_node *node, int offset_node_pos)
204 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
206 if (attr->is_reg_reg) {
207 assert(!attr->is_frame_entity);
208 assert(attr->base.immediate_value == 0);
209 assert(attr->base.immediate_value_entity == NULL);
211 sparc_emit_source_register(node, offset_node_pos);
212 } else if (attr->is_frame_entity) {
213 int32_t offset = attr->base.immediate_value;
214 /* bad hack: the real stack stuff is behind the always-there spill
215 * space for the register window and stack */
216 if (is_stack_pointer_relative(node))
217 offset += SPARC_MIN_STACKSIZE;
219 assert(is_valid_immediate(offset));
220 be_emit_irprintf("%+ld", offset);
222 } else if (attr->base.immediate_value != 0
223 || attr->base.immediate_value_entity != NULL) {
225 sparc_emit_immediate(node);
229 void sparc_emit_float_load_store_mode(const ir_node *node)
231 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
232 ir_mode *mode = attr->load_store_mode;
233 int bits = get_mode_size_bits(mode);
235 assert(mode_is_float(mode));
239 case 64: be_emit_char('d'); return;
240 case 128: be_emit_char('q'); return;
242 panic("invalid flaot load/store mode %+F", mode);
246 * Emit load mode char
248 void sparc_emit_load_mode(const ir_node *node)
250 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
251 ir_mode *mode = attr->load_store_mode;
252 int bits = get_mode_size_bits(mode);
253 bool is_signed = mode_is_signed(mode);
256 be_emit_string(is_signed ? "sh" : "uh");
257 } else if (bits == 8) {
258 be_emit_string(is_signed ? "sb" : "ub");
259 } else if (bits == 64) {
267 * Emit store mode char
269 void sparc_emit_store_mode(const ir_node *node)
271 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
272 ir_mode *mode = attr->load_store_mode;
273 int bits = get_mode_size_bits(mode);
277 } else if (bits == 8) {
279 } else if (bits == 64) {
287 * emit integer signed/unsigned prefix char
289 void sparc_emit_mode_sign_prefix(const ir_node *node)
291 ir_mode *mode = get_irn_mode(node);
292 bool is_signed = mode_is_signed(mode);
293 be_emit_string(is_signed ? "s" : "u");
296 static void emit_fp_suffix(const ir_mode *mode)
298 unsigned bits = get_mode_size_bits(mode);
299 assert(mode_is_float(mode));
303 } else if (bits == 64) {
305 } else if (bits == 128) {
308 panic("invalid FP mode");
312 void sparc_emit_fp_conv_source(const ir_node *node)
314 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
315 emit_fp_suffix(attr->src_mode);
318 void sparc_emit_fp_conv_destination(const ir_node *node)
320 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
321 emit_fp_suffix(attr->dest_mode);
325 * emits the FP mode suffix char
327 void sparc_emit_fp_mode_suffix(const ir_node *node)
329 const sparc_fp_attr_t *attr = get_sparc_fp_attr_const(node);
330 emit_fp_suffix(attr->fp_mode);
333 static ir_node *get_jump_target(const ir_node *jump)
335 return (ir_node*)get_irn_link(jump);
339 * Returns the target label for a control flow node.
341 static void sparc_emit_cfop_target(const ir_node *node)
343 ir_node *block = get_jump_target(node);
344 be_gas_emit_block_name(block);
347 static int get_sparc_Call_dest_addr_pos(const ir_node *node)
349 return get_irn_arity(node)-1;
352 static bool ba_is_fallthrough(const ir_node *node)
354 ir_node *block = get_nodes_block(node);
355 ir_node *next_block = (ir_node*)get_irn_link(block);
356 return get_irn_link(node) == next_block;
359 static bool is_no_instruction(const ir_node *node)
361 /* copies are nops if src_reg == dest_reg */
362 if (be_is_Copy(node) || be_is_CopyKeep(node)) {
363 const arch_register_t *src_reg = get_in_reg(node, 0);
364 const arch_register_t *dest_reg = get_out_reg(node, 0);
366 if (src_reg == dest_reg)
369 if (be_is_IncSP(node) && be_get_IncSP_offset(node) == 0)
371 /* Ba is not emitted if it is a simple fallthrough */
372 if (is_sparc_Ba(node) && ba_is_fallthrough(node))
375 return be_is_Keep(node) || be_is_Start(node) || is_Phi(node);
378 static bool has_delay_slot(const ir_node *node)
380 if (is_sparc_Ba(node) && ba_is_fallthrough(node))
383 return is_sparc_Bicc(node) || is_sparc_fbfcc(node) || is_sparc_Ba(node)
384 || is_sparc_SwitchJmp(node) || is_sparc_Call(node)
385 || is_sparc_SDiv(node) || is_sparc_UDiv(node)
386 || be_is_Return(node);
389 /** returns true if the emitter for this sparc node can produce more than one
390 * actual sparc instruction.
391 * Usually it is a bad sign if we have to add instructions here. We should
392 * rather try to get them lowered down. So we can actually put them into
393 * delay slots and make them more accessible to the scheduler.
395 static bool emits_multiple_instructions(const ir_node *node)
397 if (has_delay_slot(node))
400 return is_sparc_Mulh(node) || is_sparc_SDiv(node) || is_sparc_UDiv(node)
401 || be_is_MemPerm(node) || be_is_Perm(node);
405 * search for an instruction that can fill the delay slot of @p node
407 static const ir_node *pick_delay_slot_for(const ir_node *node)
409 const ir_node *check = node;
410 const ir_node *schedpoint = node;
412 /* currently we don't track which registers are still alive, so we can't
413 * pick any other instructions other than the one directly preceding */
414 static const unsigned PICK_DELAY_SLOT_MAX_DISTANCE = 1;
416 assert(has_delay_slot(node));
418 if (is_sparc_Call(node)) {
419 const sparc_attr_t *attr = get_sparc_attr_const(node);
420 ir_entity *entity = attr->immediate_value_entity;
421 if (entity != NULL) {
422 check = NULL; /* pick any instruction, dependencies on Call
425 /* we only need to check the value for the call destination */
426 check = get_irn_n(node, get_sparc_Call_dest_addr_pos(node));
429 /* the Call also destroys the value of %o7, but since this is currently
430 * marked as ignore register in the backend, it should never be used by
431 * the instruction in the delay slot. */
432 } else if (be_is_Return(node)) {
433 /* we only have to check the jump destination value */
434 int arity = get_irn_arity(node);
438 for (i = 0; i < arity; ++i) {
439 ir_node *in = get_irn_n(node, i);
440 const arch_register_t *reg = arch_get_irn_register(in);
441 if (reg == &sparc_registers[REG_O7]) {
442 check = skip_Proj(in);
450 while (sched_has_prev(schedpoint)) {
451 schedpoint = sched_prev(schedpoint);
453 if (has_delay_slot(schedpoint))
456 /* skip things which don't really result in instructions */
457 if (is_no_instruction(schedpoint))
460 if (tries++ >= PICK_DELAY_SLOT_MAX_DISTANCE)
463 if (emits_multiple_instructions(schedpoint))
466 /* allowed for delayslot: any instruction which is not necessary to
467 * compute an input to the branch. */
469 && heights_reachable_in_block(heights, check, schedpoint))
472 /* found something */
480 * Emits code for stack space management
482 static void emit_be_IncSP(const ir_node *irn)
484 int offs = -be_get_IncSP_offset(irn);
489 /* SPARC stack grows downwards */
491 be_emit_cstring("\tsub ");
494 be_emit_cstring("\tadd ");
497 sparc_emit_source_register(irn, 0);
498 be_emit_irprintf(", %d", offs);
499 be_emit_cstring(", ");
500 sparc_emit_dest_register(irn, 0);
501 be_emit_finish_line_gas(irn);
505 * emits code for mulh
507 static void emit_sparc_Mulh(const ir_node *irn)
509 be_emit_cstring("\t");
510 sparc_emit_mode_sign_prefix(irn);
511 be_emit_cstring("mul ");
513 sparc_emit_source_register(irn, 0);
514 be_emit_cstring(", ");
515 sparc_emit_reg_or_imm(irn, 1);
516 be_emit_cstring(", ");
517 sparc_emit_dest_register(irn, 0);
518 be_emit_finish_line_gas(irn);
520 // our result is in the y register now
521 // we just copy it to the assigned target reg
522 be_emit_cstring("\tmov %y, ");
523 sparc_emit_dest_register(irn, 0);
524 be_emit_finish_line_gas(irn);
527 static void fill_delay_slot(void)
529 if (delay_slot_filler != NULL) {
530 sparc_emit_node(delay_slot_filler);
531 delay_slot_filler = NULL;
533 be_emit_cstring("\tnop\n");
534 be_emit_write_line();
538 static void emit_sparc_Div(const ir_node *node, bool is_signed)
540 /* can we get the delay count of the wr instruction somewhere? */
541 unsigned wry_delay_count = 3;
544 be_emit_cstring("\twr ");
545 sparc_emit_source_register(node, 0);
546 be_emit_cstring(", 0, %y");
547 be_emit_finish_line_gas(node);
549 for (i = 0; i < wry_delay_count; ++i) {
553 be_emit_irprintf("\t%s ", is_signed ? "sdiv" : "udiv");
554 sparc_emit_source_register(node, 1);
555 be_emit_cstring(", ");
556 sparc_emit_reg_or_imm(node, 2);
557 be_emit_cstring(", ");
558 sparc_emit_dest_register(node, 0);
559 be_emit_finish_line_gas(node);
562 static void emit_sparc_SDiv(const ir_node *node)
564 emit_sparc_Div(node, true);
567 static void emit_sparc_UDiv(const ir_node *node)
569 emit_sparc_Div(node, false);
573 * Emits code for Call node
575 static void emit_sparc_Call(const ir_node *node)
577 const sparc_attr_t *attr = get_sparc_attr_const(node);
578 ir_entity *entity = attr->immediate_value_entity;
580 be_emit_cstring("\tcall ");
581 if (entity != NULL) {
582 be_gas_emit_entity(entity);
583 if (attr->immediate_value != 0) {
584 be_emit_irprintf("%+d", attr->immediate_value);
586 be_emit_cstring(", 0");
588 int dest_addr = get_sparc_Call_dest_addr_pos(node);
589 sparc_emit_source_register(node, dest_addr);
591 be_emit_finish_line_gas(node);
597 * Emit code for Perm node
599 static void emit_be_Perm(const ir_node *irn)
601 be_emit_cstring("\txor ");
602 sparc_emit_source_register(irn, 1);
603 be_emit_cstring(", ");
604 sparc_emit_source_register(irn, 0);
605 be_emit_cstring(", ");
606 sparc_emit_source_register(irn, 0);
607 be_emit_finish_line_gas(NULL);
609 be_emit_cstring("\txor ");
610 sparc_emit_source_register(irn, 1);
611 be_emit_cstring(", ");
612 sparc_emit_source_register(irn, 0);
613 be_emit_cstring(", ");
614 sparc_emit_source_register(irn, 1);
615 be_emit_finish_line_gas(NULL);
617 be_emit_cstring("\txor ");
618 sparc_emit_source_register(irn, 1);
619 be_emit_cstring(", ");
620 sparc_emit_source_register(irn, 0);
621 be_emit_cstring(", ");
622 sparc_emit_source_register(irn, 0);
623 be_emit_finish_line_gas(irn);
626 static void emit_be_MemPerm(const ir_node *node)
631 ir_graph *irg = get_irn_irg(node);
632 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
634 /* this implementation only works with frame pointers currently */
635 assert(layout->sp_relative == false);
637 /* TODO: this implementation is slower than necessary.
638 The longterm goal is however to avoid the memperm node completely */
640 memperm_arity = be_get_MemPerm_entity_arity(node);
641 // we use our local registers - so this is limited to 8 inputs !
642 if (memperm_arity > 8)
643 panic("memperm with more than 8 inputs not supported yet");
645 be_emit_irprintf("\tsub %%sp, %d, %%sp", memperm_arity*4);
646 be_emit_finish_line_gas(node);
648 for (i = 0; i < memperm_arity; ++i) {
649 ir_entity *entity = be_get_MemPerm_in_entity(node, i);
650 int offset = be_get_stack_entity_offset(layout, entity, 0);
653 be_emit_irprintf("\tst %%l%d, [%%sp%+d]", i, sp_change + SPARC_MIN_STACKSIZE);
654 be_emit_finish_line_gas(node);
656 /* load from entity */
657 be_emit_irprintf("\tld [%%fp%+d], %%l%d", offset, i);
658 be_emit_finish_line_gas(node);
662 for (i = memperm_arity-1; i >= 0; --i) {
663 ir_entity *entity = be_get_MemPerm_out_entity(node, i);
664 int offset = be_get_stack_entity_offset(layout, entity, 0);
668 /* store to new entity */
669 be_emit_irprintf("\tst %%l%d, [%%fp%+d]", i, offset);
670 be_emit_finish_line_gas(node);
671 /* restore register */
672 be_emit_irprintf("\tld [%%sp%+d], %%l%d", sp_change + SPARC_MIN_STACKSIZE, i);
673 be_emit_finish_line_gas(node);
676 be_emit_irprintf("\tadd %%sp, %d, %%sp", memperm_arity*4);
677 be_emit_finish_line_gas(node);
679 assert(sp_change == 0);
682 static void emit_be_Return(const ir_node *node)
684 const char *destreg = "%o7";
686 /* hack: we don't explicitely model register changes because of the
687 * restore node. So we have to do it manually here */
688 if (delay_slot_filler != NULL &&
689 (is_sparc_Restore(delay_slot_filler)
690 || is_sparc_RestoreZero(delay_slot_filler))) {
693 be_emit_cstring("\tjmp ");
694 be_emit_string(destreg);
695 be_emit_cstring("+8");
696 be_emit_finish_line_gas(node);
700 static void emit_sparc_FrameAddr(const ir_node *node)
702 const sparc_attr_t *attr = get_sparc_attr_const(node);
704 // no need to fix offset as we are adressing via the framepointer
705 if (attr->immediate_value >= 0) {
706 be_emit_cstring("\tadd ");
707 sparc_emit_source_register(node, 0);
708 be_emit_cstring(", ");
709 be_emit_irprintf("%ld", attr->immediate_value);
711 be_emit_cstring("\tsub ");
712 sparc_emit_source_register(node, 0);
713 be_emit_cstring(", ");
714 be_emit_irprintf("%ld", -attr->immediate_value);
717 be_emit_cstring(", ");
718 sparc_emit_dest_register(node, 0);
719 be_emit_finish_line_gas(node);
722 static const char *get_icc_unsigned(ir_relation relation)
724 switch (relation & (ir_relation_less_equal_greater)) {
725 case ir_relation_false: return "bn";
726 case ir_relation_equal: return "be";
727 case ir_relation_less: return "blu";
728 case ir_relation_less_equal: return "bleu";
729 case ir_relation_greater: return "bgu";
730 case ir_relation_greater_equal: return "bgeu";
731 case ir_relation_less_greater: return "bne";
732 case ir_relation_less_equal_greater: return "ba";
733 default: panic("Cmp has unsupported relation");
737 static const char *get_icc_signed(ir_relation relation)
739 switch (relation & (ir_relation_less_equal_greater)) {
740 case ir_relation_false: return "bn";
741 case ir_relation_equal: return "be";
742 case ir_relation_less: return "bl";
743 case ir_relation_less_equal: return "ble";
744 case ir_relation_greater: return "bg";
745 case ir_relation_greater_equal: return "bge";
746 case ir_relation_less_greater: return "bne";
747 case ir_relation_less_equal_greater: return "ba";
748 default: panic("Cmp has unsupported relation");
752 static const char *get_fcc(ir_relation relation)
755 case ir_relation_false: return "fbn";
756 case ir_relation_equal: return "fbe";
757 case ir_relation_less: return "fbl";
758 case ir_relation_less_equal: return "fble";
759 case ir_relation_greater: return "fbg";
760 case ir_relation_greater_equal: return "fbge";
761 case ir_relation_less_greater: return "fblg";
762 case ir_relation_less_equal_greater: return "fbo";
763 case ir_relation_unordered: return "fbu";
764 case ir_relation_unordered_equal: return "fbue";
765 case ir_relation_unordered_less: return "fbul";
766 case ir_relation_unordered_less_equal: return "fbule";
767 case ir_relation_unordered_greater: return "fbug";
768 case ir_relation_unordered_greater_equal: return "fbuge";
769 case ir_relation_unordered_less_greater: return "fbne";
770 case ir_relation_true: return "fba";
772 panic("invalid relation");
775 typedef const char* (*get_cc_func)(ir_relation relation);
777 static void emit_sparc_branch(const ir_node *node, get_cc_func get_cc)
779 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
780 ir_relation relation = attr->relation;
781 const ir_node *proj_true = NULL;
782 const ir_node *proj_false = NULL;
783 const ir_edge_t *edge;
784 const ir_node *block;
785 const ir_node *next_block;
787 foreach_out_edge(node, edge) {
788 ir_node *proj = get_edge_src_irn(edge);
789 long nr = get_Proj_proj(proj);
790 if (nr == pn_Cond_true) {
797 /* for now, the code works for scheduled and non-schedules blocks */
798 block = get_nodes_block(node);
800 /* we have a block schedule */
801 next_block = (ir_node*)get_irn_link(block);
803 if (get_irn_link(proj_true) == next_block) {
804 /* exchange both proj's so the second one can be omitted */
805 const ir_node *t = proj_true;
807 proj_true = proj_false;
809 relation = get_negated_relation(relation);
812 /* emit the true proj */
813 be_emit_cstring("\t");
814 be_emit_string(get_cc(relation));
816 sparc_emit_cfop_target(proj_true);
817 be_emit_finish_line_gas(proj_true);
821 if (get_irn_link(proj_false) == next_block) {
822 be_emit_cstring("\t/* fallthrough to ");
823 sparc_emit_cfop_target(proj_false);
824 be_emit_cstring(" */");
825 be_emit_finish_line_gas(proj_false);
827 be_emit_cstring("\tba ");
828 sparc_emit_cfop_target(proj_false);
829 be_emit_finish_line_gas(proj_false);
834 static void emit_sparc_Bicc(const ir_node *node)
836 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
837 bool is_unsigned = attr->is_unsigned;
838 emit_sparc_branch(node, is_unsigned ? get_icc_unsigned : get_icc_signed);
841 static void emit_sparc_fbfcc(const ir_node *node)
843 emit_sparc_branch(node, get_fcc);
846 static void emit_sparc_Ba(const ir_node *node)
848 if (ba_is_fallthrough(node)) {
849 be_emit_cstring("\t/* fallthrough to ");
850 sparc_emit_cfop_target(node);
851 be_emit_cstring(" */");
853 be_emit_cstring("\tba ");
854 sparc_emit_cfop_target(node);
855 be_emit_finish_line_gas(node);
858 be_emit_finish_line_gas(node);
861 static void emit_jump_table(const ir_node *node)
863 const sparc_switch_jmp_attr_t *attr = get_sparc_switch_jmp_attr_const(node);
864 long switch_max = LONG_MIN;
865 long default_pn = attr->default_proj_num;
866 ir_entity *entity = attr->jump_table;
867 ir_node *default_block = NULL;
868 unsigned long length;
869 const ir_edge_t *edge;
873 /* go over all proj's and collect them */
874 foreach_out_edge(node, edge) {
875 ir_node *proj = get_edge_src_irn(edge);
876 long pn = get_Proj_proj(proj);
878 /* check for default proj */
879 if (pn == default_pn) {
880 assert(default_block == NULL); /* more than 1 default_pn? */
881 default_block = get_jump_target(proj);
883 switch_max = pn > switch_max ? pn : switch_max;
886 assert(switch_max > LONG_MIN);
888 length = (unsigned long) switch_max + 1;
889 /* the 16000 isn't a real limit of the architecture. But should protect us
890 * from seamingly endless compiler runs */
891 if (length > 16000) {
892 /* switch lowerer should have broken this monster to pieces... */
893 panic("too large switch encountered");
896 table = XMALLOCNZ(ir_node*, length);
897 foreach_out_edge(node, edge) {
898 ir_node *proj = get_edge_src_irn(edge);
899 long pn = get_Proj_proj(proj);
900 if (pn == default_pn)
903 table[pn] = get_jump_target(proj);
907 be_gas_emit_switch_section(GAS_SECTION_RODATA);
908 be_emit_cstring("\t.align 4\n");
909 be_gas_emit_entity(entity);
910 be_emit_cstring(":\n");
911 for (i = 0; i < length; ++i) {
912 ir_node *block = table[i];
914 block = default_block;
915 be_emit_cstring("\t.long ");
916 be_gas_emit_block_name(block);
918 be_emit_write_line();
920 be_gas_emit_switch_section(GAS_SECTION_TEXT);
925 static void emit_sparc_SwitchJmp(const ir_node *node)
927 be_emit_cstring("\tjmp ");
928 sparc_emit_source_register(node, 0);
929 be_emit_finish_line_gas(node);
932 emit_jump_table(node);
935 static void emit_fmov(const ir_node *node, const arch_register_t *src_reg,
936 const arch_register_t *dst_reg)
938 be_emit_cstring("\tfmovs %");
939 be_emit_string(arch_register_get_name(src_reg));
940 be_emit_cstring(", %");
941 be_emit_string(arch_register_get_name(dst_reg));
942 be_emit_finish_line_gas(node);
945 static const arch_register_t *get_next_fp_reg(const arch_register_t *reg)
947 unsigned index = reg->global_index;
948 assert(reg == &sparc_registers[index]);
950 assert(index - REG_F0 < N_sparc_fp_REGS);
951 return &sparc_registers[index];
954 static void emit_be_Copy(const ir_node *node)
956 ir_mode *mode = get_irn_mode(node);
957 const arch_register_t *src_reg = get_in_reg(node, 0);
958 const arch_register_t *dst_reg = get_out_reg(node, 0);
960 if (src_reg == dst_reg)
963 if (mode_is_float(mode)) {
964 unsigned bits = get_mode_size_bits(mode);
965 int n = bits > 32 ? bits > 64 ? 3 : 1 : 0;
967 emit_fmov(node, src_reg, dst_reg);
968 for (i = 0; i < n; ++i) {
969 src_reg = get_next_fp_reg(src_reg);
970 dst_reg = get_next_fp_reg(dst_reg);
971 emit_fmov(node, src_reg, dst_reg);
973 } else if (mode_is_data(mode)) {
974 be_emit_cstring("\tmov ");
975 sparc_emit_source_register(node, 0);
976 be_emit_cstring(", ");
977 sparc_emit_dest_register(node, 0);
978 be_emit_finish_line_gas(node);
980 panic("emit_be_Copy: invalid mode");
984 static void emit_nothing(const ir_node *irn)
989 typedef void (*emit_func) (const ir_node *);
991 static inline void set_emitter(ir_op *op, emit_func sparc_emit_node)
993 op->ops.generic = (op_func)sparc_emit_node;
997 * Enters the emitter functions for handled nodes into the generic
998 * pointer of an opcode.
1000 static void sparc_register_emitters(void)
1002 /* first clear the generic function pointer for all ops */
1003 clear_irp_opcodes_generic_func();
1004 /* register all emitter functions defined in spec */
1005 sparc_register_spec_emitters();
1007 /* custom emitter */
1008 set_emitter(op_be_Copy, emit_be_Copy);
1009 set_emitter(op_be_CopyKeep, emit_be_Copy);
1010 set_emitter(op_be_IncSP, emit_be_IncSP);
1011 set_emitter(op_be_MemPerm, emit_be_MemPerm);
1012 set_emitter(op_be_Perm, emit_be_Perm);
1013 set_emitter(op_be_Return, emit_be_Return);
1014 set_emitter(op_sparc_Ba, emit_sparc_Ba);
1015 set_emitter(op_sparc_Bicc, emit_sparc_Bicc);
1016 set_emitter(op_sparc_Call, emit_sparc_Call);
1017 set_emitter(op_sparc_fbfcc, emit_sparc_fbfcc);
1018 set_emitter(op_sparc_FrameAddr, emit_sparc_FrameAddr);
1019 set_emitter(op_sparc_Mulh, emit_sparc_Mulh);
1020 set_emitter(op_sparc_SDiv, emit_sparc_SDiv);
1021 set_emitter(op_sparc_SwitchJmp, emit_sparc_SwitchJmp);
1022 set_emitter(op_sparc_UDiv, emit_sparc_UDiv);
1024 /* no need to emit anything for the following nodes */
1025 set_emitter(op_be_Keep, emit_nothing);
1026 set_emitter(op_be_Start, emit_nothing);
1027 set_emitter(op_Phi, emit_nothing);
1031 * Emits code for a node.
1033 static void sparc_emit_node(const ir_node *node)
1035 ir_op *op = get_irn_op(node);
1037 if (op->ops.generic) {
1038 emit_func func = (emit_func) op->ops.generic;
1039 be_dbg_set_dbg_info(get_irn_dbg_info(node));
1042 panic("No emit handler for node %+F (graph %+F)\n", node,
1047 static ir_node *find_next_delay_slot(ir_node *from)
1049 ir_node *schedpoint = from;
1050 while (!has_delay_slot(schedpoint)) {
1051 if (!sched_has_next(schedpoint))
1053 schedpoint = sched_next(schedpoint);
1059 * Walks over the nodes in a block connected by scheduling edges
1060 * and emits code for each node.
1062 static void sparc_emit_block(ir_node *block)
1065 ir_node *next_delay_slot;
1067 assert(is_Block(block));
1069 be_gas_emit_block_name(block);
1070 be_emit_cstring(":\n");
1071 be_emit_write_line();
1073 next_delay_slot = find_next_delay_slot(sched_first(block));
1074 if (next_delay_slot != NULL)
1075 delay_slot_filler = pick_delay_slot_for(next_delay_slot);
1077 sched_foreach(block, node) {
1078 if (node == delay_slot_filler) {
1082 sparc_emit_node(node);
1084 if (node == next_delay_slot) {
1085 assert(delay_slot_filler == NULL);
1086 next_delay_slot = find_next_delay_slot(sched_next(node));
1087 if (next_delay_slot != NULL)
1088 delay_slot_filler = pick_delay_slot_for(next_delay_slot);
1094 * Emits code for function start.
1096 static void sparc_emit_func_prolog(ir_graph *irg)
1098 ir_entity *ent = get_irg_entity(irg);
1099 be_gas_emit_function_prolog(ent, 4);
1100 be_emit_write_line();
1104 * Emits code for function end
1106 static void sparc_emit_func_epilog(ir_graph *irg)
1108 ir_entity *ent = get_irg_entity(irg);
1109 const char *irg_name = get_entity_ld_name(ent);
1110 be_emit_write_line();
1111 be_emit_irprintf("\t.size %s, .-%s\n", irg_name, irg_name);
1112 be_emit_cstring("# -- End ");
1113 be_emit_string(irg_name);
1114 be_emit_cstring("\n");
1115 be_emit_write_line();
1118 static void sparc_gen_labels(ir_node *block, void *env)
1121 int n = get_Block_n_cfgpreds(block);
1124 for (n--; n >= 0; n--) {
1125 pred = get_Block_cfgpred(block, n);
1126 set_irn_link(pred, block); // link the pred of a block (which is a jmp)
1130 void sparc_emit_routine(ir_graph *irg)
1132 ir_entity *entity = get_irg_entity(irg);
1133 ir_node **block_schedule;
1137 be_gas_elf_type_char = '#';
1138 be_gas_object_file_format = OBJECT_FILE_FORMAT_ELF_SPARC;
1140 heights = heights_new(irg);
1142 /* register all emitter functions */
1143 sparc_register_emitters();
1144 be_dbg_method_begin(entity);
1146 /* create the block schedule. For now, we don't need it earlier. */
1147 block_schedule = be_create_block_schedule(irg);
1149 sparc_emit_func_prolog(irg);
1150 irg_block_walk_graph(irg, sparc_gen_labels, NULL, NULL);
1152 /* inject block scheduling links & emit code of each block */
1153 n = ARR_LEN(block_schedule);
1154 for (i = 0; i < n; ++i) {
1155 ir_node *block = block_schedule[i];
1156 ir_node *next_block = i+1 < n ? block_schedule[i+1] : NULL;
1157 set_irn_link(block, next_block);
1160 for (i = 0; i < n; ++i) {
1161 ir_node *block = block_schedule[i];
1162 if (block == get_irg_end_block(irg))
1164 sparc_emit_block(block);
1167 /* emit function epilog */
1168 sparc_emit_func_epilog(irg);
1170 heights_free(heights);
1173 void sparc_init_emitter(void)
1175 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.emit");