2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief emit assembler for a backend graph
40 #include "raw_bitset.h"
43 #include "../besched.h"
44 #include "../beblocksched.h"
46 #include "../begnuas.h"
47 #include "../be_dbgout.h"
48 #include "../benode.h"
50 #include "sparc_emitter.h"
51 #include "gen_sparc_emitter.h"
52 #include "sparc_nodes_attr.h"
53 #include "sparc_new_nodes.h"
54 #include "gen_sparc_regalloc_if.h"
56 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
59 * Returns the register at in position pos.
61 static const arch_register_t *get_in_reg(const ir_node *node, int pos)
64 const arch_register_t *reg = NULL;
66 assert(get_irn_arity(node) > pos && "Invalid IN position");
68 /* The out register of the operator at position pos is the
69 in register we need. */
70 op = get_irn_n(node, pos);
72 reg = arch_get_irn_register(op);
74 assert(reg && "no in register found");
79 * Returns the register at out position pos.
81 static const arch_register_t *get_out_reg(const ir_node *node, int pos)
84 const arch_register_t *reg = NULL;
86 /* 1st case: irn is not of mode_T, so it has only */
87 /* one OUT register -> good */
88 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
89 /* Proj with the corresponding projnum for the register */
91 if (get_irn_mode(node) != mode_T) {
92 reg = arch_get_irn_register(node);
93 } else if (is_sparc_irn(node)) {
94 reg = arch_irn_get_register(node, pos);
96 const ir_edge_t *edge;
98 foreach_out_edge(node, edge) {
99 proj = get_edge_src_irn(edge);
100 assert(is_Proj(proj) && "non-Proj from mode_T node");
101 if (get_Proj_proj(proj) == pos) {
102 reg = arch_get_irn_register(proj);
108 assert(reg && "no out register found");
112 void sparc_emit_immediate(const ir_node *node)
114 int const val = get_sparc_attr_const(node)->immediate_value;
115 assert(-4096 <= val && val < 4096);
116 be_emit_irprintf("%d", val);
119 void sparc_emit_source_register(const ir_node *node, int pos)
121 const arch_register_t *reg = get_in_reg(node, pos);
123 be_emit_string(arch_register_get_name(reg));
126 void sparc_emit_dest_register(const ir_node *node, int pos)
128 const arch_register_t *reg = get_out_reg(node, pos);
130 be_emit_string(arch_register_get_name(reg));
134 * Emits either a imm or register depending on arity of node
136 * @param register no (-1 if no register)
138 void sparc_emit_reg_or_imm(const ir_node *node, int pos)
140 if (get_irn_arity(node) > pos) {
142 sparc_emit_source_register(node, pos);
144 // we have a imm input
145 sparc_emit_immediate(node);
149 static bool is_stack_pointer_relative(const ir_node *node)
151 const arch_register_t *sp = &sparc_gp_regs[REG_SP];
152 return (is_sparc_St(node) && get_in_reg(node, n_sparc_St_ptr) == sp)
153 || (is_sparc_Ld(node) && get_in_reg(node, n_sparc_Ld_ptr) == sp);
159 void sparc_emit_offset(const ir_node *node)
161 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
162 long offset = attr->offset;
164 /* bad hack: the real stack stuff is behind the always-there spill
165 * space for the register window and stack */
166 if (is_stack_pointer_relative(node))
167 offset += SPARC_MIN_STACKSIZE;
169 be_emit_irprintf("%+ld", offset);
175 * Emit load mode char
177 void sparc_emit_load_mode(const ir_node *node)
179 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
180 ir_mode *mode = attr->load_store_mode;
181 int bits = get_mode_size_bits(mode);
182 bool is_signed = mode_is_signed(mode);
185 be_emit_string(is_signed ? "sh" : "uh");
186 } else if (bits == 8) {
187 be_emit_string(is_signed ? "sb" : "ub");
188 } else if (bits == 64) {
196 * Emit store mode char
198 void sparc_emit_store_mode(const ir_node *node)
200 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
201 ir_mode *mode = attr->load_store_mode;
202 int bits = get_mode_size_bits(mode);
206 } else if (bits == 8) {
208 } else if (bits == 64) {
216 * emit integer signed/unsigned prefix char
218 void sparc_emit_mode_sign_prefix(const ir_node *node)
220 ir_mode *mode = get_irn_mode(node);
221 bool is_signed = mode_is_signed(mode);
222 be_emit_string(is_signed ? "s" : "u");
225 static void emit_fp_suffix(const ir_mode *mode)
227 unsigned bits = get_mode_size_bits(mode);
228 assert(mode_is_float(mode));
232 } else if (bits == 64) {
234 } else if (bits == 128) {
237 panic("invalid FP mode");
241 void sparc_emit_fp_conv_source(const ir_node *node)
243 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
244 emit_fp_suffix(attr->src_mode);
247 void sparc_emit_fp_conv_destination(const ir_node *node)
249 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
250 emit_fp_suffix(attr->dest_mode);
254 * emits the FP mode suffix char
256 void sparc_emit_fp_mode_suffix(const ir_node *node)
258 const sparc_fp_attr_t *attr = get_sparc_fp_attr_const(node);
259 emit_fp_suffix(attr->fp_mode);
263 * Returns the target label for a control flow node.
265 static void sparc_emit_cfop_target(const ir_node *node)
267 ir_node *block = get_irn_link(node);
268 be_gas_emit_block_name(block);
274 static void sparc_emit_entity(ir_entity *entity)
276 be_gas_emit_entity(entity);
280 * Emits code for stack space management
282 static void emit_be_IncSP(const ir_node *irn)
284 int offs = -be_get_IncSP_offset(irn);
289 /* SPARC stack grows downwards */
291 be_emit_cstring("\tsub ");
294 be_emit_cstring("\tadd ");
297 sparc_emit_source_register(irn, 0);
298 be_emit_irprintf(", %d", offs);
299 be_emit_cstring(", ");
300 sparc_emit_dest_register(irn, 0);
301 be_emit_finish_line_gas(irn);
305 * emits code for save instruction with min. required stack space
307 static void emit_sparc_Save(const ir_node *irn)
309 const sparc_save_attr_t *save_attr = get_sparc_save_attr_const(irn);
310 be_emit_cstring("\tsave ");
311 sparc_emit_source_register(irn, 0);
312 be_emit_irprintf(", %d, ", -save_attr->initial_stacksize);
313 sparc_emit_dest_register(irn, 0);
314 be_emit_finish_line_gas(irn);
318 * emits code to load hi 22 bit of a constant
320 static void emit_sparc_HiImm(const ir_node *irn)
322 const sparc_attr_t *attr = get_sparc_attr_const(irn);
323 be_emit_cstring("\tsethi ");
324 be_emit_irprintf("%%hi(%d), ", attr->immediate_value);
325 sparc_emit_dest_register(irn, 0);
326 be_emit_finish_line_gas(irn);
330 * emits code to load lo 10bits of a constant
332 static void emit_sparc_LoImm(const ir_node *irn)
334 const sparc_attr_t *attr = get_sparc_attr_const(irn);
335 be_emit_cstring("\tor ");
336 sparc_emit_source_register(irn, 0);
337 be_emit_irprintf(", %%lo(%d), ", attr->immediate_value);
338 sparc_emit_dest_register(irn, 0);
339 be_emit_finish_line_gas(irn);
343 * emits code for mulh
345 static void emit_sparc_Mulh(const ir_node *irn)
347 be_emit_cstring("\t");
348 sparc_emit_mode_sign_prefix(irn);
349 be_emit_cstring("mul ");
351 sparc_emit_source_register(irn, 0);
352 be_emit_cstring(", ");
353 sparc_emit_reg_or_imm(irn, 1);
354 be_emit_cstring(", ");
355 sparc_emit_dest_register(irn, 0);
356 be_emit_finish_line_gas(irn);
358 // our result is in the y register now
359 // we just copy it to the assigned target reg
360 be_emit_cstring("\tmov %y, ");
361 sparc_emit_dest_register(irn, 0);
362 be_emit_finish_line_gas(irn);
365 static void emit_sparc_Div(const ir_node *node, bool is_signed)
367 /* can we get the delay count of the wr instruction somewhere? */
368 unsigned wry_delay_count = 3;
371 be_emit_cstring("\twr ");
372 sparc_emit_source_register(node, 0);
373 be_emit_cstring(", 0, %y");
374 be_emit_finish_line_gas(node);
376 for (i = 0; i < wry_delay_count; ++i) {
377 be_emit_cstring("\tnop");
378 be_emit_finish_line_gas(node);
381 be_emit_irprintf("\t%s ", is_signed ? "sdiv" : "udiv");
382 sparc_emit_source_register(node, 1);
383 be_emit_cstring(", ");
384 sparc_emit_source_register(node, 2);
385 be_emit_cstring(", ");
386 sparc_emit_dest_register(node, 0);
387 be_emit_finish_line_gas(node);
390 static void emit_sparc_SDiv(const ir_node *node)
393 /* aehm we would need an aditional register for an sra instruction to
394 * compute the upper bits... Just panic for now */
395 //emit_sparc_Div(node, true);
396 panic("signed div is wrong");
399 static void emit_sparc_UDiv(const ir_node *node)
401 emit_sparc_Div(node, false);
405 * Emits code for return node
407 static void emit_be_Return(const ir_node *irn)
409 be_emit_cstring("\tret");
410 //be_emit_cstring("\tjmp %i7+8");
411 be_emit_finish_line_gas(irn);
412 be_emit_cstring("\trestore");
413 be_emit_finish_line_gas(irn);
417 * Emits code for Call node
419 static void emit_sparc_Call(const ir_node *node)
421 const sparc_attr_t *attr = get_sparc_attr_const(node);
422 ir_entity *entity = attr->immediate_value_entity;
424 be_emit_cstring("\tcall ");
425 if (entity != NULL) {
426 sparc_emit_entity(entity);
427 be_emit_cstring(", 0");
429 int last = get_irn_arity(node);
430 sparc_emit_source_register(node, last-1);
432 be_emit_finish_line_gas(node);
434 /* fill delay slot */
435 be_emit_cstring("\tnop");
436 be_emit_finish_line_gas(node);
440 * Emit code for Perm node
442 static void emit_be_Perm(const ir_node *irn)
444 be_emit_cstring("\txor ");
445 sparc_emit_source_register(irn, 1);
446 be_emit_cstring(", ");
447 sparc_emit_source_register(irn, 0);
448 be_emit_cstring(", ");
449 sparc_emit_source_register(irn, 0);
450 be_emit_finish_line_gas(NULL);
452 be_emit_cstring("\txor ");
453 sparc_emit_source_register(irn, 1);
454 be_emit_cstring(", ");
455 sparc_emit_source_register(irn, 0);
456 be_emit_cstring(", ");
457 sparc_emit_source_register(irn, 1);
458 be_emit_finish_line_gas(NULL);
460 be_emit_cstring("\txor ");
461 sparc_emit_source_register(irn, 1);
462 be_emit_cstring(", ");
463 sparc_emit_source_register(irn, 0);
464 be_emit_cstring(", ");
465 sparc_emit_source_register(irn, 0);
466 be_emit_finish_line_gas(irn);
470 * TODO: not really tested but seems to work with memperm_arity == 1
472 static void emit_be_MemPerm(const ir_node *node)
477 ir_graph *irg = get_irn_irg(node);
478 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
480 /* this implementation only works with frame pointers currently */
481 assert(layout->sp_relative == false);
483 /* TODO: this implementation is slower than necessary.
484 The longterm goal is however to avoid the memperm node completely */
486 memperm_arity = be_get_MemPerm_entity_arity(node);
487 // we use our local registers - so this is limited to 8 inputs !
488 if (memperm_arity > 8)
489 panic("memperm with more than 8 inputs not supported yet");
491 be_emit_irprintf("\tsub %%sp, %d, %%sp", memperm_arity*4);
492 be_emit_finish_line_gas(node);
494 for (i = 0; i < memperm_arity; ++i) {
495 ir_entity *entity = be_get_MemPerm_in_entity(node, i);
496 int offset = be_get_stack_entity_offset(layout, entity, 0);
499 be_emit_irprintf("\tst %%l%d, [%%sp%+d]", i, sp_change + SPARC_MIN_STACKSIZE);
500 be_emit_finish_line_gas(node);
502 /* load from entity */
503 be_emit_irprintf("\tld [%%fp%+d], %%l%d", offset, i);
504 be_emit_finish_line_gas(node);
508 for (i = memperm_arity-1; i >= 0; --i) {
509 ir_entity *entity = be_get_MemPerm_out_entity(node, i);
510 int offset = be_get_stack_entity_offset(layout, entity, 0);
514 /* store to new entity */
515 be_emit_irprintf("\tst %%l%d, [%%fp%+d]", i, offset);
516 be_emit_finish_line_gas(node);
517 /* restore register */
518 be_emit_irprintf("\tld [%%sp%+d], %%l%d", sp_change + SPARC_MIN_STACKSIZE, i);
519 be_emit_finish_line_gas(node);
522 be_emit_irprintf("\tadd %%sp, %d, %%sp", memperm_arity*4);
523 be_emit_finish_line_gas(node);
525 assert(sp_change == 0);
531 static void emit_sparc_SymConst(const ir_node *irn)
533 const sparc_symconst_attr_t *attr = get_sparc_symconst_attr_const(irn);
535 //sethi %hi(const32),%reg
536 //or %reg,%lo(const32),%reg
538 be_emit_cstring("\tsethi %hi(");
539 be_gas_emit_entity(attr->entity);
540 be_emit_cstring("), ");
541 sparc_emit_dest_register(irn, 0);
542 be_emit_cstring("\n ");
544 // TODO: could be combined with the following load/store instruction
545 be_emit_cstring("\tor ");
546 sparc_emit_dest_register(irn, 0);
547 be_emit_cstring(", %lo(");
548 be_gas_emit_entity(attr->entity);
549 be_emit_cstring("), ");
550 sparc_emit_dest_register(irn, 0);
551 be_emit_finish_line_gas(irn);
555 * Emits code for FrameAddr fix
557 static void emit_sparc_FrameAddr(const ir_node *irn)
559 const sparc_symconst_attr_t *attr = get_irn_generic_attr_const(irn);
561 // no need to fix offset as we are adressing via the framepointer
562 if (attr->fp_offset >= 0) {
563 be_emit_cstring("\tadd ");
564 sparc_emit_source_register(irn, 0);
565 be_emit_cstring(", ");
566 be_emit_irprintf("%ld", attr->fp_offset);
568 be_emit_cstring("\tsub ");
569 sparc_emit_source_register(irn, 0);
570 be_emit_cstring(", ");
571 be_emit_irprintf("%ld", -attr->fp_offset);
574 be_emit_cstring(", ");
575 sparc_emit_dest_register(irn, 0);
576 be_emit_finish_line_gas(irn);
581 * Emits code for Branch
583 static void emit_sparc_BXX(const ir_node *node)
585 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
586 int proj_num = attr->proj_num;
587 bool is_unsigned = attr->is_unsigned;
588 const ir_node *proj_true = NULL;
589 const ir_node *proj_false = NULL;
590 const ir_edge_t *edge;
591 const ir_node *block;
592 const ir_node *next_block;
595 foreach_out_edge(node, edge) {
596 ir_node *proj = get_edge_src_irn(edge);
597 long nr = get_Proj_proj(proj);
598 if (nr == pn_Cond_true) {
605 /* for now, the code works for scheduled and non-schedules blocks */
606 block = get_nodes_block(node);
608 /* we have a block schedule */
609 next_block = get_irn_link(block);
611 assert(proj_num != pn_Cmp_False);
612 assert(proj_num != pn_Cmp_True);
614 if (get_irn_link(proj_true) == next_block) {
615 /* exchange both proj's so the second one can be omitted */
616 const ir_node *t = proj_true;
618 proj_true = proj_false;
620 proj_num = get_negated_pnc(proj_num, mode_Iu);
625 case pn_Cmp_Eq: suffix = "e"; break;
626 case pn_Cmp_Lt: suffix = "lu"; break;
627 case pn_Cmp_Le: suffix = "leu"; break;
628 case pn_Cmp_Gt: suffix = "gu"; break;
629 case pn_Cmp_Ge: suffix = "geu"; break;
630 case pn_Cmp_Lg: suffix = "ne"; break;
631 default: panic("Cmp has unsupported pnc");
635 case pn_Cmp_Eq: suffix = "e"; break;
636 case pn_Cmp_Lt: suffix = "l"; break;
637 case pn_Cmp_Le: suffix = "le"; break;
638 case pn_Cmp_Gt: suffix = "g"; break;
639 case pn_Cmp_Ge: suffix = "ge"; break;
640 case pn_Cmp_Lg: suffix = "ne"; break;
641 default: panic("Cmp has unsupported pnc");
645 /* emit the true proj */
646 be_emit_cstring("\tb");
647 be_emit_string(suffix);
649 sparc_emit_cfop_target(proj_true);
650 be_emit_finish_line_gas(proj_true);
652 be_emit_cstring("\tnop");
653 be_emit_pad_comment();
654 be_emit_cstring("/* TODO: use delay slot */\n");
656 if (get_irn_link(proj_false) == next_block) {
657 be_emit_cstring("\t/* false-fallthrough to ");
658 sparc_emit_cfop_target(proj_false);
659 be_emit_cstring(" */");
660 be_emit_finish_line_gas(proj_false);
662 be_emit_cstring("\tba ");
663 sparc_emit_cfop_target(proj_false);
664 be_emit_finish_line_gas(proj_false);
665 be_emit_cstring("\tnop\t\t/* TODO: use delay slot */\n");
666 be_emit_finish_line_gas(proj_false);
671 * emit Jmp (which actually is a branch always (ba) instruction)
673 static void emit_sparc_Ba(const ir_node *node)
675 ir_node *block, *next_block;
677 /* for now, the code works for scheduled and non-schedules blocks */
678 block = get_nodes_block(node);
680 /* we have a block schedule */
681 next_block = get_irn_link(block);
682 if (get_irn_link(node) != next_block) {
683 be_emit_cstring("\tba ");
684 sparc_emit_cfop_target(node);
685 be_emit_finish_line_gas(node);
686 be_emit_cstring("\tnop\t\t/* TODO: use delay slot */\n");
688 be_emit_cstring("\t/* fallthrough to ");
689 sparc_emit_cfop_target(node);
690 be_emit_cstring(" */");
692 be_emit_finish_line_gas(node);
698 static void emit_be_Copy(const ir_node *irn)
700 ir_mode *mode = get_irn_mode(irn);
702 if (get_in_reg(irn, 0) == get_out_reg(irn, 0)) {
707 if (mode_is_float(mode)) {
708 panic("emit_be_Copy: move not supported for FP");
709 } else if (mode_is_data(mode)) {
710 be_emit_cstring("\tmov ");
711 sparc_emit_source_register(irn, 0);
712 be_emit_cstring(", ");
713 sparc_emit_dest_register(irn, 0);
714 be_emit_finish_line_gas(irn);
716 panic("emit_be_Copy: move not supported for this mode");
722 * dummy emitter for ignored nodes
724 static void emit_nothing(const ir_node *irn)
732 * type of emitter function
734 typedef void (*emit_func) (const ir_node *);
737 * Set a node emitter. Make it a bit more type safe.
739 static inline void set_emitter(ir_op *op, emit_func sparc_emit_node)
741 op->ops.generic = (op_func)sparc_emit_node;
745 * Enters the emitter functions for handled nodes into the generic
746 * pointer of an opcode.
748 static void sparc_register_emitters(void)
750 /* first clear the generic function pointer for all ops */
751 clear_irp_opcodes_generic_func();
752 /* register all emitter functions defined in spec */
753 sparc_register_spec_emitters();
756 set_emitter(op_be_Copy, emit_be_Copy);
757 set_emitter(op_be_CopyKeep, emit_be_Copy);
758 set_emitter(op_be_IncSP, emit_be_IncSP);
759 set_emitter(op_be_MemPerm, emit_be_MemPerm);
760 set_emitter(op_be_Perm, emit_be_Perm);
761 set_emitter(op_be_Return, emit_be_Return);
762 set_emitter(op_sparc_Ba, emit_sparc_Ba);
763 set_emitter(op_sparc_BXX, emit_sparc_BXX);
764 set_emitter(op_sparc_Call, emit_sparc_Call);
765 set_emitter(op_sparc_FrameAddr, emit_sparc_FrameAddr);
766 set_emitter(op_sparc_HiImm, emit_sparc_HiImm);
767 set_emitter(op_sparc_LoImm, emit_sparc_LoImm);
768 set_emitter(op_sparc_Mulh, emit_sparc_Mulh);
769 set_emitter(op_sparc_Save, emit_sparc_Save);
770 set_emitter(op_sparc_SDiv, emit_sparc_SDiv);
771 set_emitter(op_sparc_SymConst, emit_sparc_SymConst);
772 set_emitter(op_sparc_UDiv, emit_sparc_UDiv);
774 /* no need to emit anything for the following nodes */
775 set_emitter(op_be_Barrier, emit_nothing);
776 set_emitter(op_be_Keep, emit_nothing);
777 set_emitter(op_be_Start, emit_nothing);
778 set_emitter(op_Phi, emit_nothing);
782 * Emits code for a node.
784 static void sparc_emit_node(const ir_node *node)
786 ir_op *op = get_irn_op(node);
788 if (op->ops.generic) {
789 emit_func func = (emit_func) op->ops.generic;
790 be_dbg_set_dbg_info(get_irn_dbg_info(node));
793 panic("Error: No emit handler for node %+F (graph %+F)\n",
794 node, current_ir_graph);
799 * Walks over the nodes in a block connected by scheduling edges
800 * and emits code for each node.
802 static void sparc_gen_block(ir_node *block, void *data)
807 if (! is_Block(block))
810 be_gas_emit_block_name(block);
811 be_emit_cstring(":\n");
812 be_emit_write_line();
814 sched_foreach(block, node) {
815 sparc_emit_node(node);
821 * Emits code for function start.
823 static void sparc_emit_func_prolog(ir_graph *irg)
825 ir_entity *ent = get_irg_entity(irg);
826 be_gas_emit_function_prolog(ent, 4);
827 be_emit_write_line();
831 * Emits code for function end
833 static void sparc_emit_func_epilog(ir_graph *irg)
835 ir_entity *ent = get_irg_entity(irg);
836 const char *irg_name = get_entity_ld_name(ent);
837 be_emit_write_line();
838 be_emit_irprintf("\t.size %s, .-%s\n", irg_name, irg_name);
839 be_emit_cstring("# -- End ");
840 be_emit_string(irg_name);
841 be_emit_cstring("\n");
842 be_emit_write_line();
847 * TODO: Sets labels for control flow nodes (jump target).
848 * Links control predecessors to there destination blocks.
850 static void sparc_gen_labels(ir_node *block, void *env)
853 int n = get_Block_n_cfgpreds(block);
856 for (n--; n >= 0; n--) {
857 pred = get_Block_cfgpred(block, n);
858 set_irn_link(pred, block); // link the pred of a block (which is a jmp)
866 void sparc_gen_routine(const sparc_code_gen_t *cg, ir_graph *irg)
869 ir_node *last_block = NULL;
870 ir_entity *entity = get_irg_entity(irg);
874 be_gas_elf_type_char = '#';
875 be_gas_object_file_format = OBJECT_FILE_FORMAT_ELF_SPARC;
877 /* register all emitter functions */
878 sparc_register_emitters();
879 be_dbg_method_begin(entity);
881 /* create the block schedule. For now, we don't need it earlier. */
882 blk_sched = be_create_block_schedule(irg);
884 // emit function prolog
885 sparc_emit_func_prolog(irg);
887 // generate BLOCK labels
888 irg_block_walk_graph(irg, sparc_gen_labels, NULL, NULL);
890 // inject block scheduling links & emit code of each block
891 n = ARR_LEN(blk_sched);
892 for (i = 0; i < n;) {
893 ir_node *block, *next_bl;
895 block = blk_sched[i];
897 next_bl = i < n ? blk_sched[i] : NULL;
899 /* set here the link. the emitter expects to find the next block here */
900 set_irn_link(block, next_bl);
901 sparc_gen_block(block, last_block);
905 // emit function epilog
906 sparc_emit_func_epilog(irg);
909 void sparc_init_emitter(void)
911 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.emit");