2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief emit assembler for a backend graph
23 * @author Hannes Rapp, Matthias Braun
30 #include "bitfiddle.h"
42 #include "raw_bitset.h"
47 #include "beblocksched.h"
50 #include "be_dbgout.h"
53 #include "bepeephole.h"
55 #include "sparc_emitter.h"
56 #include "gen_sparc_emitter.h"
57 #include "sparc_nodes_attr.h"
58 #include "sparc_new_nodes.h"
59 #include "gen_sparc_regalloc_if.h"
61 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
63 static ir_heights_t *heights;
64 static const ir_node *delay_slot_filler; /**< this node has been choosen to fill
65 the next delay slot */
67 static void sparc_emit_node(const ir_node *node);
69 void sparc_emit_immediate(const ir_node *node)
71 const sparc_attr_t *attr = get_sparc_attr_const(node);
72 ir_entity *entity = attr->immediate_value_entity;
75 int32_t value = attr->immediate_value;
76 assert(sparc_is_value_imm_encodeable(value));
77 be_emit_irprintf("%d", value);
79 if (get_entity_owner(entity) == get_tls_type()) {
80 be_emit_cstring("%tle_lox10(");
82 be_emit_cstring("%lo(");
84 be_gas_emit_entity(entity);
85 if (attr->immediate_value != 0) {
86 be_emit_irprintf("%+d", attr->immediate_value);
92 void sparc_emit_high_immediate(const ir_node *node)
94 const sparc_attr_t *attr = get_sparc_attr_const(node);
95 ir_entity *entity = attr->immediate_value_entity;
98 uint32_t value = (uint32_t) attr->immediate_value;
99 be_emit_irprintf("%%hi(0x%X)", value);
101 if (get_entity_owner(entity) == get_tls_type()) {
102 be_emit_cstring("%tle_hix22(");
104 be_emit_cstring("%hi(");
106 be_gas_emit_entity(entity);
107 if (attr->immediate_value != 0) {
108 be_emit_irprintf("%+d", attr->immediate_value);
114 void sparc_emit_source_register(const ir_node *node, int pos)
116 const arch_register_t *reg = arch_get_irn_register_in(node, pos);
118 be_emit_string(arch_register_get_name(reg));
121 void sparc_emit_dest_register(const ir_node *node, int pos)
123 const arch_register_t *reg = arch_get_irn_register_out(node, pos);
125 be_emit_string(arch_register_get_name(reg));
129 * Emits either a imm or register depending on arity of node
131 * @param register no (-1 if no register)
133 void sparc_emit_reg_or_imm(const ir_node *node, int pos)
135 if (arch_get_irn_flags(node) & ((arch_irn_flags_t)sparc_arch_irn_flag_immediate_form)) {
136 // we have a imm input
137 sparc_emit_immediate(node);
140 sparc_emit_source_register(node, pos);
147 void sparc_emit_offset(const ir_node *node, int offset_node_pos)
149 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
151 if (attr->is_reg_reg) {
152 assert(!attr->is_frame_entity);
153 assert(attr->base.immediate_value == 0);
154 assert(attr->base.immediate_value_entity == NULL);
156 sparc_emit_source_register(node, offset_node_pos);
157 } else if (attr->is_frame_entity) {
158 int32_t offset = attr->base.immediate_value;
160 assert(sparc_is_value_imm_encodeable(offset));
161 be_emit_irprintf("%+ld", offset);
163 } else if (attr->base.immediate_value != 0
164 || attr->base.immediate_value_entity != NULL) {
166 sparc_emit_immediate(node);
170 void sparc_emit_source_reg_and_offset(const ir_node *node, int regpos,
173 const arch_register_t *reg = arch_get_irn_register_in(node, regpos);
174 const sparc_load_store_attr_t *attr;
177 if (reg == &sparc_registers[REG_SP]) {
178 attr = get_sparc_load_store_attr_const(node);
179 if (!attr->is_reg_reg
180 && attr->base.immediate_value < SPARC_SAVE_AREA_SIZE) {
182 ir_fprintf(stderr, "warning: emitting stack pointer relative load/store with offset < %d\n", SPARC_SAVE_AREA_SIZE);
187 sparc_emit_source_register(node, regpos);
188 sparc_emit_offset(node, offpos);
191 void sparc_emit_float_load_store_mode(const ir_node *node)
193 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
194 ir_mode *mode = attr->load_store_mode;
195 int bits = get_mode_size_bits(mode);
197 assert(mode_is_float(mode));
201 case 64: be_emit_char('d'); return;
202 case 128: be_emit_char('q'); return;
204 panic("invalid float load/store mode %+F", mode);
208 * Emit load mode char
210 void sparc_emit_load_mode(const ir_node *node)
212 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
213 ir_mode *mode = attr->load_store_mode;
214 int bits = get_mode_size_bits(mode);
215 bool is_signed = mode_is_signed(mode);
218 be_emit_string(is_signed ? "sh" : "uh");
219 } else if (bits == 8) {
220 be_emit_string(is_signed ? "sb" : "ub");
221 } else if (bits == 64) {
229 * Emit store mode char
231 void sparc_emit_store_mode(const ir_node *node)
233 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
234 ir_mode *mode = attr->load_store_mode;
235 int bits = get_mode_size_bits(mode);
239 } else if (bits == 8) {
241 } else if (bits == 64) {
248 static void emit_fp_suffix(const ir_mode *mode)
250 unsigned bits = get_mode_size_bits(mode);
251 assert(mode_is_float(mode));
255 } else if (bits == 64) {
257 } else if (bits == 128) {
260 panic("invalid FP mode");
264 void sparc_emit_fp_conv_source(const ir_node *node)
266 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
267 emit_fp_suffix(attr->src_mode);
270 void sparc_emit_fp_conv_destination(const ir_node *node)
272 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
273 emit_fp_suffix(attr->dest_mode);
277 * emits the FP mode suffix char
279 void sparc_emit_fp_mode_suffix(const ir_node *node)
281 const sparc_fp_attr_t *attr = get_sparc_fp_attr_const(node);
282 emit_fp_suffix(attr->fp_mode);
285 static ir_node *get_jump_target(const ir_node *jump)
287 return (ir_node*)get_irn_link(jump);
291 * Returns the target label for a control flow node.
293 static void sparc_emit_cfop_target(const ir_node *node)
295 ir_node *block = get_jump_target(node);
296 be_gas_emit_block_name(block);
300 * returns true if a sparc_call calls a register and not an immediate
302 static bool is_sparc_reg_call(const ir_node *node)
304 const sparc_attr_t *attr = get_sparc_attr_const(node);
305 return attr->immediate_value_entity == NULL;
308 static int get_sparc_Call_dest_addr_pos(const ir_node *node)
310 assert(is_sparc_reg_call(node));
311 return get_irn_arity(node)-1;
314 static bool ba_is_fallthrough(const ir_node *node)
316 ir_node *block = get_nodes_block(node);
317 ir_node *next_block = (ir_node*)get_irn_link(block);
318 return get_irn_link(node) == next_block;
321 static bool is_no_instruction(const ir_node *node)
323 /* copies are nops if src_reg == dest_reg */
324 if (be_is_Copy(node) || be_is_CopyKeep(node)) {
325 const arch_register_t *src_reg = arch_get_irn_register_in(node, 0);
326 const arch_register_t *dest_reg = arch_get_irn_register_out(node, 0);
328 if (src_reg == dest_reg)
331 if (be_is_IncSP(node) && be_get_IncSP_offset(node) == 0)
333 /* Ba is not emitted if it is a simple fallthrough */
334 if (is_sparc_Ba(node) && ba_is_fallthrough(node))
337 return be_is_Keep(node) || be_is_Start(node) || is_Phi(node);
340 static bool has_delay_slot(const ir_node *node)
342 if (is_sparc_Ba(node)) {
343 return !ba_is_fallthrough(node);
346 return arch_get_irn_flags(node) & sparc_arch_irn_flag_has_delay_slot;
349 /** returns true if the emitter for this sparc node can produce more than one
350 * actual sparc instruction.
351 * Usually it is a bad sign if we have to add instructions here. We should
352 * rather try to get them lowered down. So we can actually put them into
353 * delay slots and make them more accessible to the scheduler.
355 static bool emits_multiple_instructions(const ir_node *node)
357 if (has_delay_slot(node))
360 if (is_sparc_Call(node)) {
361 return arch_get_irn_flags(node) & sparc_arch_irn_flag_aggregate_return;
364 return is_sparc_SMulh(node) || is_sparc_UMulh(node)
365 || is_sparc_SDiv(node) || is_sparc_UDiv(node)
366 || be_is_MemPerm(node) || be_is_Perm(node);
369 static bool uses_reg(const ir_node *node, const arch_register_t *reg)
371 int arity = get_irn_arity(node);
374 for (i = 0; i < arity; ++i) {
375 const arch_register_t *in_reg = arch_get_irn_register_in(node, i);
382 static bool writes_reg(const ir_node *node, const arch_register_t *reg)
384 unsigned n_outs = arch_get_irn_n_outs(node);
386 for (o = 0; o < n_outs; ++o) {
387 const arch_register_t *out_reg = arch_get_irn_register_out(node, o);
394 static bool can_move_into_delayslot(const ir_node *node, const ir_node *to)
396 if (!be_can_move_before(node, to))
399 if (is_sparc_Call(to)) {
401 /** all deps are used after the delay slot so, we're fine */
402 if (!is_sparc_reg_call(to))
405 check = get_irn_n(to, get_sparc_Call_dest_addr_pos(to));
406 if (skip_Proj(check) == node)
409 /* the Call also destroys the value of %o7, but since this is
410 * currently marked as ignore register in the backend, it
411 * should never be used by the instruction in the delay slot. */
412 if (uses_reg(node, &sparc_registers[REG_O7]))
415 } else if (is_sparc_Return(to)) {
416 /* return uses the value of %o7, all other values are not
417 * immediately used */
418 if (writes_reg(node, &sparc_registers[REG_O7]))
422 /* the node must not use our computed values */
423 int arity = get_irn_arity(to);
425 for (i = 0; i < arity; ++i) {
426 ir_node *in = get_irn_n(to, i);
427 if (skip_Proj(in) == node)
435 * search for an instruction that can fill the delay slot of @p node
437 static const ir_node *pick_delay_slot_for(const ir_node *node)
439 const ir_node *schedpoint = node;
441 /* currently we don't track which registers are still alive, so we can't
442 * pick any other instructions other than the one directly preceding */
443 static const unsigned PICK_DELAY_SLOT_MAX_DISTANCE = 10;
445 assert(has_delay_slot(node));
447 while (sched_has_prev(schedpoint)) {
448 schedpoint = sched_prev(schedpoint);
450 if (has_delay_slot(schedpoint))
453 /* skip things which don't really result in instructions */
454 if (is_no_instruction(schedpoint))
457 if (tries++ >= PICK_DELAY_SLOT_MAX_DISTANCE)
460 if (emits_multiple_instructions(schedpoint))
463 if (!can_move_into_delayslot(schedpoint, node))
466 /* found something */
474 * Emits code for stack space management
476 static void emit_be_IncSP(const ir_node *irn)
478 int offset = be_get_IncSP_offset(irn);
483 /* SPARC stack grows downwards */
485 be_emit_cstring("\tsub ");
488 be_emit_cstring("\tadd ");
491 sparc_emit_source_register(irn, 0);
492 be_emit_irprintf(", %d", -offset);
493 be_emit_cstring(", ");
494 sparc_emit_dest_register(irn, 0);
495 be_emit_finish_line_gas(irn);
499 * emits code for mulh
501 static void emit_sparc_Mulh(const ir_node *irn)
503 be_emit_cstring("\t");
504 if (is_sparc_UMulh(irn)) {
507 assert(is_sparc_SMulh(irn));
510 be_emit_cstring("mul ");
512 sparc_emit_source_register(irn, 0);
513 be_emit_cstring(", ");
514 sparc_emit_reg_or_imm(irn, 1);
515 be_emit_cstring(", ");
516 sparc_emit_dest_register(irn, 0);
517 be_emit_finish_line_gas(irn);
519 // our result is in the y register now
520 // we just copy it to the assigned target reg
521 be_emit_cstring("\tmov %y, ");
522 sparc_emit_dest_register(irn, 0);
523 be_emit_finish_line_gas(irn);
526 static void fill_delay_slot(void)
528 if (delay_slot_filler != NULL) {
529 sparc_emit_node(delay_slot_filler);
530 delay_slot_filler = NULL;
532 be_emit_cstring("\tnop\n");
533 be_emit_write_line();
537 static void emit_sparc_Div(const ir_node *node, bool is_signed)
539 /* can we get the delay count of the wr instruction somewhere? */
540 unsigned wry_delay_count = 3;
543 be_emit_cstring("\twr ");
544 sparc_emit_source_register(node, 0);
545 be_emit_cstring(", 0, %y");
546 be_emit_finish_line_gas(node);
548 for (i = 0; i < wry_delay_count; ++i) {
552 be_emit_irprintf("\t%s ", is_signed ? "sdiv" : "udiv");
553 sparc_emit_source_register(node, 1);
554 be_emit_cstring(", ");
555 sparc_emit_reg_or_imm(node, 2);
556 be_emit_cstring(", ");
557 sparc_emit_dest_register(node, 0);
558 be_emit_finish_line_gas(node);
561 static void emit_sparc_SDiv(const ir_node *node)
563 emit_sparc_Div(node, true);
566 static void emit_sparc_UDiv(const ir_node *node)
568 emit_sparc_Div(node, false);
571 static void emit_sparc_Call(const ir_node *node)
573 be_emit_cstring("\tcall ");
574 if (is_sparc_reg_call(node)) {
575 int dest_addr = get_sparc_Call_dest_addr_pos(node);
576 sparc_emit_source_register(node, dest_addr);
578 const sparc_attr_t *attr = get_sparc_attr_const(node);
579 ir_entity *entity = attr->immediate_value_entity;
580 be_gas_emit_entity(entity);
581 if (attr->immediate_value != 0) {
582 be_emit_irprintf("%+d", attr->immediate_value);
584 be_emit_cstring(", 0");
586 be_emit_finish_line_gas(node);
590 if (arch_get_irn_flags(node) & sparc_arch_irn_flag_aggregate_return) {
591 be_emit_cstring("\tunimp 8\n");
592 be_emit_write_line();
596 static void emit_be_Perm(const ir_node *irn)
598 be_emit_cstring("\txor ");
599 sparc_emit_source_register(irn, 1);
600 be_emit_cstring(", ");
601 sparc_emit_source_register(irn, 0);
602 be_emit_cstring(", ");
603 sparc_emit_source_register(irn, 0);
604 be_emit_finish_line_gas(NULL);
606 be_emit_cstring("\txor ");
607 sparc_emit_source_register(irn, 1);
608 be_emit_cstring(", ");
609 sparc_emit_source_register(irn, 0);
610 be_emit_cstring(", ");
611 sparc_emit_source_register(irn, 1);
612 be_emit_finish_line_gas(NULL);
614 be_emit_cstring("\txor ");
615 sparc_emit_source_register(irn, 1);
616 be_emit_cstring(", ");
617 sparc_emit_source_register(irn, 0);
618 be_emit_cstring(", ");
619 sparc_emit_source_register(irn, 0);
620 be_emit_finish_line_gas(irn);
623 /* The stack pointer must always be SPARC_STACK_ALIGNMENT bytes aligned, so get
624 * the next bigger integer that's evenly divisible by it. */
625 static unsigned get_aligned_sp_change(const unsigned num_regs)
627 const unsigned bytes = num_regs * SPARC_REGISTER_SIZE;
628 return round_up2(bytes, SPARC_STACK_ALIGNMENT);
631 /* Spill register l0 or both l0 and l1, depending on n_spilled and n_to_spill.*/
632 static void memperm_emit_spill_registers(const ir_node *node, int n_spilled,
635 assert(n_spilled < n_to_spill);
637 if (n_spilled == 0) {
638 /* We always reserve stack space for two registers because during copy
639 * processing we don't know yet if we also need to handle a cycle which
640 * needs two registers. More complicated code in emit_MemPerm would
641 * prevent wasting SPARC_REGISTER_SIZE bytes of stack space but
642 * it is not worth the worse readability of emit_MemPerm. */
644 /* Keep stack pointer aligned. */
645 unsigned sp_change = get_aligned_sp_change(2);
646 be_emit_irprintf("\tsub %%sp, %u, %%sp", sp_change);
647 be_emit_finish_line_gas(node);
649 /* Spill register l0. */
650 be_emit_irprintf("\tst %%l0, [%%sp%+d]", SPARC_MIN_STACKSIZE);
651 be_emit_finish_line_gas(node);
654 if (n_to_spill == 2) {
655 /* Spill register l1. */
656 be_emit_irprintf("\tst %%l1, [%%sp%+d]", SPARC_MIN_STACKSIZE + SPARC_REGISTER_SIZE);
657 be_emit_finish_line_gas(node);
661 /* Restore register l0 or both l0 and l1, depending on n_spilled. */
662 static void memperm_emit_restore_registers(const ir_node *node, int n_spilled)
666 if (n_spilled == 2) {
667 /* Restore register l1. */
668 be_emit_irprintf("\tld [%%sp%+d], %%l1", SPARC_MIN_STACKSIZE + SPARC_REGISTER_SIZE);
669 be_emit_finish_line_gas(node);
672 /* Restore register l0. */
673 be_emit_irprintf("\tld [%%sp%+d], %%l0", SPARC_MIN_STACKSIZE);
674 be_emit_finish_line_gas(node);
676 /* Restore stack pointer. */
677 sp_change = get_aligned_sp_change(2);
678 be_emit_irprintf("\tadd %%sp, %u, %%sp", sp_change);
679 be_emit_finish_line_gas(node);
682 /* Emit code to copy in_ent to out_ent. Only uses l0. */
683 static void memperm_emit_copy(const ir_node *node, ir_entity *in_ent,
686 ir_graph *irg = get_irn_irg(node);
687 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
688 int off_in = be_get_stack_entity_offset(layout, in_ent, 0);
689 int off_out = be_get_stack_entity_offset(layout, out_ent, 0);
691 /* Load from input entity. */
692 be_emit_irprintf("\tld [%%fp%+d], %%l0", off_in);
693 be_emit_finish_line_gas(node);
695 /* Store to output entity. */
696 be_emit_irprintf("\tst %%l0, [%%fp%+d]", off_out);
697 be_emit_finish_line_gas(node);
700 /* Emit code to swap ent1 and ent2. Uses l0 and l1. */
701 static void memperm_emit_swap(const ir_node *node, ir_entity *ent1,
704 ir_graph *irg = get_irn_irg(node);
705 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
706 int off1 = be_get_stack_entity_offset(layout, ent1, 0);
707 int off2 = be_get_stack_entity_offset(layout, ent2, 0);
709 /* Load from first input entity. */
710 be_emit_irprintf("\tld [%%fp%+d], %%l0", off1);
711 be_emit_finish_line_gas(node);
713 /* Load from second input entity. */
714 be_emit_irprintf("\tld [%%fp%+d], %%l1", off2);
715 be_emit_finish_line_gas(node);
717 /* Store first value to second output entity. */
718 be_emit_irprintf("\tst %%l0, [%%fp%+d]", off2);
719 be_emit_finish_line_gas(node);
721 /* Store second value to first output entity. */
722 be_emit_irprintf("\tst %%l1, [%%fp%+d]", off1);
723 be_emit_finish_line_gas(node);
726 /* Find the index of ent in ents or return -1 if not found. */
727 static int get_index(ir_entity **ents, int n, ir_entity *ent)
731 for (i = 0; i < n; ++i)
739 * Emit code for a MemPerm node.
741 * Analyze MemPerm for copy chains and cyclic swaps and resolve them using
743 * This function is conceptually very similar to permute_values in
746 static void emit_be_MemPerm(const ir_node *node)
748 int memperm_arity = be_get_MemPerm_entity_arity(node);
749 /* Upper limit for the number of participating entities is twice the
750 * arity, e.g., for a simple copying MemPerm node with one input/output. */
751 int max_size = 2 * memperm_arity;
752 ir_entity **entities = ALLOCANZ(ir_entity *, max_size);
753 /* sourceof contains the input entity for each entity. If an entity is
754 * never used as an output, its entry in sourceof is a fix point. */
755 int *sourceof = ALLOCANZ(int, max_size);
756 /* n_users counts how many output entities use this entity as their input.*/
757 int *n_users = ALLOCANZ(int, max_size);
758 /* n_spilled records the number of spilled registers, either 1 or 2. */
762 /* This implementation currently only works with frame pointers. */
763 ir_graph *irg = get_irn_irg(node);
764 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
765 assert(!layout->sp_relative && "MemPerms currently do not work without frame pointers");
767 for (i = 0; i < max_size; ++i) {
771 for (i = n = 0; i < memperm_arity; ++i) {
772 ir_entity *out = be_get_MemPerm_out_entity(node, i);
773 ir_entity *in = be_get_MemPerm_in_entity(node, i);
774 int oidx; /* Out index */
775 int iidx; /* In index */
777 /* Insert into entities to be able to operate on unique indices. */
778 if (get_index(entities, n, out) == -1)
780 if (get_index(entities, n, in) == -1)
783 oidx = get_index(entities, n, out);
784 iidx = get_index(entities, n, in);
786 sourceof[oidx] = iidx; /* Remember the source. */
787 ++n_users[iidx]; /* Increment number of users of this entity. */
790 /* First do all the copies. */
791 for (oidx = 0; oidx < n; /* empty */) {
792 int iidx = sourceof[oidx];
794 /* Nothing to do for fix points.
795 * Also, if entities[oidx] is used as an input by another copy, we
796 * can't overwrite entities[oidx] yet.*/
797 if (iidx == oidx || n_users[oidx] > 0) {
802 /* We found the end of a 'chain', so do the copy. */
803 if (n_spilled == 0) {
804 memperm_emit_spill_registers(node, n_spilled, /*n_to_spill=*/1);
807 memperm_emit_copy(node, entities[iidx], entities[oidx]);
810 sourceof[oidx] = oidx;
812 assert(n_users[iidx] > 0);
813 /* Decrementing the number of users might enable us to do another
817 if (iidx < oidx && n_users[iidx] == 0) {
824 /* The rest are cycles. */
825 for (oidx = 0; oidx < n; /* empty */) {
826 int iidx = sourceof[oidx];
829 /* Nothing to do for fix points. */
835 assert(n_users[iidx] == 1);
837 /* Swap the two values to resolve the cycle. */
839 memperm_emit_spill_registers(node, n_spilled, /*n_to_spill=*/2);
842 memperm_emit_swap(node, entities[iidx], entities[oidx]);
844 tidx = sourceof[iidx];
846 sourceof[iidx] = iidx;
848 /* The source of oidx is now the old source of iidx, because we swapped
849 * the two entities. */
850 sourceof[oidx] = tidx;
854 /* Only fix points should remain. */
855 for (i = 0; i < max_size; ++i) {
856 assert(sourceof[i] == i);
860 assert(n_spilled > 0 && "Useless MemPerm node");
862 memperm_emit_restore_registers(node, n_spilled);
865 static void emit_sparc_Return(const ir_node *node)
867 ir_graph *irg = get_irn_irg(node);
868 ir_entity *entity = get_irg_entity(irg);
869 ir_type *type = get_entity_type(entity);
871 const char *destreg = "%o7";
873 /* hack: we don't explicitely model register changes because of the
874 * restore node. So we have to do it manually here */
875 if (delay_slot_filler != NULL &&
876 (is_sparc_Restore(delay_slot_filler)
877 || is_sparc_RestoreZero(delay_slot_filler))) {
880 be_emit_cstring("\tjmp ");
881 be_emit_string(destreg);
882 if (get_method_calling_convention(type) & cc_compound_ret) {
883 be_emit_cstring("+12");
885 be_emit_cstring("+8");
887 be_emit_finish_line_gas(node);
891 static const arch_register_t *map_i_to_o_reg(const arch_register_t *reg)
893 unsigned idx = reg->global_index;
894 if (idx < REG_I0 || idx > REG_I7)
896 idx += REG_O0 - REG_I0;
897 assert(REG_O0 <= idx && idx <= REG_O7);
898 return &sparc_registers[idx];
901 static void emit_sparc_Restore(const ir_node *node)
903 const arch_register_t *destreg
904 = arch_get_irn_register_out(node, pn_sparc_Restore_res);
905 be_emit_cstring("\trestore ");
906 sparc_emit_source_register(node, 1);
907 be_emit_cstring(", ");
908 sparc_emit_reg_or_imm(node, 2);
909 be_emit_cstring(", ");
910 destreg = map_i_to_o_reg(destreg);
912 be_emit_string(arch_register_get_name(destreg));
913 be_emit_finish_line_gas(node);
916 static void emit_sparc_FrameAddr(const ir_node *node)
918 const sparc_attr_t *attr = get_sparc_attr_const(node);
919 int32_t offset = attr->immediate_value;
922 be_emit_cstring("\tadd ");
923 sparc_emit_source_register(node, 0);
924 be_emit_cstring(", ");
925 assert(sparc_is_value_imm_encodeable(offset));
926 be_emit_irprintf("%ld", offset);
928 be_emit_cstring("\tsub ");
929 sparc_emit_source_register(node, 0);
930 be_emit_cstring(", ");
931 assert(sparc_is_value_imm_encodeable(-offset));
932 be_emit_irprintf("%ld", -offset);
935 be_emit_cstring(", ");
936 sparc_emit_dest_register(node, 0);
937 be_emit_finish_line_gas(node);
940 static const char *get_icc_unsigned(ir_relation relation)
942 switch (relation & (ir_relation_less_equal_greater)) {
943 case ir_relation_false: return "bn";
944 case ir_relation_equal: return "be";
945 case ir_relation_less: return "blu";
946 case ir_relation_less_equal: return "bleu";
947 case ir_relation_greater: return "bgu";
948 case ir_relation_greater_equal: return "bgeu";
949 case ir_relation_less_greater: return "bne";
950 case ir_relation_less_equal_greater: return "ba";
951 default: panic("Cmp has unsupported relation");
955 static const char *get_icc_signed(ir_relation relation)
957 switch (relation & (ir_relation_less_equal_greater)) {
958 case ir_relation_false: return "bn";
959 case ir_relation_equal: return "be";
960 case ir_relation_less: return "bl";
961 case ir_relation_less_equal: return "ble";
962 case ir_relation_greater: return "bg";
963 case ir_relation_greater_equal: return "bge";
964 case ir_relation_less_greater: return "bne";
965 case ir_relation_less_equal_greater: return "ba";
966 default: panic("Cmp has unsupported relation");
970 static const char *get_fcc(ir_relation relation)
973 case ir_relation_false: return "fbn";
974 case ir_relation_equal: return "fbe";
975 case ir_relation_less: return "fbl";
976 case ir_relation_less_equal: return "fble";
977 case ir_relation_greater: return "fbg";
978 case ir_relation_greater_equal: return "fbge";
979 case ir_relation_less_greater: return "fblg";
980 case ir_relation_less_equal_greater: return "fbo";
981 case ir_relation_unordered: return "fbu";
982 case ir_relation_unordered_equal: return "fbue";
983 case ir_relation_unordered_less: return "fbul";
984 case ir_relation_unordered_less_equal: return "fbule";
985 case ir_relation_unordered_greater: return "fbug";
986 case ir_relation_unordered_greater_equal: return "fbuge";
987 case ir_relation_unordered_less_greater: return "fbne";
988 case ir_relation_true: return "fba";
990 panic("invalid relation");
993 typedef const char* (*get_cc_func)(ir_relation relation);
995 static void emit_sparc_branch(const ir_node *node, get_cc_func get_cc)
997 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
998 ir_relation relation = attr->relation;
999 const ir_node *proj_true = NULL;
1000 const ir_node *proj_false = NULL;
1001 const ir_edge_t *edge;
1002 const ir_node *block;
1003 const ir_node *next_block;
1005 foreach_out_edge(node, edge) {
1006 ir_node *proj = get_edge_src_irn(edge);
1007 long nr = get_Proj_proj(proj);
1008 if (nr == pn_Cond_true) {
1015 /* for now, the code works for scheduled and non-schedules blocks */
1016 block = get_nodes_block(node);
1018 /* we have a block schedule */
1019 next_block = (ir_node*)get_irn_link(block);
1021 if (get_irn_link(proj_true) == next_block) {
1022 /* exchange both proj's so the second one can be omitted */
1023 const ir_node *t = proj_true;
1025 proj_true = proj_false;
1027 relation = get_negated_relation(relation);
1030 /* emit the true proj */
1031 be_emit_cstring("\t");
1032 be_emit_string(get_cc(relation));
1034 sparc_emit_cfop_target(proj_true);
1035 be_emit_finish_line_gas(proj_true);
1039 if (get_irn_link(proj_false) == next_block) {
1040 be_emit_cstring("\t/* fallthrough to ");
1041 sparc_emit_cfop_target(proj_false);
1042 be_emit_cstring(" */");
1043 be_emit_finish_line_gas(proj_false);
1045 be_emit_cstring("\tba ");
1046 sparc_emit_cfop_target(proj_false);
1047 be_emit_finish_line_gas(proj_false);
1052 static void emit_sparc_Bicc(const ir_node *node)
1054 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
1055 bool is_unsigned = attr->is_unsigned;
1056 emit_sparc_branch(node, is_unsigned ? get_icc_unsigned : get_icc_signed);
1059 static void emit_sparc_fbfcc(const ir_node *node)
1061 /* if the flags producing node was immediately in front of us, emit
1063 ir_node *flags = get_irn_n(node, n_sparc_fbfcc_flags);
1064 ir_node *prev = sched_prev(node);
1065 if (is_Block(prev)) {
1066 /* TODO: when the flags come from another block, then we have to do
1067 * more complicated tests to see wether the flag producing node is
1068 * potentially in front of us (could happen for fallthroughs) */
1069 panic("TODO: fbfcc flags come from other block");
1071 if (skip_Proj(flags) == prev) {
1072 be_emit_cstring("\tnop\n");
1074 emit_sparc_branch(node, get_fcc);
1077 static void emit_sparc_Ba(const ir_node *node)
1079 if (ba_is_fallthrough(node)) {
1080 be_emit_cstring("\t/* fallthrough to ");
1081 sparc_emit_cfop_target(node);
1082 be_emit_cstring(" */");
1083 be_emit_finish_line_gas(node);
1085 be_emit_cstring("\tba ");
1086 sparc_emit_cfop_target(node);
1087 be_emit_finish_line_gas(node);
1092 static void emit_sparc_SwitchJmp(const ir_node *node)
1094 const sparc_switch_jmp_attr_t *attr = get_sparc_switch_jmp_attr_const(node);
1096 be_emit_cstring("\tjmp ");
1097 sparc_emit_source_register(node, 0);
1098 be_emit_finish_line_gas(node);
1101 emit_jump_table(node, attr->default_proj_num, attr->jump_table,
1105 static void emit_fmov(const ir_node *node, const arch_register_t *src_reg,
1106 const arch_register_t *dst_reg)
1108 be_emit_cstring("\tfmovs %");
1109 be_emit_string(arch_register_get_name(src_reg));
1110 be_emit_cstring(", %");
1111 be_emit_string(arch_register_get_name(dst_reg));
1112 be_emit_finish_line_gas(node);
1115 static const arch_register_t *get_next_fp_reg(const arch_register_t *reg)
1117 unsigned idx = reg->global_index;
1118 assert(reg == &sparc_registers[idx]);
1120 assert(idx - REG_F0 < N_sparc_fp_REGS);
1121 return &sparc_registers[idx];
1124 static void emit_be_Copy(const ir_node *node)
1126 ir_mode *mode = get_irn_mode(node);
1127 const arch_register_t *src_reg = arch_get_irn_register_in(node, 0);
1128 const arch_register_t *dst_reg = arch_get_irn_register_out(node, 0);
1130 if (src_reg == dst_reg)
1133 if (mode_is_float(mode)) {
1134 unsigned bits = get_mode_size_bits(mode);
1135 int n = bits > 32 ? bits > 64 ? 3 : 1 : 0;
1137 emit_fmov(node, src_reg, dst_reg);
1138 for (i = 0; i < n; ++i) {
1139 src_reg = get_next_fp_reg(src_reg);
1140 dst_reg = get_next_fp_reg(dst_reg);
1141 emit_fmov(node, src_reg, dst_reg);
1143 } else if (mode_is_data(mode)) {
1144 be_emit_cstring("\tmov ");
1145 sparc_emit_source_register(node, 0);
1146 be_emit_cstring(", ");
1147 sparc_emit_dest_register(node, 0);
1148 be_emit_finish_line_gas(node);
1150 panic("emit_be_Copy: invalid mode");
1154 static void emit_nothing(const ir_node *irn)
1159 typedef void (*emit_func) (const ir_node *);
1161 static inline void set_emitter(ir_op *op, emit_func sparc_emit_node)
1163 op->ops.generic = (op_func)sparc_emit_node;
1167 * Enters the emitter functions for handled nodes into the generic
1168 * pointer of an opcode.
1170 static void sparc_register_emitters(void)
1172 /* first clear the generic function pointer for all ops */
1173 clear_irp_opcodes_generic_func();
1174 /* register all emitter functions defined in spec */
1175 sparc_register_spec_emitters();
1177 /* custom emitter */
1178 set_emitter(op_be_Copy, emit_be_Copy);
1179 set_emitter(op_be_CopyKeep, emit_be_Copy);
1180 set_emitter(op_be_IncSP, emit_be_IncSP);
1181 set_emitter(op_be_MemPerm, emit_be_MemPerm);
1182 set_emitter(op_be_Perm, emit_be_Perm);
1183 set_emitter(op_sparc_Ba, emit_sparc_Ba);
1184 set_emitter(op_sparc_Bicc, emit_sparc_Bicc);
1185 set_emitter(op_sparc_Call, emit_sparc_Call);
1186 set_emitter(op_sparc_fbfcc, emit_sparc_fbfcc);
1187 set_emitter(op_sparc_FrameAddr, emit_sparc_FrameAddr);
1188 set_emitter(op_sparc_SMulh, emit_sparc_Mulh);
1189 set_emitter(op_sparc_UMulh, emit_sparc_Mulh);
1190 set_emitter(op_sparc_Restore, emit_sparc_Restore);
1191 set_emitter(op_sparc_Return, emit_sparc_Return);
1192 set_emitter(op_sparc_SDiv, emit_sparc_SDiv);
1193 set_emitter(op_sparc_SwitchJmp, emit_sparc_SwitchJmp);
1194 set_emitter(op_sparc_UDiv, emit_sparc_UDiv);
1196 /* no need to emit anything for the following nodes */
1197 set_emitter(op_be_Keep, emit_nothing);
1198 set_emitter(op_sparc_Start, emit_nothing);
1199 set_emitter(op_Phi, emit_nothing);
1203 * Emits code for a node.
1205 static void sparc_emit_node(const ir_node *node)
1207 ir_op *op = get_irn_op(node);
1209 if (op->ops.generic) {
1210 emit_func func = (emit_func) op->ops.generic;
1211 be_dbg_set_dbg_info(get_irn_dbg_info(node));
1214 panic("No emit handler for node %+F (graph %+F)\n", node,
1219 static ir_node *find_next_delay_slot(ir_node *from)
1221 ir_node *schedpoint = from;
1222 while (!has_delay_slot(schedpoint)) {
1223 if (!sched_has_next(schedpoint))
1225 schedpoint = sched_next(schedpoint);
1230 static bool block_needs_label(const ir_node *block, const ir_node *sched_prev)
1234 if (has_Block_entity(block))
1237 n_cfgpreds = get_Block_n_cfgpreds(block);
1238 if (n_cfgpreds == 0) {
1240 } else if (n_cfgpreds > 1) {
1243 ir_node *cfgpred = get_Block_cfgpred(block, 0);
1244 ir_node *cfgpred_block = get_nodes_block(cfgpred);
1245 if (is_Proj(cfgpred) && is_sparc_SwitchJmp(get_Proj_pred(cfgpred)))
1247 return sched_prev != cfgpred_block || get_irn_link(cfgpred) != block;
1252 * Walks over the nodes in a block connected by scheduling edges
1253 * and emits code for each node.
1255 static void sparc_emit_block(ir_node *block, ir_node *prev)
1258 ir_node *next_delay_slot;
1260 assert(is_Block(block));
1262 if (block_needs_label(block, prev)) {
1263 be_gas_emit_block_name(block);
1264 be_emit_cstring(":\n");
1265 be_emit_write_line();
1268 next_delay_slot = find_next_delay_slot(sched_first(block));
1269 if (next_delay_slot != NULL)
1270 delay_slot_filler = pick_delay_slot_for(next_delay_slot);
1272 sched_foreach(block, node) {
1273 if (node == delay_slot_filler) {
1277 sparc_emit_node(node);
1279 if (node == next_delay_slot) {
1280 assert(delay_slot_filler == NULL);
1281 next_delay_slot = find_next_delay_slot(sched_next(node));
1282 if (next_delay_slot != NULL)
1283 delay_slot_filler = pick_delay_slot_for(next_delay_slot);
1289 * Emits code for function start.
1291 static void sparc_emit_func_prolog(ir_graph *irg)
1293 ir_entity *ent = get_irg_entity(irg);
1294 be_gas_emit_function_prolog(ent, 4);
1295 be_emit_write_line();
1299 * Emits code for function end
1301 static void sparc_emit_func_epilog(ir_graph *irg)
1303 ir_entity *ent = get_irg_entity(irg);
1304 const char *irg_name = get_entity_ld_name(ent);
1305 be_emit_write_line();
1306 be_emit_irprintf("\t.size %s, .-%s\n", irg_name, irg_name);
1307 be_emit_cstring("# -- End ");
1308 be_emit_string(irg_name);
1309 be_emit_cstring("\n");
1310 be_emit_write_line();
1313 static void sparc_gen_labels(ir_node *block, void *env)
1316 int n = get_Block_n_cfgpreds(block);
1319 for (n--; n >= 0; n--) {
1320 pred = get_Block_cfgpred(block, n);
1321 set_irn_link(pred, block); // link the pred of a block (which is a jmp)
1325 void sparc_emit_routine(ir_graph *irg)
1327 ir_entity *entity = get_irg_entity(irg);
1328 ir_node **block_schedule;
1332 heights = heights_new(irg);
1334 /* register all emitter functions */
1335 sparc_register_emitters();
1336 be_dbg_method_begin(entity);
1338 /* create the block schedule. For now, we don't need it earlier. */
1339 block_schedule = be_create_block_schedule(irg);
1341 sparc_emit_func_prolog(irg);
1342 irg_block_walk_graph(irg, sparc_gen_labels, NULL, NULL);
1344 /* inject block scheduling links & emit code of each block */
1345 n = ARR_LEN(block_schedule);
1346 for (i = 0; i < n; ++i) {
1347 ir_node *block = block_schedule[i];
1348 ir_node *next_block = i+1 < n ? block_schedule[i+1] : NULL;
1349 set_irn_link(block, next_block);
1352 for (i = 0; i < n; ++i) {
1353 ir_node *block = block_schedule[i];
1354 ir_node *prev = i>=1 ? block_schedule[i-1] : NULL;
1355 if (block == get_irg_end_block(irg))
1357 sparc_emit_block(block, prev);
1360 /* emit function epilog */
1361 sparc_emit_func_epilog(irg);
1363 heights_free(heights);
1366 void sparc_init_emitter(void)
1368 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.emit");