2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief emit assembler for a backend graph
40 #include "raw_bitset.h"
43 #include "../besched.h"
44 #include "../beblocksched.h"
46 #include "../begnuas.h"
47 #include "../be_dbgout.h"
48 #include "../benode.h"
50 #include "sparc_emitter.h"
51 #include "gen_sparc_emitter.h"
52 #include "sparc_nodes_attr.h"
53 #include "sparc_new_nodes.h"
54 #include "gen_sparc_regalloc_if.h"
56 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
59 * Returns the register at in position pos.
61 static const arch_register_t *get_in_reg(const ir_node *node, int pos)
64 const arch_register_t *reg = NULL;
66 assert(get_irn_arity(node) > pos && "Invalid IN position");
68 /* The out register of the operator at position pos is the
69 in register we need. */
70 op = get_irn_n(node, pos);
72 reg = arch_get_irn_register(op);
74 assert(reg && "no in register found");
79 * Returns the register at out position pos.
81 static const arch_register_t *get_out_reg(const ir_node *node, int pos)
84 const arch_register_t *reg = NULL;
86 /* 1st case: irn is not of mode_T, so it has only */
87 /* one OUT register -> good */
88 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
89 /* Proj with the corresponding projnum for the register */
91 if (get_irn_mode(node) != mode_T) {
92 reg = arch_get_irn_register(node);
93 } else if (is_sparc_irn(node)) {
94 reg = arch_irn_get_register(node, pos);
96 const ir_edge_t *edge;
98 foreach_out_edge(node, edge) {
99 proj = get_edge_src_irn(edge);
100 assert(is_Proj(proj) && "non-Proj from mode_T node");
101 if (get_Proj_proj(proj) == pos) {
102 reg = arch_get_irn_register(proj);
108 assert(reg && "no out register found");
112 static bool is_valid_immediate(int32_t value)
114 return -4096 <= value && value < 4096;
117 void sparc_emit_immediate(const ir_node *node)
119 const sparc_attr_t *attr = get_sparc_attr_const(node);
120 ir_entity *entity = attr->immediate_value_entity;
122 if (entity == NULL) {
123 int32_t value = attr->immediate_value;
124 assert(is_valid_immediate(value));
125 be_emit_irprintf("%d", value);
127 be_emit_cstring("%lo(");
128 be_gas_emit_entity(entity);
129 if (attr->immediate_value != 0) {
130 be_emit_irprintf("%+d", attr->immediate_value);
136 void sparc_emit_high_immediate(const ir_node *node)
138 const sparc_attr_t *attr = get_sparc_attr_const(node);
139 ir_entity *entity = attr->immediate_value_entity;
141 be_emit_cstring("%hi(");
142 if (entity == NULL) {
143 uint32_t value = (uint32_t) attr->immediate_value;
144 be_emit_irprintf("0x%X", value);
146 be_gas_emit_entity(entity);
147 if (attr->immediate_value != 0) {
148 be_emit_irprintf("%+d", attr->immediate_value);
154 void sparc_emit_source_register(const ir_node *node, int pos)
156 const arch_register_t *reg = get_in_reg(node, pos);
158 be_emit_string(arch_register_get_name(reg));
161 void sparc_emit_dest_register(const ir_node *node, int pos)
163 const arch_register_t *reg = get_out_reg(node, pos);
165 be_emit_string(arch_register_get_name(reg));
169 * Emits either a imm or register depending on arity of node
171 * @param register no (-1 if no register)
173 void sparc_emit_reg_or_imm(const ir_node *node, int pos)
175 if (get_irn_arity(node) > pos) {
177 sparc_emit_source_register(node, pos);
179 // we have a imm input
180 sparc_emit_immediate(node);
184 static bool is_stack_pointer_relative(const ir_node *node)
186 const arch_register_t *sp = &sparc_gp_regs[REG_SP];
187 return (is_sparc_St(node) && get_in_reg(node, n_sparc_St_ptr) == sp)
188 || (is_sparc_Ld(node) && get_in_reg(node, n_sparc_Ld_ptr) == sp);
194 void sparc_emit_offset(const ir_node *node, int offset_node_pos)
196 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
198 if (attr->is_reg_reg) {
199 assert(!attr->is_frame_entity);
200 assert(attr->base.immediate_value == 0);
201 assert(attr->base.immediate_value_entity == NULL);
203 sparc_emit_source_register(node, offset_node_pos);
204 } else if (attr->is_frame_entity) {
205 int32_t offset = attr->base.immediate_value;
206 /* bad hack: the real stack stuff is behind the always-there spill
207 * space for the register window and stack */
208 if (is_stack_pointer_relative(node))
209 offset += SPARC_MIN_STACKSIZE;
211 assert(is_valid_immediate(offset));
212 be_emit_irprintf("%+ld", offset);
214 } else if (attr->base.immediate_value != 0
215 || attr->base.immediate_value_entity != NULL) {
217 sparc_emit_immediate(node);
221 void sparc_emit_float_load_store_mode(const ir_node *node)
223 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
224 ir_mode *mode = attr->load_store_mode;
225 int bits = get_mode_size_bits(mode);
227 assert(mode_is_float(mode));
231 case 64: be_emit_char('d'); return;
232 case 128: be_emit_char('q'); return;
234 panic("invalid flaot load/store mode %+F", mode);
238 * Emit load mode char
240 void sparc_emit_load_mode(const ir_node *node)
242 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
243 ir_mode *mode = attr->load_store_mode;
244 int bits = get_mode_size_bits(mode);
245 bool is_signed = mode_is_signed(mode);
248 be_emit_string(is_signed ? "sh" : "uh");
249 } else if (bits == 8) {
250 be_emit_string(is_signed ? "sb" : "ub");
251 } else if (bits == 64) {
259 * Emit store mode char
261 void sparc_emit_store_mode(const ir_node *node)
263 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
264 ir_mode *mode = attr->load_store_mode;
265 int bits = get_mode_size_bits(mode);
269 } else if (bits == 8) {
271 } else if (bits == 64) {
279 * emit integer signed/unsigned prefix char
281 void sparc_emit_mode_sign_prefix(const ir_node *node)
283 ir_mode *mode = get_irn_mode(node);
284 bool is_signed = mode_is_signed(mode);
285 be_emit_string(is_signed ? "s" : "u");
288 static void emit_fp_suffix(const ir_mode *mode)
290 unsigned bits = get_mode_size_bits(mode);
291 assert(mode_is_float(mode));
295 } else if (bits == 64) {
297 } else if (bits == 128) {
300 panic("invalid FP mode");
304 void sparc_emit_fp_conv_source(const ir_node *node)
306 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
307 emit_fp_suffix(attr->src_mode);
310 void sparc_emit_fp_conv_destination(const ir_node *node)
312 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
313 emit_fp_suffix(attr->dest_mode);
317 * emits the FP mode suffix char
319 void sparc_emit_fp_mode_suffix(const ir_node *node)
321 const sparc_fp_attr_t *attr = get_sparc_fp_attr_const(node);
322 emit_fp_suffix(attr->fp_mode);
326 * Returns the target label for a control flow node.
328 static void sparc_emit_cfop_target(const ir_node *node)
330 ir_node *block = get_irn_link(node);
331 be_gas_emit_block_name(block);
337 static void sparc_emit_entity(ir_entity *entity)
339 be_gas_emit_entity(entity);
343 * Emits code for stack space management
345 static void emit_be_IncSP(const ir_node *irn)
347 int offs = -be_get_IncSP_offset(irn);
352 /* SPARC stack grows downwards */
354 be_emit_cstring("\tsub ");
357 be_emit_cstring("\tadd ");
360 sparc_emit_source_register(irn, 0);
361 be_emit_irprintf(", %d", offs);
362 be_emit_cstring(", ");
363 sparc_emit_dest_register(irn, 0);
364 be_emit_finish_line_gas(irn);
368 * emits code for save instruction with min. required stack space
370 static void emit_sparc_Save(const ir_node *irn)
372 const sparc_save_attr_t *save_attr = get_sparc_save_attr_const(irn);
373 be_emit_cstring("\tsave ");
374 sparc_emit_source_register(irn, 0);
375 be_emit_irprintf(", %d, ", -save_attr->initial_stacksize);
376 sparc_emit_dest_register(irn, 0);
377 be_emit_finish_line_gas(irn);
381 * emits code for mulh
383 static void emit_sparc_Mulh(const ir_node *irn)
385 be_emit_cstring("\t");
386 sparc_emit_mode_sign_prefix(irn);
387 be_emit_cstring("mul ");
389 sparc_emit_source_register(irn, 0);
390 be_emit_cstring(", ");
391 sparc_emit_reg_or_imm(irn, 1);
392 be_emit_cstring(", ");
393 sparc_emit_dest_register(irn, 0);
394 be_emit_finish_line_gas(irn);
396 // our result is in the y register now
397 // we just copy it to the assigned target reg
398 be_emit_cstring("\tmov %y, ");
399 sparc_emit_dest_register(irn, 0);
400 be_emit_finish_line_gas(irn);
403 static void emit_sparc_Div(const ir_node *node, bool is_signed)
405 /* can we get the delay count of the wr instruction somewhere? */
406 unsigned wry_delay_count = 3;
409 be_emit_cstring("\twr ");
410 sparc_emit_source_register(node, 0);
411 be_emit_cstring(", 0, %y");
412 be_emit_finish_line_gas(node);
414 for (i = 0; i < wry_delay_count; ++i) {
415 be_emit_cstring("\tnop");
416 be_emit_finish_line_gas(node);
419 be_emit_irprintf("\t%s ", is_signed ? "sdiv" : "udiv");
420 sparc_emit_source_register(node, 1);
421 be_emit_cstring(", ");
422 sparc_emit_reg_or_imm(node, 2);
423 be_emit_cstring(", ");
424 sparc_emit_dest_register(node, 0);
425 be_emit_finish_line_gas(node);
428 static void emit_sparc_SDiv(const ir_node *node)
430 emit_sparc_Div(node, true);
433 static void emit_sparc_UDiv(const ir_node *node)
435 emit_sparc_Div(node, false);
439 * Emits code for return node
441 static void emit_be_Return(const ir_node *irn)
443 be_emit_cstring("\tret");
444 //be_emit_cstring("\tjmp %i7+8");
445 be_emit_finish_line_gas(irn);
446 be_emit_cstring("\trestore");
447 be_emit_finish_line_gas(irn);
451 * Emits code for Call node
453 static void emit_sparc_Call(const ir_node *node)
455 const sparc_attr_t *attr = get_sparc_attr_const(node);
456 ir_entity *entity = attr->immediate_value_entity;
458 be_emit_cstring("\tcall ");
459 if (entity != NULL) {
460 sparc_emit_entity(entity);
461 if (attr->immediate_value != 0) {
462 be_emit_irprintf("%+d", attr->immediate_value);
464 be_emit_cstring(", 0");
466 int last = get_irn_arity(node);
467 sparc_emit_source_register(node, last-1);
469 be_emit_finish_line_gas(node);
471 /* fill delay slot */
472 be_emit_cstring("\tnop");
473 be_emit_finish_line_gas(node);
477 * Emit code for Perm node
479 static void emit_be_Perm(const ir_node *irn)
481 be_emit_cstring("\txor ");
482 sparc_emit_source_register(irn, 1);
483 be_emit_cstring(", ");
484 sparc_emit_source_register(irn, 0);
485 be_emit_cstring(", ");
486 sparc_emit_source_register(irn, 0);
487 be_emit_finish_line_gas(NULL);
489 be_emit_cstring("\txor ");
490 sparc_emit_source_register(irn, 1);
491 be_emit_cstring(", ");
492 sparc_emit_source_register(irn, 0);
493 be_emit_cstring(", ");
494 sparc_emit_source_register(irn, 1);
495 be_emit_finish_line_gas(NULL);
497 be_emit_cstring("\txor ");
498 sparc_emit_source_register(irn, 1);
499 be_emit_cstring(", ");
500 sparc_emit_source_register(irn, 0);
501 be_emit_cstring(", ");
502 sparc_emit_source_register(irn, 0);
503 be_emit_finish_line_gas(irn);
507 * TODO: not really tested but seems to work with memperm_arity == 1
509 static void emit_be_MemPerm(const ir_node *node)
514 ir_graph *irg = get_irn_irg(node);
515 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
517 /* this implementation only works with frame pointers currently */
518 assert(layout->sp_relative == false);
520 /* TODO: this implementation is slower than necessary.
521 The longterm goal is however to avoid the memperm node completely */
523 memperm_arity = be_get_MemPerm_entity_arity(node);
524 // we use our local registers - so this is limited to 8 inputs !
525 if (memperm_arity > 8)
526 panic("memperm with more than 8 inputs not supported yet");
528 be_emit_irprintf("\tsub %%sp, %d, %%sp", memperm_arity*4);
529 be_emit_finish_line_gas(node);
531 for (i = 0; i < memperm_arity; ++i) {
532 ir_entity *entity = be_get_MemPerm_in_entity(node, i);
533 int offset = be_get_stack_entity_offset(layout, entity, 0);
536 be_emit_irprintf("\tst %%l%d, [%%sp%+d]", i, sp_change + SPARC_MIN_STACKSIZE);
537 be_emit_finish_line_gas(node);
539 /* load from entity */
540 be_emit_irprintf("\tld [%%fp%+d], %%l%d", offset, i);
541 be_emit_finish_line_gas(node);
545 for (i = memperm_arity-1; i >= 0; --i) {
546 ir_entity *entity = be_get_MemPerm_out_entity(node, i);
547 int offset = be_get_stack_entity_offset(layout, entity, 0);
551 /* store to new entity */
552 be_emit_irprintf("\tst %%l%d, [%%fp%+d]", i, offset);
553 be_emit_finish_line_gas(node);
554 /* restore register */
555 be_emit_irprintf("\tld [%%sp%+d], %%l%d", sp_change + SPARC_MIN_STACKSIZE, i);
556 be_emit_finish_line_gas(node);
559 be_emit_irprintf("\tadd %%sp, %d, %%sp", memperm_arity*4);
560 be_emit_finish_line_gas(node);
562 assert(sp_change == 0);
566 * Emits code for FrameAddr fix
568 static void emit_sparc_FrameAddr(const ir_node *node)
570 const sparc_attr_t *attr = get_sparc_attr_const(node);
572 // no need to fix offset as we are adressing via the framepointer
573 if (attr->immediate_value >= 0) {
574 be_emit_cstring("\tadd ");
575 sparc_emit_source_register(node, 0);
576 be_emit_cstring(", ");
577 be_emit_irprintf("%ld", attr->immediate_value);
579 be_emit_cstring("\tsub ");
580 sparc_emit_source_register(node, 0);
581 be_emit_cstring(", ");
582 be_emit_irprintf("%ld", -attr->immediate_value);
585 be_emit_cstring(", ");
586 sparc_emit_dest_register(node, 0);
587 be_emit_finish_line_gas(node);
590 static const char *get_icc_unsigned(pn_Cmp pnc)
593 case pn_Cmp_False: return "bn";
594 case pn_Cmp_Eq: return "be";
595 case pn_Cmp_Lt: return "blu";
596 case pn_Cmp_Le: return "bleu";
597 case pn_Cmp_Gt: return "bgu";
598 case pn_Cmp_Ge: return "bgeu";
599 case pn_Cmp_Lg: return "bne";
600 case pn_Cmp_Leg: return "ba";
601 default: panic("Cmp has unsupported pnc");
605 static const char *get_icc_signed(pn_Cmp pnc)
608 case pn_Cmp_False: return "bn";
609 case pn_Cmp_Eq: return "be";
610 case pn_Cmp_Lt: return "bl";
611 case pn_Cmp_Le: return "ble";
612 case pn_Cmp_Gt: return "bg";
613 case pn_Cmp_Ge: return "bge";
614 case pn_Cmp_Lg: return "bne";
615 case pn_Cmp_Leg: return "ba";
616 default: panic("Cmp has unsupported pnc");
620 static const char *get_fcc(pn_Cmp pnc)
623 case pn_Cmp_False: return "fbn";
624 case pn_Cmp_Eq: return "fbe";
625 case pn_Cmp_Lt: return "fbl";
626 case pn_Cmp_Le: return "fble";
627 case pn_Cmp_Gt: return "fbg";
628 case pn_Cmp_Ge: return "fbge";
629 case pn_Cmp_Lg: return "fblg";
630 case pn_Cmp_Leg: return "fbo";
631 case pn_Cmp_Uo: return "fbu";
632 case pn_Cmp_Ue: return "fbue";
633 case pn_Cmp_Ul: return "fbul";
634 case pn_Cmp_Ule: return "fbule";
635 case pn_Cmp_Ug: return "fbug";
636 case pn_Cmp_Uge: return "fbuge";
637 case pn_Cmp_Ne: return "fbne";
638 case pn_Cmp_True: return "fba";
642 panic("invalid pnc");
645 typedef const char* (*get_cc_func)(pn_Cmp pnc);
648 * Emits code for Branch
650 static void emit_sparc_branch(const ir_node *node, get_cc_func get_cc)
652 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
653 pn_Cmp pnc = attr->pnc;
654 const ir_node *proj_true = NULL;
655 const ir_node *proj_false = NULL;
656 const ir_edge_t *edge;
657 const ir_node *block;
658 const ir_node *next_block;
660 foreach_out_edge(node, edge) {
661 ir_node *proj = get_edge_src_irn(edge);
662 long nr = get_Proj_proj(proj);
663 if (nr == pn_Cond_true) {
670 /* for now, the code works for scheduled and non-schedules blocks */
671 block = get_nodes_block(node);
673 /* we have a block schedule */
674 next_block = get_irn_link(block);
676 if (get_irn_link(proj_true) == next_block) {
677 /* exchange both proj's so the second one can be omitted */
678 const ir_node *t = proj_true;
680 proj_true = proj_false;
682 if (is_sparc_fbfcc(node)) {
683 pnc = get_negated_pnc(pnc, mode_F);
685 pnc = get_negated_pnc(pnc, mode_Iu);
689 /* emit the true proj */
690 be_emit_cstring("\t");
691 be_emit_string(get_cc(pnc));
693 sparc_emit_cfop_target(proj_true);
694 be_emit_finish_line_gas(proj_true);
696 be_emit_cstring("\tnop");
697 be_emit_pad_comment();
698 be_emit_cstring("/* TODO: use delay slot */\n");
700 if (get_irn_link(proj_false) == next_block) {
701 be_emit_cstring("\t/* fallthrough to ");
702 sparc_emit_cfop_target(proj_false);
703 be_emit_cstring(" */");
704 be_emit_finish_line_gas(proj_false);
706 be_emit_cstring("\tba ");
707 sparc_emit_cfop_target(proj_false);
708 be_emit_finish_line_gas(proj_false);
709 be_emit_cstring("\tnop\t\t/* TODO: use delay slot */\n");
710 be_emit_finish_line_gas(proj_false);
714 static void emit_sparc_Bicc(const ir_node *node)
716 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
717 bool is_unsigned = attr->is_unsigned;
718 emit_sparc_branch(node, is_unsigned ? get_icc_unsigned : get_icc_signed);
721 static void emit_sparc_fbfcc(const ir_node *node)
723 emit_sparc_branch(node, get_fcc);
727 * emit Jmp (which actually is a branch always (ba) instruction)
729 static void emit_sparc_Ba(const ir_node *node)
731 ir_node *block, *next_block;
733 /* for now, the code works for scheduled and non-schedules blocks */
734 block = get_nodes_block(node);
736 /* we have a block schedule */
737 next_block = get_irn_link(block);
738 if (get_irn_link(node) != next_block) {
739 be_emit_cstring("\tba ");
740 sparc_emit_cfop_target(node);
741 be_emit_finish_line_gas(node);
742 be_emit_cstring("\tnop\t\t/* TODO: use delay slot */\n");
744 be_emit_cstring("\t/* fallthrough to ");
745 sparc_emit_cfop_target(node);
746 be_emit_cstring(" */");
748 be_emit_finish_line_gas(node);
751 static void emit_fmov(const ir_node *node, const arch_register_t *src_reg,
752 const arch_register_t *dst_reg)
754 be_emit_cstring("\tfmov ");
755 be_emit_string(arch_register_get_name(src_reg));
756 be_emit_cstring(", ");
757 be_emit_string(arch_register_get_name(dst_reg));
758 be_emit_finish_line_gas(node);
761 static const arch_register_t *get_next_fp_reg(const arch_register_t *reg)
763 unsigned index = reg->index;
764 assert(reg == &sparc_fp_regs[index]);
766 assert(index < N_sparc_fp_REGS);
767 return &sparc_fp_regs[index];
773 static void emit_be_Copy(const ir_node *node)
775 ir_mode *mode = get_irn_mode(node);
776 const arch_register_t *src_reg = get_in_reg(node, 0);
777 const arch_register_t *dst_reg = get_out_reg(node, 0);
779 if (src_reg == dst_reg)
782 if (mode_is_float(mode)) {
783 unsigned bits = get_mode_size_bits(mode);
784 int n = bits > 32 ? bits > 64 ? 3 : 1 : 0;
786 emit_fmov(node, src_reg, dst_reg);
787 for (i = 0; i < n; ++i) {
788 src_reg = get_next_fp_reg(src_reg);
789 dst_reg = get_next_fp_reg(dst_reg);
790 emit_fmov(node, src_reg, dst_reg);
792 } else if (mode_is_data(mode)) {
793 be_emit_cstring("\tmov ");
794 sparc_emit_source_register(node, 0);
795 be_emit_cstring(", ");
796 sparc_emit_dest_register(node, 0);
797 be_emit_finish_line_gas(node);
799 panic("emit_be_Copy: invalid mode");
805 * dummy emitter for ignored nodes
807 static void emit_nothing(const ir_node *irn)
813 * type of emitter function
815 typedef void (*emit_func) (const ir_node *);
818 * Set a node emitter. Make it a bit more type safe.
820 static inline void set_emitter(ir_op *op, emit_func sparc_emit_node)
822 op->ops.generic = (op_func)sparc_emit_node;
826 * Enters the emitter functions for handled nodes into the generic
827 * pointer of an opcode.
829 static void sparc_register_emitters(void)
831 /* first clear the generic function pointer for all ops */
832 clear_irp_opcodes_generic_func();
833 /* register all emitter functions defined in spec */
834 sparc_register_spec_emitters();
837 set_emitter(op_be_Copy, emit_be_Copy);
838 set_emitter(op_be_CopyKeep, emit_be_Copy);
839 set_emitter(op_be_IncSP, emit_be_IncSP);
840 set_emitter(op_be_MemPerm, emit_be_MemPerm);
841 set_emitter(op_be_Perm, emit_be_Perm);
842 set_emitter(op_be_Return, emit_be_Return);
843 set_emitter(op_sparc_Ba, emit_sparc_Ba);
844 set_emitter(op_sparc_Bicc, emit_sparc_Bicc);
845 set_emitter(op_sparc_Call, emit_sparc_Call);
846 set_emitter(op_sparc_fbfcc, emit_sparc_fbfcc);
847 set_emitter(op_sparc_FrameAddr, emit_sparc_FrameAddr);
848 set_emitter(op_sparc_Mulh, emit_sparc_Mulh);
849 set_emitter(op_sparc_Save, emit_sparc_Save);
850 set_emitter(op_sparc_SDiv, emit_sparc_SDiv);
851 set_emitter(op_sparc_UDiv, emit_sparc_UDiv);
853 /* no need to emit anything for the following nodes */
854 set_emitter(op_be_Barrier, emit_nothing);
855 set_emitter(op_be_Keep, emit_nothing);
856 set_emitter(op_be_Start, emit_nothing);
857 set_emitter(op_Phi, emit_nothing);
861 * Emits code for a node.
863 static void sparc_emit_node(const ir_node *node)
865 ir_op *op = get_irn_op(node);
867 if (op->ops.generic) {
868 emit_func func = (emit_func) op->ops.generic;
869 be_dbg_set_dbg_info(get_irn_dbg_info(node));
872 panic("No emit handler for node %+F (graph %+F)\n", node,
878 * Walks over the nodes in a block connected by scheduling edges
879 * and emits code for each node.
881 static void sparc_gen_block(ir_node *block, void *data)
886 if (! is_Block(block))
889 be_gas_emit_block_name(block);
890 be_emit_cstring(":\n");
891 be_emit_write_line();
893 sched_foreach(block, node) {
894 sparc_emit_node(node);
900 * Emits code for function start.
902 static void sparc_emit_func_prolog(ir_graph *irg)
904 ir_entity *ent = get_irg_entity(irg);
905 be_gas_emit_function_prolog(ent, 4);
906 be_emit_write_line();
910 * Emits code for function end
912 static void sparc_emit_func_epilog(ir_graph *irg)
914 ir_entity *ent = get_irg_entity(irg);
915 const char *irg_name = get_entity_ld_name(ent);
916 be_emit_write_line();
917 be_emit_irprintf("\t.size %s, .-%s\n", irg_name, irg_name);
918 be_emit_cstring("# -- End ");
919 be_emit_string(irg_name);
920 be_emit_cstring("\n");
921 be_emit_write_line();
926 * TODO: Sets labels for control flow nodes (jump target).
927 * Links control predecessors to there destination blocks.
929 static void sparc_gen_labels(ir_node *block, void *env)
932 int n = get_Block_n_cfgpreds(block);
935 for (n--; n >= 0; n--) {
936 pred = get_Block_cfgpred(block, n);
937 set_irn_link(pred, block); // link the pred of a block (which is a jmp)
945 void sparc_gen_routine(const sparc_code_gen_t *cg, ir_graph *irg)
948 ir_node *last_block = NULL;
949 ir_entity *entity = get_irg_entity(irg);
953 be_gas_elf_type_char = '#';
954 be_gas_object_file_format = OBJECT_FILE_FORMAT_ELF_SPARC;
956 /* register all emitter functions */
957 sparc_register_emitters();
958 be_dbg_method_begin(entity);
960 /* create the block schedule. For now, we don't need it earlier. */
961 blk_sched = be_create_block_schedule(irg);
963 // emit function prolog
964 sparc_emit_func_prolog(irg);
966 // generate BLOCK labels
967 irg_block_walk_graph(irg, sparc_gen_labels, NULL, NULL);
969 // inject block scheduling links & emit code of each block
970 n = ARR_LEN(blk_sched);
971 for (i = 0; i < n;) {
972 ir_node *block, *next_bl;
974 block = blk_sched[i];
976 next_bl = i < n ? blk_sched[i] : NULL;
978 /* set here the link. the emitter expects to find the next block here */
979 set_irn_link(block, next_bl);
980 sparc_gen_block(block, last_block);
984 // emit function epilog
985 sparc_emit_func_epilog(irg);
988 void sparc_init_emitter(void)
990 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.emit");