nsz Git - libfirm/blob - ir/be/sparc/sparc_cconv.c

   1 /*
   2  * Copyright (C) 1995-2010 University of Karlsruhe.  All right reserved.
   3  *
   4  * This file is part of libFirm.
   5  *
   6  * This file may be distributed and/or modified under the terms of the
   7  * GNU General Public License version 2 as published by the Free Software
   8  * Foundation and appearing in the file LICENSE.GPL included in the
   9  * packaging of this file.
  10  *
  11  * Licensees holding valid libFirm Professional Edition licenses may use
  12  * this file in accordance with the libFirm Commercial License.
  13  * Agreement provided with the Software.
  14  *
  15  * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
  16  * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  17  * PURPOSE.
  18  */
  19
  20 /**
  21  * @file
  22  * @brief   calling convention helpers
  23  * @author  Matthias Braun
  24  * @version $Id$
  25  */
  26 #include "config.h"
  27
  28 #include "sparc_cconv.h"
  29 #include "irmode.h"
  30 #include "irgwalk.h"
  31 #include "typerep.h"
  32 #include "xmalloc.h"
  33 #include "util.h"
  34 #include "error.h"
  35 #include "gen_sparc_regalloc_if.h"
  36
  37 static const unsigned ignore_regs[] = {
  38         REG_G0,
  39         /* reserved for sparc ABI: */
  40         REG_G5,
  41         REG_G6,
  42         REG_G7,
  43
  44         REG_SP,
  45         REG_O7,
  46         REG_FRAME_POINTER,
  47         REG_I7,
  48
  49         REG_FPFLAGS,
  50         REG_FLAGS,
  51         REG_Y,
  52 };
  53
  54 static const arch_register_t* const param_regs[] = {
  55         &sparc_registers[REG_I0],
  56         &sparc_registers[REG_I1],
  57         &sparc_registers[REG_I2],
  58         &sparc_registers[REG_I3],
  59         &sparc_registers[REG_I4],
  60         &sparc_registers[REG_I5],
  61 };
  62
  63 static const arch_register_t* const float_result_regs[] = {
  64         &sparc_registers[REG_F0],
  65         &sparc_registers[REG_F1],
  66         &sparc_registers[REG_F2],
  67         &sparc_registers[REG_F3],
  68 };
  69
  70 /**
  71  * Maps an input register representing the i'th register input
  72  * to the i'th register output.
  73  */
  74 static const arch_register_t *map_i_to_o_reg(const arch_register_t *reg)
  75 {
  76         unsigned idx = reg->global_index;
  77         assert(REG_I0 <= idx && idx <= REG_I7);
  78         idx += REG_O0 - REG_I0;
  79         assert(REG_O0 <= idx && idx <= REG_O7);
  80         return &sparc_registers[idx];
  81 }
  82
  83 static void check_omit_fp(ir_node *node, void *env)
  84 {
  85         bool *can_omit_fp = (bool*) env;
  86
  87         /* omit-fp is not possible if:
  88          *  - we have allocations on the stack
  89          *  - we have calls (with the exception of tail-calls once we support them)
  90          */
  91         if ((is_Alloc(node) && get_Alloc_where(node) == stack_alloc)
  92                         || (is_Free(node) && get_Free_where(node) == stack_alloc)
  93                         || is_Call(node)) {
  94                 *can_omit_fp = false;
  95         }
  96 }
  97
  98 calling_convention_t *sparc_decide_calling_convention(ir_type *function_type,
  99                                                       ir_graph *irg)
 100 {
 101         unsigned              stack_offset        = 0;
 102         unsigned              n_param_regs_used   = 0;
 103         int                   n_param_regs        = ARRAY_SIZE(param_regs);
 104         int                   n_float_result_regs = ARRAY_SIZE(float_result_regs);
 105         bool                  omit_fp             = false;
 106         reg_or_stackslot_t   *params;
 107         reg_or_stackslot_t   *results;
 108         int                   n_params;
 109         int                   n_results;
 110         int                   i;
 111         int                   regnum;
 112         int                   float_regnum;
 113         calling_convention_t *cconv;
 114
 115         if (irg != NULL) {
 116                 const be_options_t *options = be_get_irg_options(irg);
 117                 omit_fp = options->omit_fp;
 118                 irg_walk_graph(irg, check_omit_fp, NULL, &omit_fp);
 119         }
 120
 121         /* determine how parameters are passed */
 122         n_params = get_method_n_params(function_type);
 123         regnum   = 0;
 124         params   = XMALLOCNZ(reg_or_stackslot_t, n_params);
 125
 126         for (i = 0; i < n_params; ++i) {
 127                 ir_type            *param_type = get_method_param_type(function_type,i);
 128                 ir_mode            *mode       = get_type_mode(param_type);
 129                 int                 bits       = get_mode_size_bits(mode);
 130                 reg_or_stackslot_t *param      = &params[i];
 131
 132                 if (regnum < n_param_regs) {
 133                         const arch_register_t *reg = param_regs[regnum++];
 134                         if (irg == NULL || omit_fp)
 135                                 reg = map_i_to_o_reg(reg);
 136                         param->reg0 = reg;
 137                 } else {
 138                         param->type   = param_type;
 139                         param->offset = stack_offset;
 140                         /* increase offset 4 bytes so everything is aligned */
 141                         stack_offset += bits > 32 ? bits/8 : 4;
 142                         continue;
 143                 }
 144
 145                 /* we might need a 2nd 32bit component (for 64bit or double values) */
 146                 if (bits > 32) {
 147                         if (bits > 64)
 148                                 panic("only 32 and 64bit modes supported in sparc backend");
 149
 150                         if (regnum < n_param_regs) {
 151                                 const arch_register_t *reg = param_regs[regnum++];
 152                                 if (irg == NULL || omit_fp)
 153                                         reg = map_i_to_o_reg(reg);
 154                                 param->reg1 = reg;
 155                         } else {
 156                                 ir_mode *regmode = param_regs[0]->reg_class->mode;
 157                                 ir_type *type    = get_type_for_mode(regmode);
 158                                 param->type      = type;
 159                                 param->offset    = stack_offset;
 160                                 assert(get_mode_size_bits(regmode) == 32);
 161                                 stack_offset += 4;
 162                         }
 163                 }
 164         }
 165         n_param_regs_used = regnum;
 166
 167         /* determine how results are passed */
 168         n_results    = get_method_n_ress(function_type);
 169         regnum       = 0;
 170         float_regnum = 0;
 171         results      = XMALLOCNZ(reg_or_stackslot_t, n_results);
 172         for (i = 0; i < n_results; ++i) {
 173                 ir_type            *result_type = get_method_res_type(function_type, i);
 174                 ir_mode            *result_mode = get_type_mode(result_type);
 175                 reg_or_stackslot_t *result      = &results[i];
 176
 177                 if (mode_is_float(result_mode)) {
 178                         if (float_regnum >= n_float_result_regs) {
 179                                 panic("Too many float results for sparc backend");
 180                         } else {
 181                                 const arch_register_t *reg = float_result_regs[float_regnum++];
 182                                 result->reg0 = reg;
 183                         }
 184                 } else {
 185                         if (get_mode_size_bits(result_mode) > 32) {
 186                                 panic("Results with more than 32bits not supported by sparc backend yet");
 187                         }
 188
 189                         if (regnum >= n_param_regs) {
 190                                 panic("Too many results for sparc backend");
 191                         } else {
 192                                 const arch_register_t *reg = param_regs[regnum++];
 193                                 if (irg == NULL || omit_fp)
 194                                         reg = map_i_to_o_reg(reg);
 195                                 result->reg0 = reg;
 196                         }
 197                 }
 198         }
 199
 200         cconv                   = XMALLOCZ(calling_convention_t);
 201         cconv->parameters       = params;
 202         cconv->param_stack_size = stack_offset;
 203         cconv->n_param_regs     = n_param_regs_used;
 204         cconv->results          = results;
 205         cconv->omit_fp          = omit_fp;
 206
 207         /* setup ignore register array */
 208         if (irg != NULL) {
 209                 be_irg_t       *birg      = be_birg_from_irg(irg);
 210                 size_t          n_ignores = ARRAY_SIZE(ignore_regs);
 211                 struct obstack *obst      = &birg->obst;
 212                 size_t          r;
 213
 214                 assert(birg->allocatable_regs == NULL);
 215                 birg->allocatable_regs = rbitset_obstack_alloc(obst, N_SPARC_REGISTERS);
 216                 rbitset_set_all(birg->allocatable_regs, N_SPARC_REGISTERS);
 217                 for (r = 0; r < n_ignores; ++r) {
 218                         rbitset_clear(birg->allocatable_regs, ignore_regs[r]);
 219                 }
 220         }
 221
 222         return cconv;
 223 }
 224
 225 void sparc_free_calling_convention(calling_convention_t *cconv)
 226 {
 227         free(cconv->parameters);
 228         free(cconv->results);
 229         free(cconv);
 230 }