2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief calling convention helpers
23 * @author Matthias Braun
28 #include "sparc_cconv.h"
35 #include "gen_sparc_regalloc_if.h"
36 #include "bitfiddle.h"
38 static const unsigned ignore_regs[] = {
40 /* reserved for sparc ABI: */
55 static const arch_register_t* const param_regs[] = {
56 &sparc_registers[REG_I0],
57 &sparc_registers[REG_I1],
58 &sparc_registers[REG_I2],
59 &sparc_registers[REG_I3],
60 &sparc_registers[REG_I4],
61 &sparc_registers[REG_I5],
63 COMPILETIME_ASSERT(ARRAY_SIZE(param_regs) == SPARC_N_PARAM_REGS, sparcparamregs)
65 static const arch_register_t* const float_result_regs[] = {
66 &sparc_registers[REG_F0],
67 &sparc_registers[REG_F1],
68 &sparc_registers[REG_F2],
69 &sparc_registers[REG_F3],
70 &sparc_registers[REG_F4],
71 &sparc_registers[REG_F5],
72 &sparc_registers[REG_F6],
73 &sparc_registers[REG_F7],
75 static arch_register_req_t float_result_reqs_double[8];
76 static arch_register_req_t float_result_reqs_quad[8];
78 static const arch_register_t *const caller_saves[] = {
79 &sparc_registers[REG_G1],
80 &sparc_registers[REG_G2],
81 &sparc_registers[REG_G3],
82 &sparc_registers[REG_G4],
83 &sparc_registers[REG_O0],
84 &sparc_registers[REG_O1],
85 &sparc_registers[REG_O2],
86 &sparc_registers[REG_O3],
87 &sparc_registers[REG_O4],
88 &sparc_registers[REG_O5],
89 &sparc_registers[REG_F0],
90 &sparc_registers[REG_F1],
91 &sparc_registers[REG_F2],
92 &sparc_registers[REG_F3],
93 &sparc_registers[REG_F4],
94 &sparc_registers[REG_F5],
95 &sparc_registers[REG_F6],
96 &sparc_registers[REG_F7],
97 &sparc_registers[REG_F8],
98 &sparc_registers[REG_F9],
99 &sparc_registers[REG_F10],
100 &sparc_registers[REG_F11],
101 &sparc_registers[REG_F12],
102 &sparc_registers[REG_F13],
103 &sparc_registers[REG_F14],
104 &sparc_registers[REG_F15],
105 &sparc_registers[REG_F16],
106 &sparc_registers[REG_F17],
107 &sparc_registers[REG_F18],
108 &sparc_registers[REG_F19],
109 &sparc_registers[REG_F20],
110 &sparc_registers[REG_F21],
111 &sparc_registers[REG_F22],
112 &sparc_registers[REG_F23],
113 &sparc_registers[REG_F24],
114 &sparc_registers[REG_F25],
115 &sparc_registers[REG_F26],
116 &sparc_registers[REG_F27],
117 &sparc_registers[REG_F28],
118 &sparc_registers[REG_F29],
119 &sparc_registers[REG_F30],
120 &sparc_registers[REG_F31],
122 static unsigned default_caller_saves[BITSET_SIZE_ELEMS(N_SPARC_REGISTERS)];
125 * Maps an input register representing the i'th register input
126 * to the i'th register output.
128 static const arch_register_t *map_i_to_o_reg(const arch_register_t *reg)
130 unsigned idx = reg->global_index;
131 assert(REG_I0 <= idx && idx <= REG_I7);
132 idx += REG_O0 - REG_I0;
133 assert(REG_O0 <= idx && idx <= REG_O7);
134 return &sparc_registers[idx];
137 static void check_omit_fp(ir_node *node, void *env)
139 bool *can_omit_fp = (bool*) env;
141 /* omit-fp is not possible if:
142 * - we have allocations on the stack
143 * - we have calls (with the exception of tail-calls once we support them)
145 if ((is_Alloc(node) && get_Alloc_where(node) == stack_alloc)
146 || (is_Free(node) && get_Free_where(node) == stack_alloc)
148 *can_omit_fp = false;
152 static unsigned determine_n_float_regs(ir_mode *mode)
154 unsigned bits = get_mode_size_bits(mode);
163 panic("sparc: Unexpected floatingpoint mode %+F", mode);
167 calling_convention_t *sparc_decide_calling_convention(ir_type *function_type,
170 unsigned stack_offset = 0;
171 unsigned n_param_regs_used = 0;
172 int n_param_regs = ARRAY_SIZE(param_regs);
173 unsigned n_float_result_regs = ARRAY_SIZE(float_result_regs);
174 bool omit_fp = false;
175 reg_or_stackslot_t *params;
176 reg_or_stackslot_t *results;
181 unsigned float_regnum;
182 unsigned n_reg_results = 0;
183 calling_convention_t *cconv;
184 unsigned *caller_saves;
187 const be_options_t *options = be_get_irg_options(irg);
188 omit_fp = options->omit_fp;
189 irg_walk_graph(irg, check_omit_fp, NULL, &omit_fp);
192 caller_saves = rbitset_malloc(N_SPARC_REGISTERS);
193 rbitset_copy(caller_saves, default_caller_saves, N_SPARC_REGISTERS);
195 /* determine how parameters are passed */
196 n_params = get_method_n_params(function_type);
198 params = XMALLOCNZ(reg_or_stackslot_t, n_params);
200 for (i = 0; i < n_params; ++i) {
201 ir_type *param_type = get_method_param_type(function_type,i);
204 reg_or_stackslot_t *param;
206 if (is_compound_type(param_type))
207 panic("sparc: compound arguments not supported yet");
209 mode = get_type_mode(param_type);
210 bits = get_mode_size_bits(mode);
214 (get_method_calling_convention(function_type) & cc_compound_ret)) {
215 assert(mode_is_reference(mode) && bits == 32);
216 /* special case, we have reserved space for this on the between
218 param->type = param_type;
219 param->offset = -SPARC_MIN_STACKSIZE+SPARC_AGGREGATE_RETURN_OFFSET;
223 if (regnum < n_param_regs) {
224 const arch_register_t *reg = param_regs[regnum];
225 if (irg == NULL || omit_fp)
226 reg = map_i_to_o_reg(reg);
228 param->req0 = reg->single_req;
229 param->reg_offset = regnum;
232 param->type = param_type;
233 param->offset = stack_offset;
234 /* increase offset 4 bytes so everything is aligned */
235 stack_offset += bits > 32 ? bits/8 : 4;
239 /* we might need a 2nd 32bit component (for 64bit or double values) */
242 panic("only 32 and 64bit modes supported in sparc backend");
244 if (regnum < n_param_regs) {
245 const arch_register_t *reg = param_regs[regnum];
246 if (irg == NULL || omit_fp)
247 reg = map_i_to_o_reg(reg);
249 param->req1 = reg->single_req;
252 ir_mode *regmode = param_regs[0]->reg_class->mode;
253 ir_type *type = get_type_for_mode(regmode);
255 param->offset = stack_offset;
256 assert(get_mode_size_bits(regmode) == 32);
261 n_param_regs_used = regnum;
263 /* determine how results are passed */
264 n_results = get_method_n_ress(function_type);
267 results = XMALLOCNZ(reg_or_stackslot_t, n_results);
268 for (i = 0; i < n_results; ++i) {
269 ir_type *result_type = get_method_res_type(function_type, i);
270 ir_mode *result_mode = get_type_mode(result_type);
271 reg_or_stackslot_t *result = &results[i];
273 if (mode_is_float(result_mode)) {
274 unsigned n_regs = determine_n_float_regs(result_mode);
275 unsigned next_reg = round_up2(float_regnum, n_regs);
277 if (next_reg >= n_float_result_regs) {
278 panic("Too many float results for sparc backend");
280 const arch_register_t *reg = float_result_regs[next_reg];
281 rbitset_clear(caller_saves, reg->global_index);
282 result->reg_offset = i;
284 result->req0 = reg->single_req;
285 } else if (n_regs == 2) {
286 result->req0 = &float_result_reqs_double[next_reg];
287 rbitset_clear(caller_saves, reg->global_index+1);
288 } else if (n_regs == 4) {
289 result->req0 = &float_result_reqs_quad[next_reg];
290 rbitset_clear(caller_saves, reg->global_index+1);
291 rbitset_clear(caller_saves, reg->global_index+2);
292 rbitset_clear(caller_saves, reg->global_index+3);
294 panic("invalid number of registers in sparc float result");
296 float_regnum = next_reg + n_regs;
301 if (get_mode_size_bits(result_mode) > 32) {
302 panic("Results with more than 32bits not supported by sparc backend yet");
305 if (regnum >= n_param_regs) {
306 panic("Too many results for sparc backend");
308 const arch_register_t *reg = param_regs[regnum++];
309 if (irg == NULL || omit_fp)
310 reg = map_i_to_o_reg(reg);
311 result->req0 = reg->single_req;
312 result->reg_offset = i;
313 rbitset_clear(caller_saves, reg->global_index);
319 cconv = XMALLOCZ(calling_convention_t);
320 cconv->parameters = params;
321 cconv->param_stack_size = stack_offset;
322 cconv->n_param_regs = n_param_regs_used;
323 cconv->results = results;
324 cconv->omit_fp = omit_fp;
325 cconv->caller_saves = caller_saves;
326 cconv->n_reg_results = n_reg_results;
328 /* setup ignore register array */
330 be_irg_t *birg = be_birg_from_irg(irg);
331 size_t n_ignores = ARRAY_SIZE(ignore_regs);
332 struct obstack *obst = &birg->obst;
335 birg->allocatable_regs = rbitset_obstack_alloc(obst, N_SPARC_REGISTERS);
336 rbitset_set_all(birg->allocatable_regs, N_SPARC_REGISTERS);
337 for (r = 0; r < n_ignores; ++r) {
338 rbitset_clear(birg->allocatable_regs, ignore_regs[r]);
345 void sparc_free_calling_convention(calling_convention_t *cconv)
347 free(cconv->parameters);
348 free(cconv->results);
349 free(cconv->caller_saves);
353 void sparc_cconv_init(void)
356 for (i = 0; i < ARRAY_SIZE(caller_saves); ++i) {
357 rbitset_set(default_caller_saves, caller_saves[i]->global_index);
360 for (i = 0; i < ARRAY_SIZE(float_result_reqs_double); i += 2) {
361 arch_register_req_t *req = &float_result_reqs_double[i];
362 *req = *float_result_regs[i]->single_req;
363 req->type |= arch_register_req_type_aligned;
366 for (i = 0; i < ARRAY_SIZE(float_result_reqs_quad); i += 4) {
367 arch_register_req_t *req = &float_result_reqs_quad[i];
368 *req = *float_result_regs[i]->single_req;
369 req->type |= arch_register_req_type_aligned;