nsz Git - libfirm/blob - ir/be/sparc/sparc_cconv.c

   1 /*
   2  * Copyright (C) 1995-2010 University of Karlsruhe.  All right reserved.
   3  *
   4  * This file is part of libFirm.
   5  *
   6  * This file may be distributed and/or modified under the terms of the
   7  * GNU General Public License version 2 as published by the Free Software
   8  * Foundation and appearing in the file LICENSE.GPL included in the
   9  * packaging of this file.
  10  *
  11  * Licensees holding valid libFirm Professional Edition licenses may use
  12  * this file in accordance with the libFirm Commercial License.
  13  * Agreement provided with the Software.
  14  *
  15  * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
  16  * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  17  * PURPOSE.
  18  */
  19
  20 /**
  21  * @file
  22  * @brief   calling convention helpers
  23  * @author  Matthias Braun
  24  */
  25 #include "config.h"
  26
  27 #include "sparc_cconv.h"
  28 #include "irmode.h"
  29 #include "irgwalk.h"
  30 #include "typerep.h"
  31 #include "xmalloc.h"
  32 #include "util.h"
  33 #include "error.h"
  34 #include "gen_sparc_regalloc_if.h"
  35 #include "bitfiddle.h"
  36
  37 static const unsigned ignore_regs[] = {
  38         REG_G0,
  39         /* used in case an address offset does not fit into an immediate: */
  40         REG_G4,
  41         /* reserved for SPARC ABI: */
  42         REG_G5,
  43         REG_G6,
  44         REG_G7,
  45
  46         REG_SP,
  47         REG_O7,
  48         REG_FRAME_POINTER,
  49         REG_I7,
  50
  51         REG_FPFLAGS,
  52         REG_FLAGS,
  53         REG_Y,
  54
  55         REG_F31,
  56 };
  57
  58 static const arch_register_t* const param_regs[] = {
  59         &sparc_registers[REG_I0],
  60         &sparc_registers[REG_I1],
  61         &sparc_registers[REG_I2],
  62         &sparc_registers[REG_I3],
  63         &sparc_registers[REG_I4],
  64         &sparc_registers[REG_I5],
  65 };
  66 COMPILETIME_ASSERT(ARRAY_SIZE(param_regs) == SPARC_N_PARAM_REGS, sparcparamregs)
  67
  68 static const arch_register_t* const float_result_regs[] = {
  69         &sparc_registers[REG_F0],
  70         &sparc_registers[REG_F1],
  71         &sparc_registers[REG_F2],
  72         &sparc_registers[REG_F3],
  73         &sparc_registers[REG_F4],
  74         &sparc_registers[REG_F5],
  75         &sparc_registers[REG_F6],
  76         &sparc_registers[REG_F7],
  77 };
  78 static arch_register_req_t float_result_reqs_double[8];
  79 static arch_register_req_t float_result_reqs_quad[8];
  80
  81 static const unsigned caller_saves[] = {
  82         REG_G1,
  83         REG_G2,
  84         REG_G3,
  85         REG_O0,
  86         REG_O1,
  87         REG_O2,
  88         REG_O3,
  89         REG_O4,
  90         REG_O5,
  91         REG_F0,
  92         REG_F1,
  93         REG_F2,
  94         REG_F3,
  95         REG_F4,
  96         REG_F5,
  97         REG_F6,
  98         REG_F7,
  99         REG_F8,
 100         REG_F9,
 101         REG_F10,
 102         REG_F11,
 103         REG_F12,
 104         REG_F13,
 105         REG_F14,
 106         REG_F15,
 107         REG_F16,
 108         REG_F17,
 109         REG_F18,
 110         REG_F19,
 111         REG_F20,
 112         REG_F21,
 113         REG_F22,
 114         REG_F23,
 115         REG_F24,
 116         REG_F25,
 117         REG_F26,
 118         REG_F27,
 119         REG_F28,
 120         REG_F29,
 121         REG_F30,
 122         REG_FLAGS,
 123         REG_FPFLAGS,
 124         REG_Y,
 125 };
 126 static unsigned default_caller_saves[BITSET_SIZE_ELEMS(N_SPARC_REGISTERS)];
 127
 128 static const unsigned returns_twice_saved[] = {
 129         REG_SP,
 130         REG_FRAME_POINTER,
 131         REG_I7
 132 };
 133 static unsigned default_returns_twice_saves[BITSET_SIZE_ELEMS(N_SPARC_REGISTERS)];
 134
 135 /**
 136  * Maps an input register representing the i'th register input
 137  * to the i'th register output.
 138  */
 139 static const arch_register_t *map_i_to_o_reg(const arch_register_t *reg)
 140 {
 141         unsigned idx = reg->global_index;
 142         assert(REG_I0 <= idx && idx <= REG_I7);
 143         idx += REG_O0 - REG_I0;
 144         assert(REG_O0 <= idx && idx <= REG_O7);
 145         return &sparc_registers[idx];
 146 }
 147
 148 static void check_omit_fp(ir_node *node, void *env)
 149 {
 150         bool *can_omit_fp = (bool*) env;
 151
 152         /* omit-fp is not possible if:
 153          *  - we have allocations on the stack
 154          *  - we have calls (with the exception of tail-calls once we support them)
 155          */
 156         if ((is_Alloc(node) && get_Alloc_where(node) == stack_alloc)
 157                         || (is_Free(node) && get_Free_where(node) == stack_alloc)
 158                         || is_Call(node)) {
 159                 *can_omit_fp = false;
 160         }
 161 }
 162
 163 static unsigned determine_n_float_regs(ir_mode *mode)
 164 {
 165         unsigned bits = get_mode_size_bits(mode);
 166         switch (bits) {
 167         case 32:
 168                 return 1;
 169         case 64:
 170                 return 2;
 171         case 128:
 172                 return 4;
 173         default:
 174                 panic("Unexpected floatingpoint mode %+F", mode);
 175         }
 176 }
 177
 178 calling_convention_t *sparc_decide_calling_convention(ir_type *function_type,
 179                                                       ir_graph *irg)
 180 {
 181         unsigned              stack_offset        = 0;
 182         unsigned              n_param_regs_used   = 0;
 183         int                   n_param_regs        = ARRAY_SIZE(param_regs);
 184         unsigned              n_float_result_regs = ARRAY_SIZE(float_result_regs);
 185         bool                  omit_fp             = false;
 186         mtp_additional_properties mtp
 187                 = get_method_additional_properties(function_type);
 188         reg_or_stackslot_t   *params;
 189         reg_or_stackslot_t   *results;
 190         int                   n_params;
 191         int                   n_results;
 192         int                   i;
 193         int                   regnum;
 194         unsigned              float_regnum;
 195         unsigned              n_reg_results = 0;
 196         calling_convention_t *cconv;
 197         unsigned             *caller_saves;
 198
 199         if (irg != NULL) {
 200                 omit_fp = be_options.omit_fp;
 201                 /* our current vaarg handling needs the standard space to store the
 202                  * args 0-5 in it */
 203                 if (get_method_variadicity(function_type) == variadicity_variadic)
 204                         omit_fp = false;
 205                 if (omit_fp == true) {
 206                         irg_walk_graph(irg, check_omit_fp, NULL, &omit_fp);
 207                 }
 208         }
 209
 210         caller_saves = rbitset_malloc(N_SPARC_REGISTERS);
 211         if (mtp & mtp_property_returns_twice) {
 212                 rbitset_copy(caller_saves, default_returns_twice_saves,
 213                              N_SPARC_REGISTERS);
 214         } else {
 215                 rbitset_copy(caller_saves, default_caller_saves, N_SPARC_REGISTERS);
 216         }
 217
 218         /* determine how parameters are passed */
 219         n_params = get_method_n_params(function_type);
 220         regnum   = 0;
 221         params   = XMALLOCNZ(reg_or_stackslot_t, n_params);
 222
 223         for (i = 0; i < n_params; ++i) {
 224                 ir_type            *param_type = get_method_param_type(function_type,i);
 225                 ir_mode            *mode;
 226                 int                 bits;
 227                 reg_or_stackslot_t *param;
 228
 229                 if (is_compound_type(param_type))
 230                         panic("compound arguments not supported yet");
 231
 232                 mode  = get_type_mode(param_type);
 233                 bits  = get_mode_size_bits(mode);
 234                 param = &params[i];
 235
 236                 if (i == 0 &&
 237                     (get_method_calling_convention(function_type) & cc_compound_ret)) {
 238                         assert(mode_is_reference(mode) && bits == 32);
 239                         /* special case, we have reserved space for this on the between
 240                          * type */
 241                         param->type   = param_type;
 242                         param->offset = -SPARC_MIN_STACKSIZE+SPARC_AGGREGATE_RETURN_OFFSET;
 243                         continue;
 244                 }
 245
 246                 if (regnum < n_param_regs) {
 247                         const arch_register_t *reg = param_regs[regnum];
 248                         if (irg == NULL || omit_fp)
 249                                 reg = map_i_to_o_reg(reg);
 250                         param->reg0       = reg;
 251                         param->req0       = reg->single_req;
 252                         param->reg_offset = regnum;
 253                         ++regnum;
 254                 } else {
 255                         param->type   = param_type;
 256                         param->offset = stack_offset;
 257                         /* increase offset by at least SPARC_REGISTER_SIZE bytes so everything is aligned */
 258                         stack_offset += bits > 8 * SPARC_REGISTER_SIZE ? bits / 8 : SPARC_REGISTER_SIZE;
 259                         continue;
 260                 }
 261
 262                 /* we might need a 2nd 32bit component (for 64bit or double values) */
 263                 if (bits > 32) {
 264                         if (bits > 64)
 265                                 panic("only 32 and 64bit modes supported");
 266
 267                         if (regnum < n_param_regs) {
 268                                 const arch_register_t *reg = param_regs[regnum];
 269                                 if (irg == NULL || omit_fp)
 270                                         reg = map_i_to_o_reg(reg);
 271                                 param->reg1       = reg;
 272                                 param->req1       = reg->single_req;
 273                                 ++regnum;
 274                         } else {
 275                                 ir_mode *regmode = param_regs[0]->reg_class->mode;
 276                                 ir_type *type    = get_type_for_mode(regmode);
 277                                 param->type      = type;
 278                                 param->offset    = stack_offset;
 279                                 assert(get_mode_size_bits(regmode) == 32);
 280                                 stack_offset += SPARC_REGISTER_SIZE;
 281                         }
 282                 }
 283         }
 284         n_param_regs_used = regnum;
 285
 286         /* determine how results are passed */
 287         n_results    = get_method_n_ress(function_type);
 288         regnum       = 0;
 289         float_regnum = 0;
 290         results      = XMALLOCNZ(reg_or_stackslot_t, n_results);
 291         for (i = 0; i < n_results; ++i) {
 292                 ir_type            *result_type = get_method_res_type(function_type, i);
 293                 ir_mode            *result_mode = get_type_mode(result_type);
 294                 reg_or_stackslot_t *result      = &results[i];
 295
 296                 if (mode_is_float(result_mode)) {
 297                         unsigned n_regs   = determine_n_float_regs(result_mode);
 298                         unsigned next_reg = round_up2(float_regnum, n_regs);
 299
 300                         if (next_reg >= n_float_result_regs) {
 301                                 panic("Too many float results");
 302                         } else {
 303                                 const arch_register_t *reg = float_result_regs[next_reg];
 304                                 rbitset_clear(caller_saves, reg->global_index);
 305                                 result->reg_offset = i;
 306                                 if (n_regs == 1) {
 307                                         result->req0 = reg->single_req;
 308                                 } else if (n_regs == 2) {
 309                                         result->req0 = &float_result_reqs_double[next_reg];
 310                                         rbitset_clear(caller_saves, reg->global_index+1);
 311                                 } else if (n_regs == 4) {
 312                                         result->req0 = &float_result_reqs_quad[next_reg];
 313                                         rbitset_clear(caller_saves, reg->global_index+1);
 314                                         rbitset_clear(caller_saves, reg->global_index+2);
 315                                         rbitset_clear(caller_saves, reg->global_index+3);
 316                                 } else {
 317                                         panic("invalid number of registers in result");
 318                                 }
 319                                 float_regnum = next_reg + n_regs;
 320
 321                                 ++n_reg_results;
 322                         }
 323                 } else {
 324                         if (get_mode_size_bits(result_mode) > 32) {
 325                                 panic("Results with more than 32bits not supported yet");
 326                         }
 327
 328                         if (regnum >= n_param_regs) {
 329                                 panic("Too many results");
 330                         } else {
 331                                 const arch_register_t *reg = param_regs[regnum++];
 332                                 if (irg == NULL || omit_fp)
 333                                         reg = map_i_to_o_reg(reg);
 334                                 result->req0       = reg->single_req;
 335                                 result->reg_offset = i;
 336                                 rbitset_clear(caller_saves, reg->global_index);
 337                                 ++n_reg_results;
 338                         }
 339                 }
 340         }
 341
 342         cconv                   = XMALLOCZ(calling_convention_t);
 343         cconv->parameters       = params;
 344         cconv->param_stack_size = stack_offset;
 345         cconv->n_param_regs     = n_param_regs_used;
 346         cconv->results          = results;
 347         cconv->omit_fp          = omit_fp;
 348         cconv->caller_saves     = caller_saves;
 349         cconv->n_reg_results    = n_reg_results;
 350
 351         /* setup ignore register array */
 352         if (irg != NULL) {
 353                 be_irg_t       *birg      = be_birg_from_irg(irg);
 354                 size_t          n_ignores = ARRAY_SIZE(ignore_regs);
 355                 struct obstack *obst      = &birg->obst;
 356                 size_t          r;
 357
 358                 birg->allocatable_regs = rbitset_obstack_alloc(obst, N_SPARC_REGISTERS);
 359                 rbitset_set_all(birg->allocatable_regs, N_SPARC_REGISTERS);
 360                 for (r = 0; r < n_ignores; ++r) {
 361                         rbitset_clear(birg->allocatable_regs, ignore_regs[r]);
 362                 }
 363         }
 364
 365         return cconv;
 366 }
 367
 368 void sparc_free_calling_convention(calling_convention_t *cconv)
 369 {
 370         free(cconv->parameters);
 371         free(cconv->results);
 372         free(cconv->caller_saves);
 373         free(cconv);
 374 }
 375
 376 void sparc_cconv_init(void)
 377 {
 378         size_t i;
 379         for (i = 0; i < ARRAY_SIZE(caller_saves); ++i) {
 380                 rbitset_set(default_caller_saves, caller_saves[i]);
 381         }
 382
 383         rbitset_set_all(default_returns_twice_saves, N_SPARC_REGISTERS);
 384         for (i = 0; i < ARRAY_SIZE(returns_twice_saved); ++i) {
 385                 rbitset_clear(default_returns_twice_saves, returns_twice_saved[i]);
 386         }
 387         for (i = 0; i < ARRAY_SIZE(ignore_regs); ++i) {
 388                 rbitset_clear(default_returns_twice_saves, ignore_regs[i]);
 389         }
 390
 391         for (i = 0; i < ARRAY_SIZE(float_result_reqs_double); i += 2) {
 392                 arch_register_req_t *req = &float_result_reqs_double[i];
 393                 *req = *float_result_regs[i]->single_req;
 394                 req->type |= arch_register_req_type_aligned;
 395                 req->width = 2;
 396         }
 397         for (i = 0; i < ARRAY_SIZE(float_result_reqs_quad); i += 4) {
 398                 arch_register_req_t *req = &float_result_reqs_quad[i];
 399                 *req = *float_result_regs[i]->single_req;
 400                 req->type |= arch_register_req_type_aligned;
 401                 req->width = 4;
 402         }
 403 }