nsz Git - libfirm/blob - ir/be/sparc/sparc_cconv.c

   1 /*
   2  * This file is part of libFirm.
   3  * Copyright (C) 2012 University of Karlsruhe.
   4  */
   5
   6 /**
   7  * @file
   8  * @brief   calling convention helpers
   9  * @author  Matthias Braun
  10  */
  11 #include "config.h"
  12
  13 #include "be_t.h"
  14 #include "beirg.h"
  15 #include "sparc_cconv.h"
  16 #include "irmode.h"
  17 #include "irgwalk.h"
  18 #include "typerep.h"
  19 #include "xmalloc.h"
  20 #include "util.h"
  21 #include "error.h"
  22 #include "gen_sparc_regalloc_if.h"
  23 #include "bitfiddle.h"
  24
  25 static const unsigned ignore_regs[] = {
  26         REG_G0,
  27         /* used in case an address offset does not fit into an immediate: */
  28         REG_G4,
  29         /* reserved for SPARC ABI: */
  30         REG_G5,
  31         REG_G6,
  32         REG_G7,
  33
  34         REG_SP,
  35         REG_O7,
  36         REG_FRAME_POINTER,
  37         REG_I7,
  38
  39         REG_FPFLAGS,
  40         REG_FLAGS,
  41         REG_Y,
  42
  43         REG_F31,
  44 };
  45
  46 static const arch_register_t* const param_regs[] = {
  47         &sparc_registers[REG_I0],
  48         &sparc_registers[REG_I1],
  49         &sparc_registers[REG_I2],
  50         &sparc_registers[REG_I3],
  51         &sparc_registers[REG_I4],
  52         &sparc_registers[REG_I5],
  53 };
  54 COMPILETIME_ASSERT(ARRAY_SIZE(param_regs) == SPARC_N_PARAM_REGS, sparcparamregs)
  55
  56 static const arch_register_t* const float_result_regs[] = {
  57         &sparc_registers[REG_F0],
  58         &sparc_registers[REG_F1],
  59         &sparc_registers[REG_F2],
  60         &sparc_registers[REG_F3],
  61         &sparc_registers[REG_F4],
  62         &sparc_registers[REG_F5],
  63         &sparc_registers[REG_F6],
  64         &sparc_registers[REG_F7],
  65 };
  66 static arch_register_req_t float_result_reqs_double[8];
  67 static arch_register_req_t float_result_reqs_quad[8];
  68
  69 static const unsigned caller_saves[] = {
  70         REG_G1,
  71         REG_G2,
  72         REG_G3,
  73         REG_O0,
  74         REG_O1,
  75         REG_O2,
  76         REG_O3,
  77         REG_O4,
  78         REG_O5,
  79         REG_F0,
  80         REG_F1,
  81         REG_F2,
  82         REG_F3,
  83         REG_F4,
  84         REG_F5,
  85         REG_F6,
  86         REG_F7,
  87         REG_F8,
  88         REG_F9,
  89         REG_F10,
  90         REG_F11,
  91         REG_F12,
  92         REG_F13,
  93         REG_F14,
  94         REG_F15,
  95         REG_F16,
  96         REG_F17,
  97         REG_F18,
  98         REG_F19,
  99         REG_F20,
 100         REG_F21,
 101         REG_F22,
 102         REG_F23,
 103         REG_F24,
 104         REG_F25,
 105         REG_F26,
 106         REG_F27,
 107         REG_F28,
 108         REG_F29,
 109         REG_F30,
 110         REG_FLAGS,
 111         REG_FPFLAGS,
 112         REG_Y,
 113 };
 114 static unsigned default_caller_saves[BITSET_SIZE_ELEMS(N_SPARC_REGISTERS)];
 115
 116 static const unsigned returns_twice_saved[] = {
 117         REG_SP,
 118         REG_FRAME_POINTER,
 119         REG_I7
 120 };
 121 static unsigned default_returns_twice_saves[BITSET_SIZE_ELEMS(N_SPARC_REGISTERS)];
 122
 123 /**
 124  * Maps an input register representing the i'th register input
 125  * to the i'th register output.
 126  */
 127 static const arch_register_t *map_i_to_o_reg(const arch_register_t *reg)
 128 {
 129         unsigned idx = reg->global_index;
 130         assert(REG_I0 <= idx && idx <= REG_I7);
 131         idx += REG_O0 - REG_I0;
 132         assert(REG_O0 <= idx && idx <= REG_O7);
 133         return &sparc_registers[idx];
 134 }
 135
 136 static void check_omit_fp(ir_node *node, void *env)
 137 {
 138         /* omit-fp is not possible if:
 139          *  - we have allocations on the stack
 140          *  - we have calls (with the exception of tail-calls once we support them)
 141          */
 142         if ((is_Alloc(node) && get_Alloc_where(node) == stack_alloc)
 143                         || (is_Free(node) && get_Free_where(node) == stack_alloc)
 144                         || is_Call(node)) {
 145                 bool *can_omit_fp = (bool*) env;
 146                 *can_omit_fp = false;
 147         }
 148 }
 149
 150 static unsigned determine_n_float_regs(ir_mode *mode)
 151 {
 152         unsigned bits = get_mode_size_bits(mode);
 153         switch (bits) {
 154         case 32:
 155                 return 1;
 156         case 64:
 157                 return 2;
 158         case 128:
 159                 return 4;
 160         default:
 161                 panic("Unexpected floatingpoint mode %+F", mode);
 162         }
 163 }
 164
 165 calling_convention_t *sparc_decide_calling_convention(ir_type *function_type,
 166                                                       ir_graph *irg)
 167 {
 168         bool omit_fp = false;
 169         if (irg != NULL) {
 170                 omit_fp = be_options.omit_fp;
 171                 /* our current vaarg handling needs the standard space to store the
 172                  * args 0-5 in it */
 173                 if (get_method_variadicity(function_type) == variadicity_variadic)
 174                         omit_fp = false;
 175                 if (omit_fp == true) {
 176                         irg_walk_graph(irg, check_omit_fp, NULL, &omit_fp);
 177                 }
 178         }
 179
 180         mtp_additional_properties mtp
 181                 = get_method_additional_properties(function_type);
 182         unsigned *caller_saves = rbitset_malloc(N_SPARC_REGISTERS);
 183         if (mtp & mtp_property_returns_twice) {
 184                 rbitset_copy(caller_saves, default_returns_twice_saves,
 185                              N_SPARC_REGISTERS);
 186         } else {
 187                 rbitset_copy(caller_saves, default_caller_saves, N_SPARC_REGISTERS);
 188         }
 189
 190         /* determine how parameters are passed */
 191         int                 n_params = get_method_n_params(function_type);
 192         int                 regnum   = 0;
 193         reg_or_stackslot_t *params   = XMALLOCNZ(reg_or_stackslot_t, n_params);
 194
 195         int      n_param_regs = ARRAY_SIZE(param_regs);
 196         unsigned stack_offset = 0;
 197         for (int i = 0; i < n_params; ++i) {
 198                 ir_type            *param_type = get_method_param_type(function_type,i);
 199                 ir_mode            *mode;
 200                 int                 bits;
 201                 reg_or_stackslot_t *param;
 202
 203                 if (is_compound_type(param_type))
 204                         panic("compound arguments not supported yet");
 205
 206                 mode  = get_type_mode(param_type);
 207                 bits  = get_mode_size_bits(mode);
 208                 param = &params[i];
 209
 210                 if (i == 0 &&
 211                     (get_method_calling_convention(function_type) & cc_compound_ret)) {
 212                         assert(mode_is_reference(mode) && bits == 32);
 213                         /* special case, we have reserved space for this on the between
 214                          * type */
 215                         param->type   = param_type;
 216                         param->offset = -SPARC_MIN_STACKSIZE+SPARC_AGGREGATE_RETURN_OFFSET;
 217                         continue;
 218                 }
 219
 220                 if (regnum < n_param_regs) {
 221                         const arch_register_t *reg = param_regs[regnum];
 222                         if (irg == NULL || omit_fp)
 223                                 reg = map_i_to_o_reg(reg);
 224                         param->reg0       = reg;
 225                         param->req0       = reg->single_req;
 226                         param->reg_offset = regnum;
 227                         ++regnum;
 228                 } else {
 229                         param->type   = param_type;
 230                         param->offset = stack_offset;
 231                         /* increase offset by at least SPARC_REGISTER_SIZE bytes so everything is aligned */
 232                         stack_offset += bits > 8 * SPARC_REGISTER_SIZE ? bits / 8 : SPARC_REGISTER_SIZE;
 233                         continue;
 234                 }
 235
 236                 /* we might need a 2nd 32bit component (for 64bit or double values) */
 237                 if (bits > 32) {
 238                         if (bits > 64)
 239                                 panic("only 32 and 64bit modes supported");
 240
 241                         if (regnum < n_param_regs) {
 242                                 const arch_register_t *reg = param_regs[regnum];
 243                                 if (irg == NULL || omit_fp)
 244                                         reg = map_i_to_o_reg(reg);
 245                                 param->reg1       = reg;
 246                                 param->req1       = reg->single_req;
 247                                 ++regnum;
 248                         } else {
 249                                 ir_mode *regmode = param_regs[0]->reg_class->mode;
 250                                 ir_type *type    = get_type_for_mode(regmode);
 251                                 param->type      = type;
 252                                 param->offset    = stack_offset;
 253                                 assert(get_mode_size_bits(regmode) == 32);
 254                                 stack_offset += SPARC_REGISTER_SIZE;
 255                         }
 256                 }
 257         }
 258         unsigned n_param_regs_used = regnum;
 259
 260         /* determine how results are passed */
 261         int                 n_results           = get_method_n_ress(function_type);
 262         unsigned            float_regnum        = 0;
 263         unsigned            n_reg_results       = 0;
 264         unsigned            n_float_result_regs = ARRAY_SIZE(float_result_regs);
 265         reg_or_stackslot_t *results = XMALLOCNZ(reg_or_stackslot_t, n_results);
 266         regnum        = 0;
 267         for (int i = 0; i < n_results; ++i) {
 268                 ir_type            *result_type = get_method_res_type(function_type, i);
 269                 ir_mode            *result_mode = get_type_mode(result_type);
 270                 reg_or_stackslot_t *result      = &results[i];
 271
 272                 if (mode_is_float(result_mode)) {
 273                         unsigned n_regs   = determine_n_float_regs(result_mode);
 274                         unsigned next_reg = round_up2(float_regnum, n_regs);
 275
 276                         if (next_reg >= n_float_result_regs) {
 277                                 panic("Too many float results");
 278                         } else {
 279                                 const arch_register_t *reg = float_result_regs[next_reg];
 280                                 rbitset_clear(caller_saves, reg->global_index);
 281                                 result->reg_offset = i;
 282                                 if (n_regs == 1) {
 283                                         result->req0 = reg->single_req;
 284                                 } else if (n_regs == 2) {
 285                                         result->req0 = &float_result_reqs_double[next_reg];
 286                                         rbitset_clear(caller_saves, reg->global_index+1);
 287                                 } else if (n_regs == 4) {
 288                                         result->req0 = &float_result_reqs_quad[next_reg];
 289                                         rbitset_clear(caller_saves, reg->global_index+1);
 290                                         rbitset_clear(caller_saves, reg->global_index+2);
 291                                         rbitset_clear(caller_saves, reg->global_index+3);
 292                                 } else {
 293                                         panic("invalid number of registers in result");
 294                                 }
 295                                 float_regnum = next_reg + n_regs;
 296
 297                                 ++n_reg_results;
 298                         }
 299                 } else {
 300                         if (get_mode_size_bits(result_mode) > 32) {
 301                                 panic("Results with more than 32bits not supported yet");
 302                         }
 303
 304                         if (regnum >= n_param_regs) {
 305                                 panic("Too many results");
 306                         } else {
 307                                 const arch_register_t *reg = param_regs[regnum++];
 308                                 if (irg == NULL || omit_fp)
 309                                         reg = map_i_to_o_reg(reg);
 310                                 result->req0       = reg->single_req;
 311                                 result->reg_offset = i;
 312                                 rbitset_clear(caller_saves, reg->global_index);
 313                                 ++n_reg_results;
 314                         }
 315                 }
 316         }
 317
 318         calling_convention_t *cconv = XMALLOCZ(calling_convention_t);
 319         cconv->parameters       = params;
 320         cconv->param_stack_size = stack_offset;
 321         cconv->n_param_regs     = n_param_regs_used;
 322         cconv->results          = results;
 323         cconv->omit_fp          = omit_fp;
 324         cconv->caller_saves     = caller_saves;
 325         cconv->n_reg_results    = n_reg_results;
 326
 327         /* setup ignore register array */
 328         if (irg != NULL) {
 329                 be_irg_t       *birg      = be_birg_from_irg(irg);
 330                 size_t          n_ignores = ARRAY_SIZE(ignore_regs);
 331                 struct obstack *obst      = &birg->obst;
 332                 size_t          r;
 333
 334                 birg->allocatable_regs = rbitset_obstack_alloc(obst, N_SPARC_REGISTERS);
 335                 rbitset_set_all(birg->allocatable_regs, N_SPARC_REGISTERS);
 336                 for (r = 0; r < n_ignores; ++r) {
 337                         rbitset_clear(birg->allocatable_regs, ignore_regs[r]);
 338                 }
 339         }
 340
 341         return cconv;
 342 }
 343
 344 void sparc_free_calling_convention(calling_convention_t *cconv)
 345 {
 346         free(cconv->parameters);
 347         free(cconv->results);
 348         free(cconv->caller_saves);
 349         free(cconv);
 350 }
 351
 352 void sparc_cconv_init(void)
 353 {
 354         for (size_t i = 0; i < ARRAY_SIZE(caller_saves); ++i) {
 355                 rbitset_set(default_caller_saves, caller_saves[i]);
 356         }
 357
 358         rbitset_set_all(default_returns_twice_saves, N_SPARC_REGISTERS);
 359         for (size_t i = 0; i < ARRAY_SIZE(returns_twice_saved); ++i) {
 360                 rbitset_clear(default_returns_twice_saves, returns_twice_saved[i]);
 361         }
 362         for (size_t i = 0; i < ARRAY_SIZE(ignore_regs); ++i) {
 363                 rbitset_clear(default_returns_twice_saves, ignore_regs[i]);
 364         }
 365
 366         for (size_t i = 0; i < ARRAY_SIZE(float_result_reqs_double); i += 2) {
 367                 arch_register_req_t *req = &float_result_reqs_double[i];
 368                 *req = *float_result_regs[i]->single_req;
 369                 req->type |= arch_register_req_type_aligned;
 370                 req->width = 2;
 371         }
 372         for (size_t i = 0; i < ARRAY_SIZE(float_result_reqs_quad); i += 4) {
 373                 arch_register_req_t *req = &float_result_reqs_quad[i];
 374                 *req = *float_result_regs[i]->single_req;
 375                 req->type |= arch_register_req_type_aligned;
 376                 req->width = 4;
 377         }
 378 }