nsz Git - libfirm/blob - ir/be/sparc/sparc_cconv.c

   1 /*
   2  * Copyright (C) 1995-2010 University of Karlsruhe.  All right reserved.
   3  *
   4  * This file is part of libFirm.
   5  *
   6  * This file may be distributed and/or modified under the terms of the
   7  * GNU General Public License version 2 as published by the Free Software
   8  * Foundation and appearing in the file LICENSE.GPL included in the
   9  * packaging of this file.
  10  *
  11  * Licensees holding valid libFirm Professional Edition licenses may use
  12  * this file in accordance with the libFirm Commercial License.
  13  * Agreement provided with the Software.
  14  *
  15  * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
  16  * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  17  * PURPOSE.
  18  */
  19
  20 /**
  21  * @file
  22  * @brief   calling convention helpers
  23  * @author  Matthias Braun
  24  */
  25 #include "config.h"
  26
  27 #include "be_t.h"
  28 #include "beirg.h"
  29 #include "sparc_cconv.h"
  30 #include "irmode.h"
  31 #include "irgwalk.h"
  32 #include "typerep.h"
  33 #include "xmalloc.h"
  34 #include "util.h"
  35 #include "error.h"
  36 #include "gen_sparc_regalloc_if.h"
  37 #include "bitfiddle.h"
  38
  39 static const unsigned ignore_regs[] = {
  40         REG_G0,
  41         /* used in case an address offset does not fit into an immediate: */
  42         REG_G4,
  43         /* reserved for SPARC ABI: */
  44         REG_G5,
  45         REG_G6,
  46         REG_G7,
  47
  48         REG_SP,
  49         REG_O7,
  50         REG_FRAME_POINTER,
  51         REG_I7,
  52
  53         REG_FPFLAGS,
  54         REG_FLAGS,
  55         REG_Y,
  56
  57         REG_F31,
  58 };
  59
  60 static const arch_register_t* const param_regs[] = {
  61         &sparc_registers[REG_I0],
  62         &sparc_registers[REG_I1],
  63         &sparc_registers[REG_I2],
  64         &sparc_registers[REG_I3],
  65         &sparc_registers[REG_I4],
  66         &sparc_registers[REG_I5],
  67 };
  68 COMPILETIME_ASSERT(ARRAY_SIZE(param_regs) == SPARC_N_PARAM_REGS, sparcparamregs)
  69
  70 static const arch_register_t* const float_result_regs[] = {
  71         &sparc_registers[REG_F0],
  72         &sparc_registers[REG_F1],
  73         &sparc_registers[REG_F2],
  74         &sparc_registers[REG_F3],
  75         &sparc_registers[REG_F4],
  76         &sparc_registers[REG_F5],
  77         &sparc_registers[REG_F6],
  78         &sparc_registers[REG_F7],
  79 };
  80 static arch_register_req_t float_result_reqs_double[8];
  81 static arch_register_req_t float_result_reqs_quad[8];
  82
  83 static const unsigned caller_saves[] = {
  84         REG_G1,
  85         REG_G2,
  86         REG_G3,
  87         REG_O0,
  88         REG_O1,
  89         REG_O2,
  90         REG_O3,
  91         REG_O4,
  92         REG_O5,
  93         REG_F0,
  94         REG_F1,
  95         REG_F2,
  96         REG_F3,
  97         REG_F4,
  98         REG_F5,
  99         REG_F6,
 100         REG_F7,
 101         REG_F8,
 102         REG_F9,
 103         REG_F10,
 104         REG_F11,
 105         REG_F12,
 106         REG_F13,
 107         REG_F14,
 108         REG_F15,
 109         REG_F16,
 110         REG_F17,
 111         REG_F18,
 112         REG_F19,
 113         REG_F20,
 114         REG_F21,
 115         REG_F22,
 116         REG_F23,
 117         REG_F24,
 118         REG_F25,
 119         REG_F26,
 120         REG_F27,
 121         REG_F28,
 122         REG_F29,
 123         REG_F30,
 124         REG_FLAGS,
 125         REG_FPFLAGS,
 126         REG_Y,
 127 };
 128 static unsigned default_caller_saves[BITSET_SIZE_ELEMS(N_SPARC_REGISTERS)];
 129
 130 static const unsigned returns_twice_saved[] = {
 131         REG_SP,
 132         REG_FRAME_POINTER,
 133         REG_I7
 134 };
 135 static unsigned default_returns_twice_saves[BITSET_SIZE_ELEMS(N_SPARC_REGISTERS)];
 136
 137 /**
 138  * Maps an input register representing the i'th register input
 139  * to the i'th register output.
 140  */
 141 static const arch_register_t *map_i_to_o_reg(const arch_register_t *reg)
 142 {
 143         unsigned idx = reg->global_index;
 144         assert(REG_I0 <= idx && idx <= REG_I7);
 145         idx += REG_O0 - REG_I0;
 146         assert(REG_O0 <= idx && idx <= REG_O7);
 147         return &sparc_registers[idx];
 148 }
 149
 150 static void check_omit_fp(ir_node *node, void *env)
 151 {
 152         /* omit-fp is not possible if:
 153          *  - we have allocations on the stack
 154          *  - we have calls (with the exception of tail-calls once we support them)
 155          */
 156         if ((is_Alloc(node) && get_Alloc_where(node) == stack_alloc)
 157                         || (is_Free(node) && get_Free_where(node) == stack_alloc)
 158                         || is_Call(node)) {
 159                 bool *can_omit_fp = (bool*) env;
 160                 *can_omit_fp = false;
 161         }
 162 }
 163
 164 static unsigned determine_n_float_regs(ir_mode *mode)
 165 {
 166         unsigned bits = get_mode_size_bits(mode);
 167         switch (bits) {
 168         case 32:
 169                 return 1;
 170         case 64:
 171                 return 2;
 172         case 128:
 173                 return 4;
 174         default:
 175                 panic("Unexpected floatingpoint mode %+F", mode);
 176         }
 177 }
 178
 179 calling_convention_t *sparc_decide_calling_convention(ir_type *function_type,
 180                                                       ir_graph *irg)
 181 {
 182         bool omit_fp = false;
 183         if (irg != NULL) {
 184                 omit_fp = be_options.omit_fp;
 185                 /* our current vaarg handling needs the standard space to store the
 186                  * args 0-5 in it */
 187                 if (get_method_variadicity(function_type) == variadicity_variadic)
 188                         omit_fp = false;
 189                 if (omit_fp == true) {
 190                         irg_walk_graph(irg, check_omit_fp, NULL, &omit_fp);
 191                 }
 192         }
 193
 194         mtp_additional_properties mtp
 195                 = get_method_additional_properties(function_type);
 196         unsigned *caller_saves = rbitset_malloc(N_SPARC_REGISTERS);
 197         if (mtp & mtp_property_returns_twice) {
 198                 rbitset_copy(caller_saves, default_returns_twice_saves,
 199                              N_SPARC_REGISTERS);
 200         } else {
 201                 rbitset_copy(caller_saves, default_caller_saves, N_SPARC_REGISTERS);
 202         }
 203
 204         /* determine how parameters are passed */
 205         int                 n_params = get_method_n_params(function_type);
 206         int                 regnum   = 0;
 207         reg_or_stackslot_t *params   = XMALLOCNZ(reg_or_stackslot_t, n_params);
 208
 209         int      n_param_regs = ARRAY_SIZE(param_regs);
 210         unsigned stack_offset = 0;
 211         for (int i = 0; i < n_params; ++i) {
 212                 ir_type            *param_type = get_method_param_type(function_type,i);
 213                 ir_mode            *mode;
 214                 int                 bits;
 215                 reg_or_stackslot_t *param;
 216
 217                 if (is_compound_type(param_type))
 218                         panic("compound arguments not supported yet");
 219
 220                 mode  = get_type_mode(param_type);
 221                 bits  = get_mode_size_bits(mode);
 222                 param = &params[i];
 223
 224                 if (i == 0 &&
 225                     (get_method_calling_convention(function_type) & cc_compound_ret)) {
 226                         assert(mode_is_reference(mode) && bits == 32);
 227                         /* special case, we have reserved space for this on the between
 228                          * type */
 229                         param->type   = param_type;
 230                         param->offset = -SPARC_MIN_STACKSIZE+SPARC_AGGREGATE_RETURN_OFFSET;
 231                         continue;
 232                 }
 233
 234                 if (regnum < n_param_regs) {
 235                         const arch_register_t *reg = param_regs[regnum];
 236                         if (irg == NULL || omit_fp)
 237                                 reg = map_i_to_o_reg(reg);
 238                         param->reg0       = reg;
 239                         param->req0       = reg->single_req;
 240                         param->reg_offset = regnum;
 241                         ++regnum;
 242                 } else {
 243                         param->type   = param_type;
 244                         param->offset = stack_offset;
 245                         /* increase offset by at least SPARC_REGISTER_SIZE bytes so everything is aligned */
 246                         stack_offset += bits > 8 * SPARC_REGISTER_SIZE ? bits / 8 : SPARC_REGISTER_SIZE;
 247                         continue;
 248                 }
 249
 250                 /* we might need a 2nd 32bit component (for 64bit or double values) */
 251                 if (bits > 32) {
 252                         if (bits > 64)
 253                                 panic("only 32 and 64bit modes supported");
 254
 255                         if (regnum < n_param_regs) {
 256                                 const arch_register_t *reg = param_regs[regnum];
 257                                 if (irg == NULL || omit_fp)
 258                                         reg = map_i_to_o_reg(reg);
 259                                 param->reg1       = reg;
 260                                 param->req1       = reg->single_req;
 261                                 ++regnum;
 262                         } else {
 263                                 ir_mode *regmode = param_regs[0]->reg_class->mode;
 264                                 ir_type *type    = get_type_for_mode(regmode);
 265                                 param->type      = type;
 266                                 param->offset    = stack_offset;
 267                                 assert(get_mode_size_bits(regmode) == 32);
 268                                 stack_offset += SPARC_REGISTER_SIZE;
 269                         }
 270                 }
 271         }
 272         unsigned n_param_regs_used = regnum;
 273
 274         /* determine how results are passed */
 275         int                 n_results           = get_method_n_ress(function_type);
 276         unsigned            float_regnum        = 0;
 277         unsigned            n_reg_results       = 0;
 278         unsigned            n_float_result_regs = ARRAY_SIZE(float_result_regs);
 279         reg_or_stackslot_t *results = XMALLOCNZ(reg_or_stackslot_t, n_results);
 280         regnum        = 0;
 281         for (int i = 0; i < n_results; ++i) {
 282                 ir_type            *result_type = get_method_res_type(function_type, i);
 283                 ir_mode            *result_mode = get_type_mode(result_type);
 284                 reg_or_stackslot_t *result      = &results[i];
 285
 286                 if (mode_is_float(result_mode)) {
 287                         unsigned n_regs   = determine_n_float_regs(result_mode);
 288                         unsigned next_reg = round_up2(float_regnum, n_regs);
 289
 290                         if (next_reg >= n_float_result_regs) {
 291                                 panic("Too many float results");
 292                         } else {
 293                                 const arch_register_t *reg = float_result_regs[next_reg];
 294                                 rbitset_clear(caller_saves, reg->global_index);
 295                                 result->reg_offset = i;
 296                                 if (n_regs == 1) {
 297                                         result->req0 = reg->single_req;
 298                                 } else if (n_regs == 2) {
 299                                         result->req0 = &float_result_reqs_double[next_reg];
 300                                         rbitset_clear(caller_saves, reg->global_index+1);
 301                                 } else if (n_regs == 4) {
 302                                         result->req0 = &float_result_reqs_quad[next_reg];
 303                                         rbitset_clear(caller_saves, reg->global_index+1);
 304                                         rbitset_clear(caller_saves, reg->global_index+2);
 305                                         rbitset_clear(caller_saves, reg->global_index+3);
 306                                 } else {
 307                                         panic("invalid number of registers in result");
 308                                 }
 309                                 float_regnum = next_reg + n_regs;
 310
 311                                 ++n_reg_results;
 312                         }
 313                 } else {
 314                         if (get_mode_size_bits(result_mode) > 32) {
 315                                 panic("Results with more than 32bits not supported yet");
 316                         }
 317
 318                         if (regnum >= n_param_regs) {
 319                                 panic("Too many results");
 320                         } else {
 321                                 const arch_register_t *reg = param_regs[regnum++];
 322                                 if (irg == NULL || omit_fp)
 323                                         reg = map_i_to_o_reg(reg);
 324                                 result->req0       = reg->single_req;
 325                                 result->reg_offset = i;
 326                                 rbitset_clear(caller_saves, reg->global_index);
 327                                 ++n_reg_results;
 328                         }
 329                 }
 330         }
 331
 332         calling_convention_t *cconv = XMALLOCZ(calling_convention_t);
 333         cconv->parameters       = params;
 334         cconv->param_stack_size = stack_offset;
 335         cconv->n_param_regs     = n_param_regs_used;
 336         cconv->results          = results;
 337         cconv->omit_fp          = omit_fp;
 338         cconv->caller_saves     = caller_saves;
 339         cconv->n_reg_results    = n_reg_results;
 340
 341         /* setup ignore register array */
 342         if (irg != NULL) {
 343                 be_irg_t       *birg      = be_birg_from_irg(irg);
 344                 size_t          n_ignores = ARRAY_SIZE(ignore_regs);
 345                 struct obstack *obst      = &birg->obst;
 346                 size_t          r;
 347
 348                 birg->allocatable_regs = rbitset_obstack_alloc(obst, N_SPARC_REGISTERS);
 349                 rbitset_set_all(birg->allocatable_regs, N_SPARC_REGISTERS);
 350                 for (r = 0; r < n_ignores; ++r) {
 351                         rbitset_clear(birg->allocatable_regs, ignore_regs[r]);
 352                 }
 353         }
 354
 355         return cconv;
 356 }
 357
 358 void sparc_free_calling_convention(calling_convention_t *cconv)
 359 {
 360         free(cconv->parameters);
 361         free(cconv->results);
 362         free(cconv->caller_saves);
 363         free(cconv);
 364 }
 365
 366 void sparc_cconv_init(void)
 367 {
 368         for (size_t i = 0; i < ARRAY_SIZE(caller_saves); ++i) {
 369                 rbitset_set(default_caller_saves, caller_saves[i]);
 370         }
 371
 372         rbitset_set_all(default_returns_twice_saves, N_SPARC_REGISTERS);
 373         for (size_t i = 0; i < ARRAY_SIZE(returns_twice_saved); ++i) {
 374                 rbitset_clear(default_returns_twice_saves, returns_twice_saved[i]);
 375         }
 376         for (size_t i = 0; i < ARRAY_SIZE(ignore_regs); ++i) {
 377                 rbitset_clear(default_returns_twice_saves, ignore_regs[i]);
 378         }
 379
 380         for (size_t i = 0; i < ARRAY_SIZE(float_result_reqs_double); i += 2) {
 381                 arch_register_req_t *req = &float_result_reqs_double[i];
 382                 *req = *float_result_regs[i]->single_req;
 383                 req->type |= arch_register_req_type_aligned;
 384                 req->width = 2;
 385         }
 386         for (size_t i = 0; i < ARRAY_SIZE(float_result_reqs_quad); i += 4) {
 387                 arch_register_req_t *req = &float_result_reqs_quad[i];
 388                 *req = *float_result_regs[i]->single_req;
 389                 req->type |= arch_register_req_type_aligned;
 390                 req->width = 4;
 391         }
 392 }