2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief calling convention helpers
23 * @author Matthias Braun
28 #include "sparc_cconv.h"
35 #include "gen_sparc_regalloc_if.h"
36 #include "bitfiddle.h"
38 static const unsigned ignore_regs[] = {
40 /* reserved for sparc ABI: */
55 static const arch_register_t* const param_regs[] = {
56 &sparc_registers[REG_I0],
57 &sparc_registers[REG_I1],
58 &sparc_registers[REG_I2],
59 &sparc_registers[REG_I3],
60 &sparc_registers[REG_I4],
61 &sparc_registers[REG_I5],
64 static const arch_register_t* const float_result_regs[] = {
65 &sparc_registers[REG_F0],
66 &sparc_registers[REG_F1],
67 &sparc_registers[REG_F2],
68 &sparc_registers[REG_F3],
69 &sparc_registers[REG_F4],
70 &sparc_registers[REG_F5],
71 &sparc_registers[REG_F6],
72 &sparc_registers[REG_F7],
74 static arch_register_req_t float_result_reqs_double[8];
75 static arch_register_req_t float_result_reqs_quad[8];
77 static const arch_register_t *const caller_saves[] = {
78 &sparc_registers[REG_G1],
79 &sparc_registers[REG_G2],
80 &sparc_registers[REG_G3],
81 &sparc_registers[REG_G4],
82 &sparc_registers[REG_O0],
83 &sparc_registers[REG_O1],
84 &sparc_registers[REG_O2],
85 &sparc_registers[REG_O3],
86 &sparc_registers[REG_O4],
87 &sparc_registers[REG_O5],
88 &sparc_registers[REG_F0],
89 &sparc_registers[REG_F1],
90 &sparc_registers[REG_F2],
91 &sparc_registers[REG_F3],
92 &sparc_registers[REG_F4],
93 &sparc_registers[REG_F5],
94 &sparc_registers[REG_F6],
95 &sparc_registers[REG_F7],
96 &sparc_registers[REG_F8],
97 &sparc_registers[REG_F9],
98 &sparc_registers[REG_F10],
99 &sparc_registers[REG_F11],
100 &sparc_registers[REG_F12],
101 &sparc_registers[REG_F13],
102 &sparc_registers[REG_F14],
103 &sparc_registers[REG_F15],
104 &sparc_registers[REG_F16],
105 &sparc_registers[REG_F17],
106 &sparc_registers[REG_F18],
107 &sparc_registers[REG_F19],
108 &sparc_registers[REG_F20],
109 &sparc_registers[REG_F21],
110 &sparc_registers[REG_F22],
111 &sparc_registers[REG_F23],
112 &sparc_registers[REG_F24],
113 &sparc_registers[REG_F25],
114 &sparc_registers[REG_F26],
115 &sparc_registers[REG_F27],
116 &sparc_registers[REG_F28],
117 &sparc_registers[REG_F29],
118 &sparc_registers[REG_F30],
119 &sparc_registers[REG_F31],
121 static unsigned default_caller_saves[BITSET_SIZE_ELEMS(N_SPARC_REGISTERS)];
124 * Maps an input register representing the i'th register input
125 * to the i'th register output.
127 static const arch_register_t *map_i_to_o_reg(const arch_register_t *reg)
129 unsigned idx = reg->global_index;
130 assert(REG_I0 <= idx && idx <= REG_I7);
131 idx += REG_O0 - REG_I0;
132 assert(REG_O0 <= idx && idx <= REG_O7);
133 return &sparc_registers[idx];
136 static void check_omit_fp(ir_node *node, void *env)
138 bool *can_omit_fp = (bool*) env;
140 /* omit-fp is not possible if:
141 * - we have allocations on the stack
142 * - we have calls (with the exception of tail-calls once we support them)
144 if ((is_Alloc(node) && get_Alloc_where(node) == stack_alloc)
145 || (is_Free(node) && get_Free_where(node) == stack_alloc)
147 *can_omit_fp = false;
151 static unsigned determine_n_float_regs(ir_mode *mode)
153 unsigned bits = get_mode_size_bits(mode);
162 panic("sparc: Unexpected floatingpoint mode %+F", mode);
166 calling_convention_t *sparc_decide_calling_convention(ir_type *function_type,
169 unsigned stack_offset = 0;
170 unsigned n_param_regs_used = 0;
171 int n_param_regs = ARRAY_SIZE(param_regs);
172 unsigned n_float_result_regs = ARRAY_SIZE(float_result_regs);
173 bool omit_fp = false;
174 reg_or_stackslot_t *params;
175 reg_or_stackslot_t *results;
180 unsigned float_regnum;
181 unsigned n_reg_results = 0;
182 calling_convention_t *cconv;
183 unsigned *caller_saves;
186 const be_options_t *options = be_get_irg_options(irg);
187 omit_fp = options->omit_fp;
188 irg_walk_graph(irg, check_omit_fp, NULL, &omit_fp);
191 caller_saves = rbitset_malloc(N_SPARC_REGISTERS);
192 rbitset_copy(caller_saves, default_caller_saves, N_SPARC_REGISTERS);
194 /* determine how parameters are passed */
195 n_params = get_method_n_params(function_type);
197 params = XMALLOCNZ(reg_or_stackslot_t, n_params);
199 for (i = 0; i < n_params; ++i) {
200 ir_type *param_type = get_method_param_type(function_type,i);
201 ir_mode *mode = get_type_mode(param_type);
202 int bits = get_mode_size_bits(mode);
203 reg_or_stackslot_t *param = ¶ms[i];
205 if (i == 0 && function_type->attr.ma.has_compound_ret_parameter) {
206 assert(mode_is_reference(mode) && bits == 32);
207 /* special case, we have reserved space for this on the between
209 param->type = param_type;
210 param->offset = -SPARC_MIN_STACKSIZE+SPARC_AGGREGATE_RETURN_OFFSET;
214 if (regnum < n_param_regs) {
215 const arch_register_t *reg = param_regs[regnum];
216 if (irg == NULL || omit_fp)
217 reg = map_i_to_o_reg(reg);
219 param->req0 = reg->single_req;
220 param->reg_offset = regnum;
223 param->type = param_type;
224 param->offset = stack_offset;
225 /* increase offset 4 bytes so everything is aligned */
226 stack_offset += bits > 32 ? bits/8 : 4;
230 /* we might need a 2nd 32bit component (for 64bit or double values) */
233 panic("only 32 and 64bit modes supported in sparc backend");
235 if (regnum < n_param_regs) {
236 const arch_register_t *reg = param_regs[regnum];
237 if (irg == NULL || omit_fp)
238 reg = map_i_to_o_reg(reg);
240 param->req1 = reg->single_req;
243 ir_mode *regmode = param_regs[0]->reg_class->mode;
244 ir_type *type = get_type_for_mode(regmode);
246 param->offset = stack_offset;
247 assert(get_mode_size_bits(regmode) == 32);
252 n_param_regs_used = regnum;
254 /* determine how results are passed */
255 n_results = get_method_n_ress(function_type);
258 results = XMALLOCNZ(reg_or_stackslot_t, n_results);
259 for (i = 0; i < n_results; ++i) {
260 ir_type *result_type = get_method_res_type(function_type, i);
261 ir_mode *result_mode = get_type_mode(result_type);
262 reg_or_stackslot_t *result = &results[i];
264 if (mode_is_float(result_mode)) {
265 unsigned n_regs = determine_n_float_regs(result_mode);
266 unsigned next_reg = round_up2(float_regnum, n_regs);
268 if (next_reg >= n_float_result_regs) {
269 panic("Too many float results for sparc backend");
271 const arch_register_t *reg = float_result_regs[next_reg];
272 rbitset_clear(caller_saves, reg->global_index);
273 result->reg_offset = i;
275 result->req0 = reg->single_req;
276 } else if (n_regs == 2) {
277 result->req0 = &float_result_reqs_double[next_reg];
278 rbitset_clear(caller_saves, reg->global_index+1);
279 } else if (n_regs == 4) {
280 result->req0 = &float_result_reqs_quad[next_reg];
281 rbitset_clear(caller_saves, reg->global_index+1);
282 rbitset_clear(caller_saves, reg->global_index+2);
283 rbitset_clear(caller_saves, reg->global_index+3);
285 panic("invalid number of registers in sparc float result");
287 float_regnum = next_reg + n_regs;
292 if (get_mode_size_bits(result_mode) > 32) {
293 panic("Results with more than 32bits not supported by sparc backend yet");
296 if (regnum >= n_param_regs) {
297 panic("Too many results for sparc backend");
299 const arch_register_t *reg = param_regs[regnum++];
300 if (irg == NULL || omit_fp)
301 reg = map_i_to_o_reg(reg);
302 result->req0 = reg->single_req;
303 result->reg_offset = i;
304 rbitset_clear(caller_saves, reg->global_index);
310 cconv = XMALLOCZ(calling_convention_t);
311 cconv->parameters = params;
312 cconv->param_stack_size = stack_offset;
313 cconv->n_param_regs = n_param_regs_used;
314 cconv->results = results;
315 cconv->omit_fp = omit_fp;
316 cconv->caller_saves = caller_saves;
317 cconv->n_reg_results = n_reg_results;
319 /* setup ignore register array */
321 be_irg_t *birg = be_birg_from_irg(irg);
322 size_t n_ignores = ARRAY_SIZE(ignore_regs);
323 struct obstack *obst = &birg->obst;
326 assert(birg->allocatable_regs == NULL);
327 birg->allocatable_regs = rbitset_obstack_alloc(obst, N_SPARC_REGISTERS);
328 rbitset_set_all(birg->allocatable_regs, N_SPARC_REGISTERS);
329 for (r = 0; r < n_ignores; ++r) {
330 rbitset_clear(birg->allocatable_regs, ignore_regs[r]);
337 void sparc_free_calling_convention(calling_convention_t *cconv)
339 free(cconv->parameters);
340 free(cconv->results);
341 free(cconv->caller_saves);
345 void sparc_cconv_init(void)
348 for (i = 0; i < ARRAY_SIZE(caller_saves); ++i) {
349 rbitset_set(default_caller_saves, caller_saves[i]->global_index);
352 for (i = 0; i < ARRAY_SIZE(float_result_reqs_double); i += 2) {
353 arch_register_req_t *req = &float_result_reqs_double[i];
354 *req = *float_result_regs[i]->single_req;
355 req->type |= arch_register_req_type_aligned;
358 for (i = 0; i < ARRAY_SIZE(float_result_reqs_quad); i += 4) {
359 arch_register_req_t *req = &float_result_reqs_quad[i];
360 *req = *float_result_regs[i]->single_req;
361 req->type |= arch_register_req_type_aligned;