nsz Git - libfirm/blob - ir/be/sparc/gen_sparc_regalloc_if.c

   1 /**
   2  * @file
   3  * @brief  The generated interface for the register allocator.
   4  *          Contains register classes and types and register constraints
   5  *          for all nodes where constraints were given in spec.
   6  * @note    DO NOT EDIT THIS FILE, your changes will be lost.
   7  *          Edit libfirm/ir/be/sparc/sparc_spec.pl instead.
   8  *          created by: libfirm/ir/be/scripts/generate_regalloc_if.pl libfirm/ir/be/sparc/sparc_spec.pl libfirm/ir/be/sparc
   9  * $date    Tue Dec 15 15:19:15 2009
  10  */
  11 #include "config.h"
  12
  13 #include "gen_sparc_regalloc_if.h"
  14 #include "gen_sparc_machine.h"
  15 #include "bearch_sparc_t.h"
  16 #include "irmode.h"
  17
  18 static const arch_register_req_t sparc_class_reg_req_flags;
  19 static const arch_register_req_t sparc_class_reg_req_gp;
  20 static const arch_register_req_t sparc_class_reg_req_fp;
  21
  22 arch_register_class_t sparc_reg_classes[] = {
  23         { 0, "sparc_flags", N_sparc_flags_REGS, NULL, sparc_flags_regs, arch_register_class_flag_manual_ra, &sparc_class_reg_req_flags },
  24         { 1, "sparc_gp", N_sparc_gp_REGS, NULL, sparc_gp_regs, 0, &sparc_class_reg_req_gp },
  25         { 2, "sparc_fp", N_sparc_fp_REGS, NULL, sparc_fp_regs, 0, &sparc_class_reg_req_fp }
  26 };
  27
  28 static const arch_register_req_t sparc_class_reg_req_flags = {
  29         arch_register_req_type_normal,
  30         &sparc_reg_classes[CLASS_sparc_flags],
  31         NULL,
  32         0,
  33         0
  34 };
  35 static const unsigned sparc_limited_flags_y [] = { (1 << REG_Y) };
  36 static const arch_register_req_t sparc_single_reg_req_flags_y = {
  37         arch_register_req_type_limited,
  38         &sparc_reg_classes[CLASS_sparc_flags],
  39         sparc_limited_flags_y,
  40         0,
  41         0
  42 };
  43 static const arch_register_req_t sparc_class_reg_req_gp = {
  44         arch_register_req_type_normal,
  45         &sparc_reg_classes[CLASS_sparc_gp],
  46         NULL,
  47         0,
  48         0
  49 };
  50 static const unsigned sparc_limited_gp_g0 [] = { (1 << REG_G0), 0 };
  51 static const arch_register_req_t sparc_single_reg_req_gp_g0 = {
  52         arch_register_req_type_limited,
  53         &sparc_reg_classes[CLASS_sparc_gp],
  54         sparc_limited_gp_g0,
  55         0,
  56         0
  57 };
  58 static const unsigned sparc_limited_gp_g1 [] = { (1 << REG_G1), 0 };
  59 static const arch_register_req_t sparc_single_reg_req_gp_g1 = {
  60         arch_register_req_type_limited,
  61         &sparc_reg_classes[CLASS_sparc_gp],
  62         sparc_limited_gp_g1,
  63         0,
  64         0
  65 };
  66 static const unsigned sparc_limited_gp_g2 [] = { (1 << REG_G2), 0 };
  67 static const arch_register_req_t sparc_single_reg_req_gp_g2 = {
  68         arch_register_req_type_limited,
  69         &sparc_reg_classes[CLASS_sparc_gp],
  70         sparc_limited_gp_g2,
  71         0,
  72         0
  73 };
  74 static const unsigned sparc_limited_gp_g3 [] = { (1 << REG_G3), 0 };
  75 static const arch_register_req_t sparc_single_reg_req_gp_g3 = {
  76         arch_register_req_type_limited,
  77         &sparc_reg_classes[CLASS_sparc_gp],
  78         sparc_limited_gp_g3,
  79         0,
  80         0
  81 };
  82 static const unsigned sparc_limited_gp_g4 [] = { (1 << REG_G4), 0 };
  83 static const arch_register_req_t sparc_single_reg_req_gp_g4 = {
  84         arch_register_req_type_limited,
  85         &sparc_reg_classes[CLASS_sparc_gp],
  86         sparc_limited_gp_g4,
  87         0,
  88         0
  89 };
  90 static const unsigned sparc_limited_gp_g5 [] = { (1 << REG_G5), 0 };
  91 static const arch_register_req_t sparc_single_reg_req_gp_g5 = {
  92         arch_register_req_type_limited,
  93         &sparc_reg_classes[CLASS_sparc_gp],
  94         sparc_limited_gp_g5,
  95         0,
  96         0
  97 };
  98 static const unsigned sparc_limited_gp_g6 [] = { (1 << REG_G6), 0 };
  99 static const arch_register_req_t sparc_single_reg_req_gp_g6 = {
 100         arch_register_req_type_limited,
 101         &sparc_reg_classes[CLASS_sparc_gp],
 102         sparc_limited_gp_g6,
 103         0,
 104         0
 105 };
 106 static const unsigned sparc_limited_gp_g7 [] = { (1 << REG_G7), 0 };
 107 static const arch_register_req_t sparc_single_reg_req_gp_g7 = {
 108         arch_register_req_type_limited,
 109         &sparc_reg_classes[CLASS_sparc_gp],
 110         sparc_limited_gp_g7,
 111         0,
 112         0
 113 };
 114 static const unsigned sparc_limited_gp_o0 [] = { (1 << REG_O0), 0 };
 115 static const arch_register_req_t sparc_single_reg_req_gp_o0 = {
 116         arch_register_req_type_limited,
 117         &sparc_reg_classes[CLASS_sparc_gp],
 118         sparc_limited_gp_o0,
 119         0,
 120         0
 121 };
 122 static const unsigned sparc_limited_gp_o1 [] = { (1 << REG_O1), 0 };
 123 static const arch_register_req_t sparc_single_reg_req_gp_o1 = {
 124         arch_register_req_type_limited,
 125         &sparc_reg_classes[CLASS_sparc_gp],
 126         sparc_limited_gp_o1,
 127         0,
 128         0
 129 };
 130 static const unsigned sparc_limited_gp_o2 [] = { (1 << REG_O2), 0 };
 131 static const arch_register_req_t sparc_single_reg_req_gp_o2 = {
 132         arch_register_req_type_limited,
 133         &sparc_reg_classes[CLASS_sparc_gp],
 134         sparc_limited_gp_o2,
 135         0,
 136         0
 137 };
 138 static const unsigned sparc_limited_gp_o3 [] = { (1 << REG_O3), 0 };
 139 static const arch_register_req_t sparc_single_reg_req_gp_o3 = {
 140         arch_register_req_type_limited,
 141         &sparc_reg_classes[CLASS_sparc_gp],
 142         sparc_limited_gp_o3,
 143         0,
 144         0
 145 };
 146 static const unsigned sparc_limited_gp_o4 [] = { (1 << REG_O4), 0 };
 147 static const arch_register_req_t sparc_single_reg_req_gp_o4 = {
 148         arch_register_req_type_limited,
 149         &sparc_reg_classes[CLASS_sparc_gp],
 150         sparc_limited_gp_o4,
 151         0,
 152         0
 153 };
 154 static const unsigned sparc_limited_gp_o5 [] = { (1 << REG_O5), 0 };
 155 static const arch_register_req_t sparc_single_reg_req_gp_o5 = {
 156         arch_register_req_type_limited,
 157         &sparc_reg_classes[CLASS_sparc_gp],
 158         sparc_limited_gp_o5,
 159         0,
 160         0
 161 };
 162 static const unsigned sparc_limited_gp_sp [] = { (1 << REG_SP), 0 };
 163 static const arch_register_req_t sparc_single_reg_req_gp_sp = {
 164         arch_register_req_type_limited,
 165         &sparc_reg_classes[CLASS_sparc_gp],
 166         sparc_limited_gp_sp,
 167         0,
 168         0
 169 };
 170 static const unsigned sparc_limited_gp_o7 [] = { (1 << REG_O7), 0 };
 171 static const arch_register_req_t sparc_single_reg_req_gp_o7 = {
 172         arch_register_req_type_limited,
 173         &sparc_reg_classes[CLASS_sparc_gp],
 174         sparc_limited_gp_o7,
 175         0,
 176         0
 177 };
 178 static const unsigned sparc_limited_gp_l0 [] = { (1 << REG_L0), 0 };
 179 static const arch_register_req_t sparc_single_reg_req_gp_l0 = {
 180         arch_register_req_type_limited,
 181         &sparc_reg_classes[CLASS_sparc_gp],
 182         sparc_limited_gp_l0,
 183         0,
 184         0
 185 };
 186 static const unsigned sparc_limited_gp_l1 [] = { (1 << REG_L1), 0 };
 187 static const arch_register_req_t sparc_single_reg_req_gp_l1 = {
 188         arch_register_req_type_limited,
 189         &sparc_reg_classes[CLASS_sparc_gp],
 190         sparc_limited_gp_l1,
 191         0,
 192         0
 193 };
 194 static const unsigned sparc_limited_gp_l2 [] = { (1 << REG_L2), 0 };
 195 static const arch_register_req_t sparc_single_reg_req_gp_l2 = {
 196         arch_register_req_type_limited,
 197         &sparc_reg_classes[CLASS_sparc_gp],
 198         sparc_limited_gp_l2,
 199         0,
 200         0
 201 };
 202 static const unsigned sparc_limited_gp_l3 [] = { (1 << REG_L3), 0 };
 203 static const arch_register_req_t sparc_single_reg_req_gp_l3 = {
 204         arch_register_req_type_limited,
 205         &sparc_reg_classes[CLASS_sparc_gp],
 206         sparc_limited_gp_l3,
 207         0,
 208         0
 209 };
 210 static const unsigned sparc_limited_gp_l4 [] = { (1 << REG_L4), 0 };
 211 static const arch_register_req_t sparc_single_reg_req_gp_l4 = {
 212         arch_register_req_type_limited,
 213         &sparc_reg_classes[CLASS_sparc_gp],
 214         sparc_limited_gp_l4,
 215         0,
 216         0
 217 };
 218 static const unsigned sparc_limited_gp_l5 [] = { (1 << REG_L5), 0 };
 219 static const arch_register_req_t sparc_single_reg_req_gp_l5 = {
 220         arch_register_req_type_limited,
 221         &sparc_reg_classes[CLASS_sparc_gp],
 222         sparc_limited_gp_l5,
 223         0,
 224         0
 225 };
 226 static const unsigned sparc_limited_gp_l6 [] = { (1 << REG_L6), 0 };
 227 static const arch_register_req_t sparc_single_reg_req_gp_l6 = {
 228         arch_register_req_type_limited,
 229         &sparc_reg_classes[CLASS_sparc_gp],
 230         sparc_limited_gp_l6,
 231         0,
 232         0
 233 };
 234 static const unsigned sparc_limited_gp_l7 [] = { (1 << REG_L7), 0 };
 235 static const arch_register_req_t sparc_single_reg_req_gp_l7 = {
 236         arch_register_req_type_limited,
 237         &sparc_reg_classes[CLASS_sparc_gp],
 238         sparc_limited_gp_l7,
 239         0,
 240         0
 241 };
 242 static const unsigned sparc_limited_gp_i0 [] = { (1 << REG_I0), 0 };
 243 static const arch_register_req_t sparc_single_reg_req_gp_i0 = {
 244         arch_register_req_type_limited,
 245         &sparc_reg_classes[CLASS_sparc_gp],
 246         sparc_limited_gp_i0,
 247         0,
 248         0
 249 };
 250 static const unsigned sparc_limited_gp_i1 [] = { (1 << REG_I1), 0 };
 251 static const arch_register_req_t sparc_single_reg_req_gp_i1 = {
 252         arch_register_req_type_limited,
 253         &sparc_reg_classes[CLASS_sparc_gp],
 254         sparc_limited_gp_i1,
 255         0,
 256         0
 257 };
 258 static const unsigned sparc_limited_gp_i2 [] = { (1 << REG_I2), 0 };
 259 static const arch_register_req_t sparc_single_reg_req_gp_i2 = {
 260         arch_register_req_type_limited,
 261         &sparc_reg_classes[CLASS_sparc_gp],
 262         sparc_limited_gp_i2,
 263         0,
 264         0
 265 };
 266 static const unsigned sparc_limited_gp_i3 [] = { (1 << REG_I3), 0 };
 267 static const arch_register_req_t sparc_single_reg_req_gp_i3 = {
 268         arch_register_req_type_limited,
 269         &sparc_reg_classes[CLASS_sparc_gp],
 270         sparc_limited_gp_i3,
 271         0,
 272         0
 273 };
 274 static const unsigned sparc_limited_gp_i4 [] = { (1 << REG_I4), 0 };
 275 static const arch_register_req_t sparc_single_reg_req_gp_i4 = {
 276         arch_register_req_type_limited,
 277         &sparc_reg_classes[CLASS_sparc_gp],
 278         sparc_limited_gp_i4,
 279         0,
 280         0
 281 };
 282 static const unsigned sparc_limited_gp_i5 [] = { (1 << REG_I5), 0 };
 283 static const arch_register_req_t sparc_single_reg_req_gp_i5 = {
 284         arch_register_req_type_limited,
 285         &sparc_reg_classes[CLASS_sparc_gp],
 286         sparc_limited_gp_i5,
 287         0,
 288         0
 289 };
 290 static const unsigned sparc_limited_gp_fp [] = { (1 << REG_FP), 0 };
 291 static const arch_register_req_t sparc_single_reg_req_gp_fp = {
 292         arch_register_req_type_limited,
 293         &sparc_reg_classes[CLASS_sparc_gp],
 294         sparc_limited_gp_fp,
 295         0,
 296         0
 297 };
 298 static const unsigned sparc_limited_gp_i7 [] = { (1 << REG_I7), 0 };
 299 static const arch_register_req_t sparc_single_reg_req_gp_i7 = {
 300         arch_register_req_type_limited,
 301         &sparc_reg_classes[CLASS_sparc_gp],
 302         sparc_limited_gp_i7,
 303         0,
 304         0
 305 };
 306 static const arch_register_req_t sparc_class_reg_req_fp = {
 307         arch_register_req_type_normal,
 308         &sparc_reg_classes[CLASS_sparc_fp],
 309         NULL,
 310         0,
 311         0
 312 };
 313 static const unsigned sparc_limited_fp_f0 [] = { (1 << REG_F0), 0 };
 314 static const arch_register_req_t sparc_single_reg_req_fp_f0 = {
 315         arch_register_req_type_limited,
 316         &sparc_reg_classes[CLASS_sparc_fp],
 317         sparc_limited_fp_f0,
 318         0,
 319         0
 320 };
 321 static const unsigned sparc_limited_fp_f1 [] = { (1 << REG_F1), 0 };
 322 static const arch_register_req_t sparc_single_reg_req_fp_f1 = {
 323         arch_register_req_type_limited,
 324         &sparc_reg_classes[CLASS_sparc_fp],
 325         sparc_limited_fp_f1,
 326         0,
 327         0
 328 };
 329 static const unsigned sparc_limited_fp_f2 [] = { (1 << REG_F2), 0 };
 330 static const arch_register_req_t sparc_single_reg_req_fp_f2 = {
 331         arch_register_req_type_limited,
 332         &sparc_reg_classes[CLASS_sparc_fp],
 333         sparc_limited_fp_f2,
 334         0,
 335         0
 336 };
 337 static const unsigned sparc_limited_fp_f3 [] = { (1 << REG_F3), 0 };
 338 static const arch_register_req_t sparc_single_reg_req_fp_f3 = {
 339         arch_register_req_type_limited,
 340         &sparc_reg_classes[CLASS_sparc_fp],
 341         sparc_limited_fp_f3,
 342         0,
 343         0
 344 };
 345 static const unsigned sparc_limited_fp_f4 [] = { (1 << REG_F4), 0 };
 346 static const arch_register_req_t sparc_single_reg_req_fp_f4 = {
 347         arch_register_req_type_limited,
 348         &sparc_reg_classes[CLASS_sparc_fp],
 349         sparc_limited_fp_f4,
 350         0,
 351         0
 352 };
 353 static const unsigned sparc_limited_fp_f5 [] = { (1 << REG_F5), 0 };
 354 static const arch_register_req_t sparc_single_reg_req_fp_f5 = {
 355         arch_register_req_type_limited,
 356         &sparc_reg_classes[CLASS_sparc_fp],
 357         sparc_limited_fp_f5,
 358         0,
 359         0
 360 };
 361 static const unsigned sparc_limited_fp_f6 [] = { (1 << REG_F6), 0 };
 362 static const arch_register_req_t sparc_single_reg_req_fp_f6 = {
 363         arch_register_req_type_limited,
 364         &sparc_reg_classes[CLASS_sparc_fp],
 365         sparc_limited_fp_f6,
 366         0,
 367         0
 368 };
 369 static const unsigned sparc_limited_fp_f7 [] = { (1 << REG_F7), 0 };
 370 static const arch_register_req_t sparc_single_reg_req_fp_f7 = {
 371         arch_register_req_type_limited,
 372         &sparc_reg_classes[CLASS_sparc_fp],
 373         sparc_limited_fp_f7,
 374         0,
 375         0
 376 };
 377 static const unsigned sparc_limited_fp_f8 [] = { (1 << REG_F8), 0 };
 378 static const arch_register_req_t sparc_single_reg_req_fp_f8 = {
 379         arch_register_req_type_limited,
 380         &sparc_reg_classes[CLASS_sparc_fp],
 381         sparc_limited_fp_f8,
 382         0,
 383         0
 384 };
 385 static const unsigned sparc_limited_fp_f9 [] = { (1 << REG_F9), 0 };
 386 static const arch_register_req_t sparc_single_reg_req_fp_f9 = {
 387         arch_register_req_type_limited,
 388         &sparc_reg_classes[CLASS_sparc_fp],
 389         sparc_limited_fp_f9,
 390         0,
 391         0
 392 };
 393 static const unsigned sparc_limited_fp_f10 [] = { (1 << REG_F10), 0 };
 394 static const arch_register_req_t sparc_single_reg_req_fp_f10 = {
 395         arch_register_req_type_limited,
 396         &sparc_reg_classes[CLASS_sparc_fp],
 397         sparc_limited_fp_f10,
 398         0,
 399         0
 400 };
 401 static const unsigned sparc_limited_fp_f11 [] = { (1 << REG_F11), 0 };
 402 static const arch_register_req_t sparc_single_reg_req_fp_f11 = {
 403         arch_register_req_type_limited,
 404         &sparc_reg_classes[CLASS_sparc_fp],
 405         sparc_limited_fp_f11,
 406         0,
 407         0
 408 };
 409 static const unsigned sparc_limited_fp_f12 [] = { (1 << REG_F12), 0 };
 410 static const arch_register_req_t sparc_single_reg_req_fp_f12 = {
 411         arch_register_req_type_limited,
 412         &sparc_reg_classes[CLASS_sparc_fp],
 413         sparc_limited_fp_f12,
 414         0,
 415         0
 416 };
 417 static const unsigned sparc_limited_fp_f13 [] = { (1 << REG_F13), 0 };
 418 static const arch_register_req_t sparc_single_reg_req_fp_f13 = {
 419         arch_register_req_type_limited,
 420         &sparc_reg_classes[CLASS_sparc_fp],
 421         sparc_limited_fp_f13,
 422         0,
 423         0
 424 };
 425 static const unsigned sparc_limited_fp_f14 [] = { (1 << REG_F14), 0 };
 426 static const arch_register_req_t sparc_single_reg_req_fp_f14 = {
 427         arch_register_req_type_limited,
 428         &sparc_reg_classes[CLASS_sparc_fp],
 429         sparc_limited_fp_f14,
 430         0,
 431         0
 432 };
 433 static const unsigned sparc_limited_fp_f15 [] = { (1 << REG_F15), 0 };
 434 static const arch_register_req_t sparc_single_reg_req_fp_f15 = {
 435         arch_register_req_type_limited,
 436         &sparc_reg_classes[CLASS_sparc_fp],
 437         sparc_limited_fp_f15,
 438         0,
 439         0
 440 };
 441 static const unsigned sparc_limited_fp_f16 [] = { (1 << REG_F16), 0 };
 442 static const arch_register_req_t sparc_single_reg_req_fp_f16 = {
 443         arch_register_req_type_limited,
 444         &sparc_reg_classes[CLASS_sparc_fp],
 445         sparc_limited_fp_f16,
 446         0,
 447         0
 448 };
 449 static const unsigned sparc_limited_fp_f17 [] = { (1 << REG_F17), 0 };
 450 static const arch_register_req_t sparc_single_reg_req_fp_f17 = {
 451         arch_register_req_type_limited,
 452         &sparc_reg_classes[CLASS_sparc_fp],
 453         sparc_limited_fp_f17,
 454         0,
 455         0
 456 };
 457 static const unsigned sparc_limited_fp_f18 [] = { (1 << REG_F18), 0 };
 458 static const arch_register_req_t sparc_single_reg_req_fp_f18 = {
 459         arch_register_req_type_limited,
 460         &sparc_reg_classes[CLASS_sparc_fp],
 461         sparc_limited_fp_f18,
 462         0,
 463         0
 464 };
 465 static const unsigned sparc_limited_fp_f19 [] = { (1 << REG_F19), 0 };
 466 static const arch_register_req_t sparc_single_reg_req_fp_f19 = {
 467         arch_register_req_type_limited,
 468         &sparc_reg_classes[CLASS_sparc_fp],
 469         sparc_limited_fp_f19,
 470         0,
 471         0
 472 };
 473 static const unsigned sparc_limited_fp_f20 [] = { (1 << REG_F20), 0 };
 474 static const arch_register_req_t sparc_single_reg_req_fp_f20 = {
 475         arch_register_req_type_limited,
 476         &sparc_reg_classes[CLASS_sparc_fp],
 477         sparc_limited_fp_f20,
 478         0,
 479         0
 480 };
 481 static const unsigned sparc_limited_fp_f21 [] = { (1 << REG_F21), 0 };
 482 static const arch_register_req_t sparc_single_reg_req_fp_f21 = {
 483         arch_register_req_type_limited,
 484         &sparc_reg_classes[CLASS_sparc_fp],
 485         sparc_limited_fp_f21,
 486         0,
 487         0
 488 };
 489 static const unsigned sparc_limited_fp_f22 [] = { (1 << REG_F22), 0 };
 490 static const arch_register_req_t sparc_single_reg_req_fp_f22 = {
 491         arch_register_req_type_limited,
 492         &sparc_reg_classes[CLASS_sparc_fp],
 493         sparc_limited_fp_f22,
 494         0,
 495         0
 496 };
 497 static const unsigned sparc_limited_fp_f23 [] = { (1 << REG_F23), 0 };
 498 static const arch_register_req_t sparc_single_reg_req_fp_f23 = {
 499         arch_register_req_type_limited,
 500         &sparc_reg_classes[CLASS_sparc_fp],
 501         sparc_limited_fp_f23,
 502         0,
 503         0
 504 };
 505 static const unsigned sparc_limited_fp_f24 [] = { (1 << REG_F24), 0 };
 506 static const arch_register_req_t sparc_single_reg_req_fp_f24 = {
 507         arch_register_req_type_limited,
 508         &sparc_reg_classes[CLASS_sparc_fp],
 509         sparc_limited_fp_f24,
 510         0,
 511         0
 512 };
 513 static const unsigned sparc_limited_fp_f25 [] = { (1 << REG_F25), 0 };
 514 static const arch_register_req_t sparc_single_reg_req_fp_f25 = {
 515         arch_register_req_type_limited,
 516         &sparc_reg_classes[CLASS_sparc_fp],
 517         sparc_limited_fp_f25,
 518         0,
 519         0
 520 };
 521 static const unsigned sparc_limited_fp_f26 [] = { (1 << REG_F26), 0 };
 522 static const arch_register_req_t sparc_single_reg_req_fp_f26 = {
 523         arch_register_req_type_limited,
 524         &sparc_reg_classes[CLASS_sparc_fp],
 525         sparc_limited_fp_f26,
 526         0,
 527         0
 528 };
 529 static const unsigned sparc_limited_fp_f27 [] = { (1 << REG_F27), 0 };
 530 static const arch_register_req_t sparc_single_reg_req_fp_f27 = {
 531         arch_register_req_type_limited,
 532         &sparc_reg_classes[CLASS_sparc_fp],
 533         sparc_limited_fp_f27,
 534         0,
 535         0
 536 };
 537 static const unsigned sparc_limited_fp_f28 [] = { (1 << REG_F28), 0 };
 538 static const arch_register_req_t sparc_single_reg_req_fp_f28 = {
 539         arch_register_req_type_limited,
 540         &sparc_reg_classes[CLASS_sparc_fp],
 541         sparc_limited_fp_f28,
 542         0,
 543         0
 544 };
 545 static const unsigned sparc_limited_fp_f29 [] = { (1 << REG_F29), 0 };
 546 static const arch_register_req_t sparc_single_reg_req_fp_f29 = {
 547         arch_register_req_type_limited,
 548         &sparc_reg_classes[CLASS_sparc_fp],
 549         sparc_limited_fp_f29,
 550         0,
 551         0
 552 };
 553 static const unsigned sparc_limited_fp_f30 [] = { (1 << REG_F30), 0 };
 554 static const arch_register_req_t sparc_single_reg_req_fp_f30 = {
 555         arch_register_req_type_limited,
 556         &sparc_reg_classes[CLASS_sparc_fp],
 557         sparc_limited_fp_f30,
 558         0,
 559         0
 560 };
 561 static const unsigned sparc_limited_fp_f31 [] = { (1 << REG_F31), 0 };
 562 static const arch_register_req_t sparc_single_reg_req_fp_f31 = {
 563         arch_register_req_type_limited,
 564         &sparc_reg_classes[CLASS_sparc_fp],
 565         sparc_limited_fp_f31,
 566         0,
 567         0
 568 };
 569
 570 const arch_register_t sparc_flags_regs[N_sparc_flags_REGS] = {
 571         {
 572                 "y",
 573                 &sparc_reg_classes[CLASS_sparc_flags],
 574                 REG_Y,
 575                 arch_register_type_ignore,
 576                 &sparc_single_reg_req_flags_y
 577         },
 578 };
 579 const arch_register_t sparc_gp_regs[N_sparc_gp_REGS] = {
 580         {
 581                 "r0",
 582                 &sparc_reg_classes[CLASS_sparc_gp],
 583                 REG_G0,
 584                 arch_register_type_ignore,
 585                 &sparc_single_reg_req_gp_g0
 586         },
 587         {
 588                 "r1",
 589                 &sparc_reg_classes[CLASS_sparc_gp],
 590                 REG_G1,
 591                 arch_register_type_caller_save,
 592                 &sparc_single_reg_req_gp_g1
 593         },
 594         {
 595                 "r2",
 596                 &sparc_reg_classes[CLASS_sparc_gp],
 597                 REG_G2,
 598                 arch_register_type_caller_save,
 599                 &sparc_single_reg_req_gp_g2
 600         },
 601         {
 602                 "r3",
 603                 &sparc_reg_classes[CLASS_sparc_gp],
 604                 REG_G3,
 605                 arch_register_type_caller_save,
 606                 &sparc_single_reg_req_gp_g3
 607         },
 608         {
 609                 "r4",
 610                 &sparc_reg_classes[CLASS_sparc_gp],
 611                 REG_G4,
 612                 arch_register_type_caller_save,
 613                 &sparc_single_reg_req_gp_g4
 614         },
 615         {
 616                 "r5",
 617                 &sparc_reg_classes[CLASS_sparc_gp],
 618                 REG_G5,
 619                 arch_register_type_caller_save,
 620                 &sparc_single_reg_req_gp_g5
 621         },
 622         {
 623                 "r6",
 624                 &sparc_reg_classes[CLASS_sparc_gp],
 625                 REG_G6,
 626                 arch_register_type_caller_save,
 627                 &sparc_single_reg_req_gp_g6
 628         },
 629         {
 630                 "r7",
 631                 &sparc_reg_classes[CLASS_sparc_gp],
 632                 REG_G7,
 633                 arch_register_type_callee_save,
 634                 &sparc_single_reg_req_gp_g7
 635         },
 636         {
 637                 "r8",
 638                 &sparc_reg_classes[CLASS_sparc_gp],
 639                 REG_O0,
 640                 arch_register_type_caller_save,
 641                 &sparc_single_reg_req_gp_o0
 642         },
 643         {
 644                 "r9",
 645                 &sparc_reg_classes[CLASS_sparc_gp],
 646                 REG_O1,
 647                 arch_register_type_caller_save,
 648                 &sparc_single_reg_req_gp_o1
 649         },
 650         {
 651                 "r10",
 652                 &sparc_reg_classes[CLASS_sparc_gp],
 653                 REG_O2,
 654                 arch_register_type_caller_save,
 655                 &sparc_single_reg_req_gp_o2
 656         },
 657         {
 658                 "r11",
 659                 &sparc_reg_classes[CLASS_sparc_gp],
 660                 REG_O3,
 661                 arch_register_type_caller_save,
 662                 &sparc_single_reg_req_gp_o3
 663         },
 664         {
 665                 "r12",
 666                 &sparc_reg_classes[CLASS_sparc_gp],
 667                 REG_O4,
 668                 arch_register_type_caller_save,
 669                 &sparc_single_reg_req_gp_o4
 670         },
 671         {
 672                 "r13",
 673                 &sparc_reg_classes[CLASS_sparc_gp],
 674                 REG_O5,
 675                 arch_register_type_caller_save,
 676                 &sparc_single_reg_req_gp_o5
 677         },
 678         {
 679                 "r14",
 680                 &sparc_reg_classes[CLASS_sparc_gp],
 681                 REG_SP,
 682                 arch_register_type_ignore,
 683                 &sparc_single_reg_req_gp_sp
 684         },
 685         {
 686                 "r15",
 687                 &sparc_reg_classes[CLASS_sparc_gp],
 688                 REG_O7,
 689                 arch_register_type_caller_save,
 690                 &sparc_single_reg_req_gp_o7
 691         },
 692         {
 693                 "r16",
 694                 &sparc_reg_classes[CLASS_sparc_gp],
 695                 REG_L0,
 696                 arch_register_type_callee_save,
 697                 &sparc_single_reg_req_gp_l0
 698         },
 699         {
 700                 "r17",
 701                 &sparc_reg_classes[CLASS_sparc_gp],
 702                 REG_L1,
 703                 arch_register_type_callee_save,
 704                 &sparc_single_reg_req_gp_l1
 705         },
 706         {
 707                 "r18",
 708                 &sparc_reg_classes[CLASS_sparc_gp],
 709                 REG_L2,
 710                 arch_register_type_callee_save,
 711                 &sparc_single_reg_req_gp_l2
 712         },
 713         {
 714                 "r19",
 715                 &sparc_reg_classes[CLASS_sparc_gp],
 716                 REG_L3,
 717                 arch_register_type_callee_save,
 718                 &sparc_single_reg_req_gp_l3
 719         },
 720         {
 721                 "r20",
 722                 &sparc_reg_classes[CLASS_sparc_gp],
 723                 REG_L4,
 724                 arch_register_type_callee_save,
 725                 &sparc_single_reg_req_gp_l4
 726         },
 727         {
 728                 "r21",
 729                 &sparc_reg_classes[CLASS_sparc_gp],
 730                 REG_L5,
 731                 arch_register_type_callee_save,
 732                 &sparc_single_reg_req_gp_l5
 733         },
 734         {
 735                 "r22",
 736                 &sparc_reg_classes[CLASS_sparc_gp],
 737                 REG_L6,
 738                 arch_register_type_callee_save,
 739                 &sparc_single_reg_req_gp_l6
 740         },
 741         {
 742                 "r23",
 743                 &sparc_reg_classes[CLASS_sparc_gp],
 744                 REG_L7,
 745                 arch_register_type_callee_save,
 746                 &sparc_single_reg_req_gp_l7
 747         },
 748         {
 749                 "r24",
 750                 &sparc_reg_classes[CLASS_sparc_gp],
 751                 REG_I0,
 752                 arch_register_type_callee_save,
 753                 &sparc_single_reg_req_gp_i0
 754         },
 755         {
 756                 "r25",
 757                 &sparc_reg_classes[CLASS_sparc_gp],
 758                 REG_I1,
 759                 arch_register_type_callee_save,
 760                 &sparc_single_reg_req_gp_i1
 761         },
 762         {
 763                 "r26",
 764                 &sparc_reg_classes[CLASS_sparc_gp],
 765                 REG_I2,
 766                 arch_register_type_callee_save,
 767                 &sparc_single_reg_req_gp_i2
 768         },
 769         {
 770                 "r27",
 771                 &sparc_reg_classes[CLASS_sparc_gp],
 772                 REG_I3,
 773                 arch_register_type_callee_save,
 774                 &sparc_single_reg_req_gp_i3
 775         },
 776         {
 777                 "r28",
 778                 &sparc_reg_classes[CLASS_sparc_gp],
 779                 REG_I4,
 780                 arch_register_type_callee_save,
 781                 &sparc_single_reg_req_gp_i4
 782         },
 783         {
 784                 "r29",
 785                 &sparc_reg_classes[CLASS_sparc_gp],
 786                 REG_I5,
 787                 arch_register_type_callee_save,
 788                 &sparc_single_reg_req_gp_i5
 789         },
 790         {
 791                 "r30",
 792                 &sparc_reg_classes[CLASS_sparc_gp],
 793                 REG_FP,
 794                 arch_register_type_ignore,
 795                 &sparc_single_reg_req_gp_fp
 796         },
 797         {
 798                 "r31",
 799                 &sparc_reg_classes[CLASS_sparc_gp],
 800                 REG_I7,
 801                 arch_register_type_callee_save,
 802                 &sparc_single_reg_req_gp_i7
 803         },
 804 };
 805 const arch_register_t sparc_fp_regs[N_sparc_fp_REGS] = {
 806         {
 807                 "f0",
 808                 &sparc_reg_classes[CLASS_sparc_fp],
 809                 REG_F0,
 810                 arch_register_type_caller_save,
 811                 &sparc_single_reg_req_fp_f0
 812         },
 813         {
 814                 "f1",
 815                 &sparc_reg_classes[CLASS_sparc_fp],
 816                 REG_F1,
 817                 arch_register_type_caller_save,
 818                 &sparc_single_reg_req_fp_f1
 819         },
 820         {
 821                 "f2",
 822                 &sparc_reg_classes[CLASS_sparc_fp],
 823                 REG_F2,
 824                 arch_register_type_caller_save,
 825                 &sparc_single_reg_req_fp_f2
 826         },
 827         {
 828                 "f3",
 829                 &sparc_reg_classes[CLASS_sparc_fp],
 830                 REG_F3,
 831                 arch_register_type_caller_save,
 832                 &sparc_single_reg_req_fp_f3
 833         },
 834         {
 835                 "f4",
 836                 &sparc_reg_classes[CLASS_sparc_fp],
 837                 REG_F4,
 838                 arch_register_type_caller_save,
 839                 &sparc_single_reg_req_fp_f4
 840         },
 841         {
 842                 "f5",
 843                 &sparc_reg_classes[CLASS_sparc_fp],
 844                 REG_F5,
 845                 arch_register_type_caller_save,
 846                 &sparc_single_reg_req_fp_f5
 847         },
 848         {
 849                 "f6",
 850                 &sparc_reg_classes[CLASS_sparc_fp],
 851                 REG_F6,
 852                 arch_register_type_caller_save,
 853                 &sparc_single_reg_req_fp_f6
 854         },
 855         {
 856                 "f7",
 857                 &sparc_reg_classes[CLASS_sparc_fp],
 858                 REG_F7,
 859                 arch_register_type_caller_save,
 860                 &sparc_single_reg_req_fp_f7
 861         },
 862         {
 863                 "f8",
 864                 &sparc_reg_classes[CLASS_sparc_fp],
 865                 REG_F8,
 866                 arch_register_type_caller_save,
 867                 &sparc_single_reg_req_fp_f8
 868         },
 869         {
 870                 "f9",
 871                 &sparc_reg_classes[CLASS_sparc_fp],
 872                 REG_F9,
 873                 arch_register_type_caller_save,
 874                 &sparc_single_reg_req_fp_f9
 875         },
 876         {
 877                 "f10",
 878                 &sparc_reg_classes[CLASS_sparc_fp],
 879                 REG_F10,
 880                 arch_register_type_caller_save,
 881                 &sparc_single_reg_req_fp_f10
 882         },
 883         {
 884                 "f11",
 885                 &sparc_reg_classes[CLASS_sparc_fp],
 886                 REG_F11,
 887                 arch_register_type_caller_save,
 888                 &sparc_single_reg_req_fp_f11
 889         },
 890         {
 891                 "f12",
 892                 &sparc_reg_classes[CLASS_sparc_fp],
 893                 REG_F12,
 894                 arch_register_type_caller_save,
 895                 &sparc_single_reg_req_fp_f12
 896         },
 897         {
 898                 "f13",
 899                 &sparc_reg_classes[CLASS_sparc_fp],
 900                 REG_F13,
 901                 arch_register_type_caller_save,
 902                 &sparc_single_reg_req_fp_f13
 903         },
 904         {
 905                 "f14",
 906                 &sparc_reg_classes[CLASS_sparc_fp],
 907                 REG_F14,
 908                 arch_register_type_caller_save,
 909                 &sparc_single_reg_req_fp_f14
 910         },
 911         {
 912                 "f15",
 913                 &sparc_reg_classes[CLASS_sparc_fp],
 914                 REG_F15,
 915                 arch_register_type_caller_save,
 916                 &sparc_single_reg_req_fp_f15
 917         },
 918         {
 919                 "f16",
 920                 &sparc_reg_classes[CLASS_sparc_fp],
 921                 REG_F16,
 922                 arch_register_type_caller_save,
 923                 &sparc_single_reg_req_fp_f16
 924         },
 925         {
 926                 "f17",
 927                 &sparc_reg_classes[CLASS_sparc_fp],
 928                 REG_F17,
 929                 arch_register_type_caller_save,
 930                 &sparc_single_reg_req_fp_f17
 931         },
 932         {
 933                 "f18",
 934                 &sparc_reg_classes[CLASS_sparc_fp],
 935                 REG_F18,
 936                 arch_register_type_caller_save,
 937                 &sparc_single_reg_req_fp_f18
 938         },
 939         {
 940                 "f19",
 941                 &sparc_reg_classes[CLASS_sparc_fp],
 942                 REG_F19,
 943                 arch_register_type_caller_save,
 944                 &sparc_single_reg_req_fp_f19
 945         },
 946         {
 947                 "f20",
 948                 &sparc_reg_classes[CLASS_sparc_fp],
 949                 REG_F20,
 950                 arch_register_type_caller_save,
 951                 &sparc_single_reg_req_fp_f20
 952         },
 953         {
 954                 "f21",
 955                 &sparc_reg_classes[CLASS_sparc_fp],
 956                 REG_F21,
 957                 arch_register_type_caller_save,
 958                 &sparc_single_reg_req_fp_f21
 959         },
 960         {
 961                 "f22",
 962                 &sparc_reg_classes[CLASS_sparc_fp],
 963                 REG_F22,
 964                 arch_register_type_caller_save,
 965                 &sparc_single_reg_req_fp_f22
 966         },
 967         {
 968                 "f23",
 969                 &sparc_reg_classes[CLASS_sparc_fp],
 970                 REG_F23,
 971                 arch_register_type_caller_save,
 972                 &sparc_single_reg_req_fp_f23
 973         },
 974         {
 975                 "f24",
 976                 &sparc_reg_classes[CLASS_sparc_fp],
 977                 REG_F24,
 978                 arch_register_type_caller_save,
 979                 &sparc_single_reg_req_fp_f24
 980         },
 981         {
 982                 "f25",
 983                 &sparc_reg_classes[CLASS_sparc_fp],
 984                 REG_F25,
 985                 arch_register_type_caller_save,
 986                 &sparc_single_reg_req_fp_f25
 987         },
 988         {
 989                 "f26",
 990                 &sparc_reg_classes[CLASS_sparc_fp],
 991                 REG_F26,
 992                 arch_register_type_caller_save,
 993                 &sparc_single_reg_req_fp_f26
 994         },
 995         {
 996                 "f27",
 997                 &sparc_reg_classes[CLASS_sparc_fp],
 998                 REG_F27,
 999                 arch_register_type_caller_save,
1000                 &sparc_single_reg_req_fp_f27
1001         },
1002         {
1003                 "f28",
1004                 &sparc_reg_classes[CLASS_sparc_fp],
1005                 REG_F28,
1006                 arch_register_type_caller_save,
1007                 &sparc_single_reg_req_fp_f28
1008         },
1009         {
1010                 "f29",
1011                 &sparc_reg_classes[CLASS_sparc_fp],
1012                 REG_F29,
1013                 arch_register_type_caller_save,
1014                 &sparc_single_reg_req_fp_f29
1015         },
1016         {
1017                 "f30",
1018                 &sparc_reg_classes[CLASS_sparc_fp],
1019                 REG_F30,
1020                 arch_register_type_caller_save,
1021                 &sparc_single_reg_req_fp_f30
1022         },
1023         {
1024                 "f31",
1025                 &sparc_reg_classes[CLASS_sparc_fp],
1026                 REG_F31,
1027                 arch_register_type_caller_save,
1028                 &sparc_single_reg_req_fp_f31
1029         },
1030 };
1031
1032
1033 void sparc_register_init(void)
1034 {
1035         sparc_reg_classes[CLASS_sparc_flags].mode = mode_Bu;
1036         sparc_reg_classes[CLASS_sparc_gp].mode = mode_Iu;
1037         sparc_reg_classes[CLASS_sparc_fp].mode = mode_D;
1038
1039 }