2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The main sparc backend driver file.
23 * @author Hannes Rapp, Matthias Braun
28 #include "lc_opts_enum.h"
36 #include "iroptimize.h"
42 #include "lower_alloc.h"
43 #include "lower_builtins.h"
44 #include "lower_calls.h"
45 #include "lower_mode_b.h"
46 #include "lower_softfloat.h"
60 #include "belistsched.h"
64 #include "bearch_sparc_t.h"
66 #include "sparc_new_nodes.h"
67 #include "gen_sparc_regalloc_if.h"
68 #include "sparc_transform.h"
69 #include "sparc_emitter.h"
70 #include "sparc_cconv.h"
72 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
74 static ir_entity *sparc_get_frame_entity(const ir_node *node)
76 if (is_sparc_FrameAddr(node)) {
77 const sparc_attr_t *attr = get_sparc_attr_const(node);
78 return attr->immediate_value_entity;
81 if (sparc_has_load_store_attr(node)) {
82 const sparc_load_store_attr_t *load_store_attr
83 = get_sparc_load_store_attr_const(node);
84 if (load_store_attr->is_frame_entity) {
85 return load_store_attr->base.immediate_value_entity;
93 * This function is called by the generic backend to correct offsets for
94 * nodes accessing the stack.
96 static void sparc_set_frame_offset(ir_node *node, int offset)
98 sparc_attr_t *attr = get_sparc_attr(node);
99 attr->immediate_value += offset;
101 /* must be a FrameAddr or a load/store node with frame_entity */
102 assert(is_sparc_FrameAddr(node) ||
103 get_sparc_load_store_attr_const(node)->is_frame_entity);
106 static int sparc_get_sp_bias(const ir_node *node)
108 if (is_sparc_Save(node)) {
109 const sparc_attr_t *attr = get_sparc_attr_const(node);
110 if (get_irn_arity(node) == 3)
111 panic("no support for _reg variant yet");
113 return -attr->immediate_value;
114 } else if (is_sparc_RestoreZero(node)) {
115 return SP_BIAS_RESET;
120 /* fill register allocator interface */
122 const arch_irn_ops_t sparc_irn_ops = {
123 sparc_get_frame_entity,
124 sparc_set_frame_offset,
126 NULL, /* get_op_estimated_cost */
127 NULL, /* possible_memory_operand */
128 NULL, /* perform_memory_operand */
132 * Transforms the standard firm graph into
135 static void sparc_prepare_graph(ir_graph *irg)
137 sparc_transform_graph(irg);
140 static bool sparc_modifies_flags(const ir_node *node)
142 unsigned n_outs = arch_get_irn_n_outs(node);
143 for (unsigned o = 0; o < n_outs; ++o) {
144 const arch_register_req_t *req = arch_get_irn_register_req_out(node, o);
145 if (req->cls == &sparc_reg_classes[CLASS_sparc_flags_class])
151 static bool sparc_modifies_fp_flags(const ir_node *node)
153 unsigned n_outs = arch_get_irn_n_outs(node);
154 for (unsigned o = 0; o < n_outs; ++o) {
155 const arch_register_req_t *req = arch_get_irn_register_req_out(node, o);
156 if (req->cls == &sparc_reg_classes[CLASS_sparc_fpflags_class])
162 static void sparc_before_ra(ir_graph *irg)
164 /* fixup flags register */
165 be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_flags_class],
166 NULL, sparc_modifies_flags);
167 be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_fpflags_class],
168 NULL, sparc_modifies_fp_flags);
171 extern const arch_isa_if_t sparc_isa_if;
172 static sparc_isa_t sparc_isa_template = {
174 &sparc_isa_if, /* isa interface implementation */
179 &sparc_registers[REG_SP], /* stack pointer register */
180 &sparc_registers[REG_FRAME_POINTER], /* base pointer register */
181 3, /* power of two stack alignment
183 NULL, /* main environment */
184 7, /* costs for a spill instruction */
185 5, /* costs for a reload instruction */
186 true, /* custom abi handling */
188 NULL, /* constants */
189 SPARC_FPU_ARCH_FPU, /* FPU architecture */
193 * rewrite unsigned->float conversion.
194 * Sparc has no instruction for this so instead we do the following:
196 * int signed_x = unsigned_value_x;
197 * double res = signed_x;
199 * res += 4294967296. ;
200 * return (float) res;
202 static void rewrite_unsigned_float_Conv(ir_node *node)
204 ir_graph *irg = get_irn_irg(node);
205 dbg_info *dbgi = get_irn_dbg_info(node);
206 ir_node *lower_block = get_nodes_block(node);
211 ir_node *block = get_nodes_block(node);
212 ir_node *unsigned_x = get_Conv_op(node);
213 ir_mode *mode_u = get_irn_mode(unsigned_x);
214 ir_mode *mode_s = find_signed_mode(mode_u);
215 ir_mode *mode_d = mode_D;
216 ir_node *signed_x = new_rd_Conv(dbgi, block, unsigned_x, mode_s);
217 ir_node *res = new_rd_Conv(dbgi, block, signed_x, mode_d);
218 ir_node *zero = new_r_Const(irg, get_mode_null(mode_s));
219 ir_node *cmp = new_rd_Cmp(dbgi, block, signed_x, zero,
221 ir_node *cond = new_rd_Cond(dbgi, block, cmp);
222 ir_node *proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
223 ir_node *proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
224 ir_node *in_true[1] = { proj_true };
225 ir_node *in_false[1] = { proj_false };
226 ir_node *true_block = new_r_Block(irg, ARRAY_SIZE(in_true), in_true);
227 ir_node *false_block = new_r_Block(irg, ARRAY_SIZE(in_false),in_false);
228 ir_node *true_jmp = new_r_Jmp(true_block);
229 ir_node *false_jmp = new_r_Jmp(false_block);
230 ir_tarval *correction = new_tarval_from_double(4294967296., mode_d);
231 ir_node *c_const = new_r_Const(irg, correction);
232 ir_node *fadd = new_rd_Add(dbgi, true_block, res, c_const,
235 ir_node *lower_in[2] = { true_jmp, false_jmp };
236 ir_node *phi_in[2] = { fadd, res };
237 ir_mode *dest_mode = get_irn_mode(node);
241 set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
242 phi = new_r_Phi(lower_block, ARRAY_SIZE(phi_in), phi_in, mode_d);
243 assert(get_Block_phis(lower_block) == NULL);
244 set_Block_phis(lower_block, phi);
245 set_Phi_next(phi, NULL);
247 res_conv = new_rd_Conv(dbgi, lower_block, phi, dest_mode);
249 exchange(node, res_conv);
254 * rewrite float->unsigned conversions.
255 * Sparc has no instruction for this so instead we do the following:
257 * if (x >= 2147483648.) {
258 * converted ^= (int)(x-2147483648.) ^ 0x80000000;
260 * converted = (int)x;
262 * return (unsigned)converted;
264 static void rewrite_float_unsigned_Conv(ir_node *node)
266 ir_graph *irg = get_irn_irg(node);
267 dbg_info *dbgi = get_irn_dbg_info(node);
268 ir_node *lower_block = get_nodes_block(node);
273 ir_node *block = get_nodes_block(node);
274 ir_node *float_x = get_Conv_op(node);
275 ir_mode *mode_u = get_irn_mode(node);
276 ir_mode *mode_s = find_signed_mode(mode_u);
277 ir_mode *mode_f = get_irn_mode(float_x);
278 ir_tarval *limit = new_tarval_from_double(2147483648., mode_f);
279 ir_node *limitc = new_r_Const(irg, limit);
280 ir_node *cmp = new_rd_Cmp(dbgi, block, float_x, limitc,
281 ir_relation_greater_equal);
282 ir_node *cond = new_rd_Cond(dbgi, block, cmp);
283 ir_node *proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
284 ir_node *proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
285 ir_node *in_true[1] = { proj_true };
286 ir_node *in_false[1] = { proj_false };
287 ir_node *true_block = new_r_Block(irg, ARRAY_SIZE(in_true), in_true);
288 ir_node *false_block = new_r_Block(irg, ARRAY_SIZE(in_false),in_false);
289 ir_node *true_jmp = new_r_Jmp(true_block);
290 ir_node *false_jmp = new_r_Jmp(false_block);
292 ir_tarval *correction = new_tarval_from_long(0x80000000l, mode_s);
293 ir_node *c_const = new_r_Const(irg, correction);
294 ir_node *sub = new_rd_Sub(dbgi, true_block, float_x, limitc,
296 ir_node *sub_conv = new_rd_Conv(dbgi, true_block, sub, mode_s);
297 ir_node *xorn = new_rd_Eor(dbgi, true_block, sub_conv, c_const,
300 ir_node *converted = new_rd_Conv(dbgi, false_block, float_x,mode_s);
302 ir_node *lower_in[2] = { true_jmp, false_jmp };
303 ir_node *phi_in[2] = { xorn, converted };
307 set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
308 phi = new_r_Phi(lower_block, ARRAY_SIZE(phi_in), phi_in, mode_s);
309 assert(get_Block_phis(lower_block) == NULL);
310 set_Block_phis(lower_block, phi);
311 set_Phi_next(phi, NULL);
313 res_conv = new_rd_Conv(dbgi, lower_block, phi, mode_u);
314 exchange(node, res_conv);
318 static int sparc_rewrite_Conv(ir_node *node, void *ctx)
320 ir_mode *to_mode = get_irn_mode(node);
321 ir_node *op = get_Conv_op(node);
322 ir_mode *from_mode = get_irn_mode(op);
325 if (mode_is_float(to_mode) && mode_is_int(from_mode)
326 && get_mode_size_bits(from_mode) == 32
327 && !mode_is_signed(from_mode)) {
328 rewrite_unsigned_float_Conv(node);
331 if (mode_is_float(from_mode) && mode_is_int(to_mode)
332 && get_mode_size_bits(to_mode) <= 32
333 && !mode_is_signed(to_mode)) {
334 rewrite_float_unsigned_Conv(node);
341 static void sparc_handle_intrinsics(void)
343 ir_type *tp, *int_tp, *uint_tp;
345 size_t n_records = 0;
347 runtime_rt rt_iMod, rt_uMod;
349 #define ID(x) new_id_from_chars(x, sizeof(x)-1)
351 int_tp = new_type_primitive(mode_Is);
352 uint_tp = new_type_primitive(mode_Iu);
354 /* we need to rewrite some forms of int->float conversions */
356 i_instr_record *map_Conv = &records[n_records++].i_instr;
358 map_Conv->kind = INTRINSIC_INSTR;
359 map_Conv->op = op_Conv;
360 map_Conv->i_mapper = sparc_rewrite_Conv;
362 /* SPARC has no signed mod instruction ... */
364 i_instr_record *map_Mod = &records[n_records++].i_instr;
366 tp = new_type_method(2, 1);
367 set_method_param_type(tp, 0, int_tp);
368 set_method_param_type(tp, 1, int_tp);
369 set_method_res_type(tp, 0, int_tp);
371 rt_iMod.ent = new_entity(get_glob_type(), ID(".rem"), tp);
372 set_entity_ld_ident(rt_iMod.ent, ID(".rem"));
373 rt_iMod.mode = mode_T;
374 rt_iMod.res_mode = mode_Is;
375 rt_iMod.mem_proj_nr = pn_Mod_M;
376 rt_iMod.regular_proj_nr = pn_Mod_X_regular;
377 rt_iMod.exc_proj_nr = pn_Mod_X_except;
378 rt_iMod.res_proj_nr = pn_Mod_res;
380 set_entity_visibility(rt_iMod.ent, ir_visibility_external);
382 map_Mod->kind = INTRINSIC_INSTR;
383 map_Mod->op = op_Mod;
384 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
385 map_Mod->ctx = &rt_iMod;
387 /* ... nor an unsigned mod. */
389 i_instr_record *map_Mod = &records[n_records++].i_instr;
391 tp = new_type_method(2, 1);
392 set_method_param_type(tp, 0, uint_tp);
393 set_method_param_type(tp, 1, uint_tp);
394 set_method_res_type(tp, 0, uint_tp);
396 rt_uMod.ent = new_entity(get_glob_type(), ID(".urem"), tp);
397 set_entity_ld_ident(rt_uMod.ent, ID(".urem"));
398 rt_uMod.mode = mode_T;
399 rt_uMod.res_mode = mode_Iu;
400 rt_uMod.mem_proj_nr = pn_Mod_M;
401 rt_uMod.regular_proj_nr = pn_Mod_X_regular;
402 rt_uMod.exc_proj_nr = pn_Mod_X_except;
403 rt_uMod.res_proj_nr = pn_Mod_res;
405 set_entity_visibility(rt_uMod.ent, ir_visibility_external);
407 map_Mod->kind = INTRINSIC_INSTR;
408 map_Mod->op = op_Mod;
409 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
410 map_Mod->ctx = &rt_uMod;
413 assert(n_records < ARRAY_SIZE(records));
414 lower_intrinsics(records, n_records, /*part_block_used=*/ true);
417 static void sparc_init(void)
419 sparc_register_init();
420 sparc_create_opcodes(&sparc_irn_ops);
424 static void sparc_finish(void)
426 sparc_free_opcodes();
429 static arch_env_t *sparc_begin_codegeneration(const be_main_env_t *env)
431 sparc_isa_t *isa = XMALLOC(sparc_isa_t);
432 *isa = sparc_isa_template;
433 isa->constants = pmap_create();
435 be_gas_elf_type_char = '#';
436 be_gas_object_file_format = OBJECT_FILE_FORMAT_ELF;
437 be_gas_elf_variant = ELF_VARIANT_SPARC;
439 be_emit_init(env->file_handle);
440 be_gas_begin_compilation_unit(env);
446 * Closes the output file and frees the ISA structure.
448 static void sparc_end_codegeneration(void *self)
450 sparc_isa_t *isa = (sparc_isa_t*)self;
452 /* emit now all global declarations */
453 be_gas_end_compilation_unit(isa->base.main_env);
455 pmap_destroy(isa->constants);
460 static void sparc_lower_for_target(void)
462 ir_mode *mode_gp = sparc_reg_classes[CLASS_sparc_gp].mode;
463 size_t i, n_irgs = get_irp_n_irgs();
465 lower_calls_with_compounds(LF_RETURN_HIDDEN);
467 for (i = 0; i < n_irgs; ++i) {
468 ir_graph *irg = get_irp_irg(i);
469 /* Turn all small CopyBs into loads/stores and all bigger CopyBs into
471 lower_CopyB(irg, 31, 32, false);
474 if (sparc_isa_template.fpu_arch == SPARC_FPU_ARCH_SOFTFLOAT)
475 lower_floating_point();
477 lower_builtins(0, NULL);
481 for (i = 0; i < n_irgs; ++i) {
482 ir_graph *irg = get_irp_irg(i);
483 ir_lower_mode_b(irg, mode_Iu);
484 lower_switch(irg, 4, 256, mode_gp);
485 /* TODO: Pass SPARC_MIN_STACKSIZE as addr_delta as soon as
486 * Alloc nodes are implemented more efficiently. */
487 lower_alloc(irg, SPARC_STACK_ALIGNMENT, true, 0);
491 static int sparc_is_mux_allowed(ir_node *sel, ir_node *mux_false,
494 return ir_is_optimizable_mux(sel, mux_false, mux_true);
498 * Returns the libFirm configuration parameter for this backend.
500 static const backend_params *sparc_get_backend_params(void)
502 static const ir_settings_arch_dep_t arch_dep = {
503 1, /* also_use_subs */
504 1, /* maximum_shifts */
505 31, /* highest_shift_amount */
506 NULL, /* evaluate_cost_func */
509 32, /* max_bits_for_mulh */
511 static backend_params p = {
512 0, /* no inline assembly */
513 0, /* no support for RotL nodes */
515 1, /* modulo shift efficient */
516 0, /* non-modulo shift not efficient */
517 &arch_dep, /* will be set later */
518 sparc_is_mux_allowed, /* parameter for if conversion */
519 32, /* machine size */
520 NULL, /* float arithmetic mode */
521 NULL, /* long long type */
522 NULL, /* usigned long long type */
523 NULL, /* long double type */
524 0, /* no trampoline support: size 0 */
525 0, /* no trampoline support: align 0 */
526 NULL, /* no trampoline support: no trampoline builder */
527 4 /* alignment of stack parameter: typically 4 (32bit) or 8 (64bit) */
530 ir_mode *mode_long_long
531 = new_int_mode("long long", irma_twos_complement, 64, 1, 64);
532 ir_type *type_long_long = new_type_primitive(mode_long_long);
533 ir_mode *mode_unsigned_long_long
534 = new_int_mode("unsigned long long", irma_twos_complement, 64, 0, 64);
535 ir_type *type_unsigned_long_long
536 = new_type_primitive(mode_unsigned_long_long);
538 p.type_long_long = type_long_long;
539 p.type_unsigned_long_long = type_unsigned_long_long;
541 ir_type *type_long_double = new_type_primitive(mode_Q);
543 set_type_alignment_bytes(type_long_double, 8);
544 set_type_size_bytes(type_long_double, 16);
545 p.type_long_double = type_long_double;
549 static asm_constraint_flags_t sparc_parse_asm_constraint(const char **c)
552 return ASM_CONSTRAINT_FLAG_INVALID;
555 static int sparc_is_valid_clobber(const char *clobber)
561 /* fpu set architectures. */
562 static const lc_opt_enum_int_items_t sparc_fpu_items[] = {
563 { "fpu", SPARC_FPU_ARCH_FPU },
564 { "softfloat", SPARC_FPU_ARCH_SOFTFLOAT },
568 static lc_opt_enum_int_var_t arch_fpu_var = {
569 &sparc_isa_template.fpu_arch, sparc_fpu_items
572 static const lc_opt_table_entry_t sparc_options[] = {
573 LC_OPT_ENT_ENUM_INT("fpunit", "select the floating point unit", &arch_fpu_var),
577 static ir_node *sparc_new_spill(ir_node *value, ir_node *after)
579 ir_node *block = get_block(after);
580 ir_graph *irg = get_irn_irg(value);
581 ir_node *frame = get_irg_frame(irg);
582 ir_node *mem = get_irg_no_mem(irg);
583 ir_mode *mode = get_irn_mode(value);
586 if (mode_is_float(mode)) {
587 store = create_stf(NULL, block, value, frame, mem, mode, NULL, 0, true);
589 store = new_bd_sparc_St_imm(NULL, block, value, frame, mem, mode, NULL,
592 sched_add_after(after, store);
596 static ir_node *sparc_new_reload(ir_node *value, ir_node *spill,
599 ir_node *block = get_block(before);
600 ir_graph *irg = get_irn_irg(value);
601 ir_node *frame = get_irg_frame(irg);
602 ir_mode *mode = get_irn_mode(value);
606 if (mode_is_float(mode)) {
607 load = create_ldf(NULL, block, frame, spill, mode, NULL, 0, true);
609 load = new_bd_sparc_Ld_imm(NULL, block, frame, spill, mode, NULL, 0,
612 sched_add_before(before, load);
613 assert((long)pn_sparc_Ld_res == (long)pn_sparc_Ldf_res);
614 res = new_r_Proj(load, mode, pn_sparc_Ld_res);
619 const arch_isa_if_t sparc_isa_if = {
622 sparc_get_backend_params,
623 sparc_lower_for_target,
624 sparc_parse_asm_constraint,
625 sparc_is_valid_clobber,
627 sparc_begin_codegeneration,
628 sparc_end_codegeneration,
630 NULL, /* get call abi */
631 NULL, /* mark remat */
632 NULL, /* get_pic_base */
635 NULL, /* register_saved_by */
637 sparc_handle_intrinsics,
638 NULL, /* before_abi */
645 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_sparc)
646 void be_init_arch_sparc(void)
648 lc_opt_entry_t *be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
649 lc_opt_entry_t *sparc_grp = lc_opt_get_grp(be_grp, "sparc");
651 lc_opt_add_table(sparc_grp, sparc_options);
653 be_register_isa_if("sparc", &sparc_isa_if);
654 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.cg");
655 sparc_init_transform();
656 sparc_init_emitter();