2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The main sparc backend driver file.
28 #include "lc_opts_enum.h"
36 #include "iroptimize.h"
46 #include "../bearch.h"
47 #include "../benode.h"
48 #include "../belower.h"
49 #include "../besched.h"
51 #include "../bemachine.h"
52 #include "../beilpsched.h"
53 #include "../bemodule.h"
55 #include "../bespillslots.h"
56 #include "../begnuas.h"
57 #include "../belistsched.h"
58 #include "../beflags.h"
60 #include "bearch_sparc_t.h"
62 #include "sparc_new_nodes.h"
63 #include "gen_sparc_regalloc_if.h"
64 #include "sparc_transform.h"
65 #include "sparc_emitter.h"
67 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
69 static arch_irn_class_t sparc_classify(const ir_node *irn)
75 static ir_entity *sparc_get_frame_entity(const ir_node *irn)
77 const sparc_attr_t *attr = get_sparc_attr_const(irn);
79 if (is_sparc_FrameAddr(irn)) {
80 const sparc_symconst_attr_t *attr = get_irn_generic_attr_const(irn);
84 if (attr->is_load_store) {
85 const sparc_load_store_attr_t *load_store_attr = get_sparc_load_store_attr_const(irn);
86 if (load_store_attr->is_frame_entity) {
87 return load_store_attr->entity;
95 * This function is called by the generic backend to correct offsets for
96 * nodes accessing the stack.
98 static void sparc_set_frame_offset(ir_node *irn, int offset)
100 if (is_sparc_FrameAddr(irn)) {
101 sparc_symconst_attr_t *attr = get_irn_generic_attr(irn);
102 attr->fp_offset += offset;
104 sparc_load_store_attr_t *attr = get_sparc_load_store_attr(irn);
105 assert(attr->base.is_load_store);
106 attr->offset += offset;
110 static int sparc_get_sp_bias(const ir_node *node)
112 if (is_sparc_Save(node)) {
113 const sparc_save_attr_t *attr = get_sparc_save_attr_const(node);
114 /* Note we do not retport the change of the SPARC_MIN_STACKSIZE
115 * size, since we have additional magic in the emitter which
116 * calculates that! */
117 assert(attr->initial_stacksize >= SPARC_MIN_STACKSIZE);
118 return attr->initial_stacksize - SPARC_MIN_STACKSIZE;
123 /* fill register allocator interface */
125 static const arch_irn_ops_t sparc_irn_ops = {
128 sparc_get_frame_entity,
129 sparc_set_frame_offset,
131 NULL, /* get_inverse */
132 NULL, /* get_op_estimated_cost */
133 NULL, /* possible_memory_operand */
134 NULL, /* perform_memory_operand */
140 * Transforms the standard firm graph into
143 static void sparc_prepare_graph(void *self)
145 sparc_code_gen_t *cg = self;
147 /* transform FIRM into SPARC asm nodes */
148 sparc_transform_graph(cg);
151 dump_ir_graph(cg->irg, "transformed");
156 static ir_node *sparc_flags_remat(ir_node *node, ir_node *after)
161 if (is_Block(after)) {
164 block = get_nodes_block(after);
166 copy = exact_copy(node);
167 set_nodes_block(copy, block);
168 sched_add_after(after, copy);
172 static void sparc_before_ra(void *self)
174 sparc_code_gen_t *cg = self;
175 /* fixup flags register */
176 be_sched_fix_flags(cg->irg, &sparc_reg_classes[CLASS_sparc_flags], &sparc_flags_remat);
180 * transform reload node => load
182 static void transform_Reload(ir_node *node)
184 ir_node *block = get_nodes_block(node);
185 dbg_info *dbgi = get_irn_dbg_info(node);
186 ir_node *ptr = get_irn_n(node, be_pos_Spill_frame);
187 ir_node *mem = get_irn_n(node, be_pos_Reload_mem);
188 ir_mode *mode = get_irn_mode(node);
189 ir_entity *entity = be_get_frame_entity(node);
190 const arch_register_t *reg;
194 ir_node *sched_point = sched_prev(node);
196 load = new_bd_sparc_Ld(dbgi, block, ptr, mem, mode, entity, false, 0, true);
197 sched_add_after(sched_point, load);
200 proj = new_rd_Proj(dbgi, load, mode, pn_sparc_Ld_res);
202 reg = arch_get_irn_register(node);
203 arch_set_irn_register(proj, reg);
205 exchange(node, proj);
209 * transform spill node => store
211 static void transform_Spill(ir_node *node)
213 ir_node *block = get_nodes_block(node);
214 dbg_info *dbgi = get_irn_dbg_info(node);
215 ir_node *ptr = get_irn_n(node, be_pos_Spill_frame);
216 ir_node *mem = new_NoMem();
217 ir_node *val = get_irn_n(node, be_pos_Spill_val);
218 ir_mode *mode = get_irn_mode(val);
219 ir_entity *entity = be_get_frame_entity(node);
220 ir_node *sched_point;
223 sched_point = sched_prev(node);
224 store = new_bd_sparc_St(dbgi, block, ptr, val, mem, mode, entity, false, 0, true);
226 sched_add_after(sched_point, store);
228 exchange(node, store);
232 * walker to transform be_Spill and be_Reload nodes
234 static void sparc_after_ra_walker(ir_node *block, void *data)
236 ir_node *node, *prev;
239 for (node = sched_last(block); !sched_is_begin(node); node = prev) {
240 prev = sched_prev(node);
242 if (be_is_Reload(node)) {
243 transform_Reload(node);
244 } else if (be_is_Spill(node)) {
245 transform_Spill(node);
251 static void sparc_after_ra(void *self)
253 sparc_code_gen_t *cg = self;
254 be_coalesce_spillslots(cg->irg);
256 irg_block_walk_graph(cg->irg, NULL, sparc_after_ra_walker, NULL);
262 * Emits the code, closes the output file and frees
263 * the code generator interface.
265 static void sparc_emit_and_done(void *self)
267 sparc_code_gen_t *cg = self;
268 ir_graph *irg = cg->irg;
270 sparc_gen_routine(cg, irg);
272 /* de-allocate code generator */
276 static void *sparc_cg_init(ir_graph *irg);
278 static const arch_code_generator_if_t sparc_code_gen_if = {
280 NULL, /* get_pic_base hook */
281 NULL, /* before abi introduce hook */
283 NULL, /* spill hook */
284 sparc_before_ra, /* before register allocation hook */
285 sparc_after_ra, /* after register allocation hook */
291 * Initializes the code generator.
293 static void *sparc_cg_init(ir_graph *irg)
295 sparc_isa_t *isa = (sparc_isa_t *) be_get_irg_arch_env(irg);
296 sparc_code_gen_t *cg = XMALLOCZ(sparc_code_gen_t);
298 cg->impl = &sparc_code_gen_if;
301 cg->dump = (be_get_irg_options(irg)->dump_flags & DUMP_BE) != 0;
302 cg->constants = pmap_create();
304 /* enter the current code generator */
307 return (arch_code_generator_t*) cg;
310 const arch_isa_if_t sparc_isa_if;
311 static sparc_isa_t sparc_isa_template = {
313 &sparc_isa_if, /* isa interface implementation */
314 &sparc_gp_regs[REG_SP], /* stack pointer register */
315 &sparc_gp_regs[REG_FRAME_POINTER], /* base pointer register */
316 &sparc_reg_classes[CLASS_sparc_gp], /* link pointer register class */
317 -1, /* stack direction */
318 3, /* power of two stack alignment
320 NULL, /* main environment */
321 7, /* costs for a spill instruction */
322 5, /* costs for a reload instruction */
323 true, /* custom abi handling */
325 NULL /* current code generator */
329 static void sparc_handle_intrinsics(void)
331 ir_type *tp, *int_tp, *uint_tp;
335 runtime_rt rt_iMod, rt_uMod;
337 #define ID(x) new_id_from_chars(x, sizeof(x)-1)
339 int_tp = new_type_primitive(mode_Is);
340 uint_tp = new_type_primitive(mode_Iu);
343 /* SPARC has no signed mod instruction ... */
345 i_instr_record *map_Mod = &records[n_records++].i_instr;
347 tp = new_type_method(2, 1);
348 set_method_param_type(tp, 0, int_tp);
349 set_method_param_type(tp, 1, int_tp);
350 set_method_res_type(tp, 0, int_tp);
352 rt_iMod.ent = new_entity(get_glob_type(), ID(".rem"), tp);
353 set_entity_ld_ident(rt_iMod.ent, ID(".rem"));
354 rt_iMod.mode = mode_T;
355 rt_iMod.res_mode = mode_Is;
356 rt_iMod.mem_proj_nr = pn_Mod_M;
357 rt_iMod.regular_proj_nr = pn_Mod_X_regular;
358 rt_iMod.exc_proj_nr = pn_Mod_X_except;
359 rt_iMod.exc_mem_proj_nr = pn_Mod_M;
360 rt_iMod.res_proj_nr = pn_Mod_res;
362 set_entity_visibility(rt_iMod.ent, ir_visibility_external);
364 map_Mod->kind = INTRINSIC_INSTR;
365 map_Mod->op = op_Mod;
366 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
367 map_Mod->ctx = &rt_iMod;
369 /* ... nor an unsigned mod. */
371 i_instr_record *map_Mod = &records[n_records++].i_instr;
373 tp = new_type_method(2, 1);
374 set_method_param_type(tp, 0, uint_tp);
375 set_method_param_type(tp, 1, uint_tp);
376 set_method_res_type(tp, 0, uint_tp);
378 rt_uMod.ent = new_entity(get_glob_type(), ID(".urem"), tp);
379 set_entity_ld_ident(rt_uMod.ent, ID(".urem"));
380 rt_uMod.mode = mode_T;
381 rt_uMod.res_mode = mode_Iu;
382 rt_uMod.mem_proj_nr = pn_Mod_M;
383 rt_uMod.regular_proj_nr = pn_Mod_X_regular;
384 rt_uMod.exc_proj_nr = pn_Mod_X_except;
385 rt_uMod.exc_mem_proj_nr = pn_Mod_M;
386 rt_uMod.res_proj_nr = pn_Mod_res;
388 set_entity_visibility(rt_uMod.ent, ir_visibility_external);
390 map_Mod->kind = INTRINSIC_INSTR;
391 map_Mod->op = op_Mod;
392 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
393 map_Mod->ctx = &rt_uMod;
397 lower_intrinsics(records, n_records, /*part_block_used=*/0);
402 * Initializes the backend ISA
404 static arch_env_t *sparc_init(FILE *outfile)
406 static int run_once = 0;
413 isa = XMALLOC(sparc_isa_t);
414 memcpy(isa, &sparc_isa_template, sizeof(*isa));
416 be_emit_init(outfile);
418 sparc_register_init();
419 sparc_create_opcodes(&sparc_irn_ops);
420 sparc_handle_intrinsics();
428 * Closes the output file and frees the ISA structure.
430 static void sparc_done(void *self)
432 sparc_isa_t *isa = self;
434 /* emit now all global declarations */
435 be_gas_emit_decls(isa->base.main_env);
442 static unsigned sparc_get_n_reg_class(void)
447 static const arch_register_class_t *sparc_get_reg_class(unsigned i)
449 assert(i < N_CLASSES);
450 return &sparc_reg_classes[i];
456 * Get the register class which shall be used to store a value of a given mode.
457 * @param self The this pointer.
458 * @param mode The mode in question.
459 * @return A register class which can hold values of the given mode.
461 static const arch_register_class_t *sparc_get_reg_class_for_mode(const ir_mode *mode)
463 if (mode_is_float(mode))
464 return &sparc_reg_classes[CLASS_sparc_fp];
466 return &sparc_reg_classes[CLASS_sparc_gp];
469 static int sparc_to_appear_in_schedule(void *block_env, const ir_node *irn)
473 if (!is_sparc_irn(irn))
480 * Initializes the code generator interface.
482 static const arch_code_generator_if_t *sparc_get_code_generator_if(
486 return &sparc_code_gen_if;
489 list_sched_selector_t sparc_sched_selector;
492 * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
494 static const list_sched_selector_t *sparc_get_list_sched_selector(
495 const void *self, list_sched_selector_t *selector)
500 sparc_sched_selector = trivial_selector;
501 sparc_sched_selector.to_appear_in_schedule = sparc_to_appear_in_schedule;
502 return &sparc_sched_selector;
505 static const ilp_sched_selector_t *sparc_get_ilp_sched_selector(
513 * Returns the necessary byte alignment for storing a register of given class.
515 static int sparc_get_reg_class_alignment(const arch_register_class_t *cls)
517 ir_mode *mode = arch_register_class_mode(cls);
518 return get_mode_size_bytes(mode);
522 * Returns the libFirm configuration parameter for this backend.
524 static const backend_params *sparc_get_backend_params(void)
526 static backend_params p = {
527 0, /* no dword lowering */
528 0, /* no inline assembly */
529 NULL, /* will be set later */
530 NULL, /* no creator function */
531 NULL, /* context for create_intrinsic_fkt */
532 NULL, /* parameter for if conversion */
533 NULL, /* float arithmetic mode */
534 0, /* no trampoline support: size 0 */
535 0, /* no trampoline support: align 0 */
536 NULL, /* no trampoline support: no trampoline builder */
537 4 /* alignment of stack parameter: typically 4 (32bit) or 8 (64bit) */
542 static const be_execution_unit_t ***sparc_get_allowed_execution_units(
547 panic("sparc_get_allowed_execution_units not implemented yet");
550 static const be_machine_t *sparc_get_machine(const void *self)
554 panic("sparc_get_machine not implemented yet");
557 static ir_graph **sparc_get_backend_irg_list(const void *self,
565 static asm_constraint_flags_t sparc_parse_asm_constraint(const char **c)
568 return ASM_CONSTRAINT_FLAG_INVALID;
571 static int sparc_is_valid_clobber(const char *clobber)
577 const arch_isa_if_t sparc_isa_if = {
580 NULL, /* handle intrinsics */
581 sparc_get_n_reg_class,
583 sparc_get_reg_class_for_mode,
585 sparc_get_code_generator_if,
586 sparc_get_list_sched_selector,
587 sparc_get_ilp_sched_selector,
588 sparc_get_reg_class_alignment,
589 sparc_get_backend_params,
590 sparc_get_allowed_execution_units,
592 sparc_get_backend_irg_list,
593 NULL, /* mark remat */
594 sparc_parse_asm_constraint,
595 sparc_is_valid_clobber
598 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_sparc);
599 void be_init_arch_sparc(void)
601 be_register_isa_if("sparc", &sparc_isa_if);
602 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.cg");
603 sparc_init_transform();
604 sparc_init_emitter();