2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The main sparc backend driver file.
23 * @author Hannes Rapp, Matthias Braun
28 #include "lc_opts_enum.h"
36 #include "iroptimize.h"
42 #include "lower_alloc.h"
43 #include "lower_builtins.h"
44 #include "lower_calls.h"
45 #include "lower_mode_b.h"
46 #include "lower_softfloat.h"
62 #include "belistsched.h"
66 #include "bearch_sparc_t.h"
68 #include "sparc_new_nodes.h"
69 #include "gen_sparc_regalloc_if.h"
70 #include "sparc_transform.h"
71 #include "sparc_emitter.h"
72 #include "sparc_cconv.h"
74 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
76 static ir_entity *sparc_get_frame_entity(const ir_node *node)
78 if (is_sparc_FrameAddr(node)) {
79 const sparc_attr_t *attr = get_sparc_attr_const(node);
80 return attr->immediate_value_entity;
83 if (sparc_has_load_store_attr(node)) {
84 const sparc_load_store_attr_t *load_store_attr
85 = get_sparc_load_store_attr_const(node);
86 if (load_store_attr->is_frame_entity) {
87 return load_store_attr->base.immediate_value_entity;
95 * This function is called by the generic backend to correct offsets for
96 * nodes accessing the stack.
98 static void sparc_set_frame_offset(ir_node *node, int offset)
100 sparc_attr_t *attr = get_sparc_attr(node);
101 attr->immediate_value += offset;
103 /* must be a FrameAddr or a load/store node with frame_entity */
104 assert(is_sparc_FrameAddr(node) ||
105 get_sparc_load_store_attr_const(node)->is_frame_entity);
108 static int sparc_get_sp_bias(const ir_node *node)
110 if (is_sparc_Save(node)) {
111 const sparc_attr_t *attr = get_sparc_attr_const(node);
112 if (get_irn_arity(node) == 3)
113 panic("no support for _reg variant yet");
115 return -attr->immediate_value;
116 } else if (is_sparc_RestoreZero(node)) {
117 return SP_BIAS_RESET;
122 /* fill register allocator interface */
124 const arch_irn_ops_t sparc_irn_ops = {
125 sparc_get_frame_entity,
126 sparc_set_frame_offset,
128 NULL, /* get_inverse */
129 NULL, /* get_op_estimated_cost */
130 NULL, /* possible_memory_operand */
131 NULL, /* perform_memory_operand */
135 * Transforms the standard firm graph into
138 static void sparc_prepare_graph(ir_graph *irg)
140 sparc_transform_graph(irg);
143 static bool sparc_modifies_flags(const ir_node *node)
145 unsigned n_outs = arch_get_irn_n_outs(node);
146 for (unsigned o = 0; o < n_outs; ++o) {
147 const arch_register_req_t *req = arch_get_irn_register_req_out(node, o);
148 if (req->cls == &sparc_reg_classes[CLASS_sparc_flags_class])
154 static bool sparc_modifies_fp_flags(const ir_node *node)
156 unsigned n_outs = arch_get_irn_n_outs(node);
157 for (unsigned o = 0; o < n_outs; ++o) {
158 const arch_register_req_t *req = arch_get_irn_register_req_out(node, o);
159 if (req->cls == &sparc_reg_classes[CLASS_sparc_fpflags_class])
165 static void sparc_before_ra(ir_graph *irg)
167 /* fixup flags register */
168 be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_flags_class],
169 NULL, sparc_modifies_flags);
170 be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_fpflags_class],
171 NULL, sparc_modifies_fp_flags);
174 extern const arch_isa_if_t sparc_isa_if;
175 static sparc_isa_t sparc_isa_template = {
177 &sparc_isa_if, /* isa interface implementation */
182 &sparc_registers[REG_SP], /* stack pointer register */
183 &sparc_registers[REG_FRAME_POINTER], /* base pointer register */
184 3, /* power of two stack alignment
186 NULL, /* main environment */
187 7, /* costs for a spill instruction */
188 5, /* costs for a reload instruction */
189 true, /* custom abi handling */
191 NULL, /* constants */
192 SPARC_FPU_ARCH_FPU, /* FPU architecture */
196 * rewrite unsigned->float conversion.
197 * Sparc has no instruction for this so instead we do the following:
199 * int signed_x = unsigned_value_x;
200 * double res = signed_x;
202 * res += 4294967296. ;
203 * return (float) res;
205 static void rewrite_unsigned_float_Conv(ir_node *node)
207 ir_graph *irg = get_irn_irg(node);
208 dbg_info *dbgi = get_irn_dbg_info(node);
209 ir_node *lower_block = get_nodes_block(node);
214 ir_node *block = get_nodes_block(node);
215 ir_node *unsigned_x = get_Conv_op(node);
216 ir_mode *mode_u = get_irn_mode(unsigned_x);
217 ir_mode *mode_s = find_signed_mode(mode_u);
218 ir_mode *mode_d = mode_D;
219 ir_node *signed_x = new_rd_Conv(dbgi, block, unsigned_x, mode_s);
220 ir_node *res = new_rd_Conv(dbgi, block, signed_x, mode_d);
221 ir_node *zero = new_r_Const(irg, get_mode_null(mode_s));
222 ir_node *cmp = new_rd_Cmp(dbgi, block, signed_x, zero,
224 ir_node *cond = new_rd_Cond(dbgi, block, cmp);
225 ir_node *proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
226 ir_node *proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
227 ir_node *in_true[1] = { proj_true };
228 ir_node *in_false[1] = { proj_false };
229 ir_node *true_block = new_r_Block(irg, ARRAY_SIZE(in_true), in_true);
230 ir_node *false_block = new_r_Block(irg, ARRAY_SIZE(in_false),in_false);
231 ir_node *true_jmp = new_r_Jmp(true_block);
232 ir_node *false_jmp = new_r_Jmp(false_block);
233 ir_tarval *correction = new_tarval_from_double(4294967296., mode_d);
234 ir_node *c_const = new_r_Const(irg, correction);
235 ir_node *fadd = new_rd_Add(dbgi, true_block, res, c_const,
238 ir_node *lower_in[2] = { true_jmp, false_jmp };
239 ir_node *phi_in[2] = { fadd, res };
240 ir_mode *dest_mode = get_irn_mode(node);
244 set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
245 phi = new_r_Phi(lower_block, ARRAY_SIZE(phi_in), phi_in, mode_d);
246 assert(get_Block_phis(lower_block) == NULL);
247 set_Block_phis(lower_block, phi);
248 set_Phi_next(phi, NULL);
250 res_conv = new_rd_Conv(dbgi, lower_block, phi, dest_mode);
252 exchange(node, res_conv);
257 * rewrite float->unsigned conversions.
258 * Sparc has no instruction for this so instead we do the following:
260 * if (x >= 2147483648.) {
261 * converted ^= (int)(x-2147483648.) ^ 0x80000000;
263 * converted = (int)x;
265 * return (unsigned)converted;
267 static void rewrite_float_unsigned_Conv(ir_node *node)
269 ir_graph *irg = get_irn_irg(node);
270 dbg_info *dbgi = get_irn_dbg_info(node);
271 ir_node *lower_block = get_nodes_block(node);
276 ir_node *block = get_nodes_block(node);
277 ir_node *float_x = get_Conv_op(node);
278 ir_mode *mode_u = get_irn_mode(node);
279 ir_mode *mode_s = find_signed_mode(mode_u);
280 ir_mode *mode_f = get_irn_mode(float_x);
281 ir_tarval *limit = new_tarval_from_double(2147483648., mode_f);
282 ir_node *limitc = new_r_Const(irg, limit);
283 ir_node *cmp = new_rd_Cmp(dbgi, block, float_x, limitc,
284 ir_relation_greater_equal);
285 ir_node *cond = new_rd_Cond(dbgi, block, cmp);
286 ir_node *proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
287 ir_node *proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
288 ir_node *in_true[1] = { proj_true };
289 ir_node *in_false[1] = { proj_false };
290 ir_node *true_block = new_r_Block(irg, ARRAY_SIZE(in_true), in_true);
291 ir_node *false_block = new_r_Block(irg, ARRAY_SIZE(in_false),in_false);
292 ir_node *true_jmp = new_r_Jmp(true_block);
293 ir_node *false_jmp = new_r_Jmp(false_block);
295 ir_tarval *correction = new_tarval_from_long(0x80000000l, mode_s);
296 ir_node *c_const = new_r_Const(irg, correction);
297 ir_node *sub = new_rd_Sub(dbgi, true_block, float_x, limitc,
299 ir_node *sub_conv = new_rd_Conv(dbgi, true_block, sub, mode_s);
300 ir_node *xorn = new_rd_Eor(dbgi, true_block, sub_conv, c_const,
303 ir_node *converted = new_rd_Conv(dbgi, false_block, float_x,mode_s);
305 ir_node *lower_in[2] = { true_jmp, false_jmp };
306 ir_node *phi_in[2] = { xorn, converted };
310 set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
311 phi = new_r_Phi(lower_block, ARRAY_SIZE(phi_in), phi_in, mode_s);
312 assert(get_Block_phis(lower_block) == NULL);
313 set_Block_phis(lower_block, phi);
314 set_Phi_next(phi, NULL);
316 res_conv = new_rd_Conv(dbgi, lower_block, phi, mode_u);
317 exchange(node, res_conv);
321 static int sparc_rewrite_Conv(ir_node *node, void *ctx)
323 ir_mode *to_mode = get_irn_mode(node);
324 ir_node *op = get_Conv_op(node);
325 ir_mode *from_mode = get_irn_mode(op);
328 if (mode_is_float(to_mode) && mode_is_int(from_mode)
329 && get_mode_size_bits(from_mode) == 32
330 && !mode_is_signed(from_mode)) {
331 rewrite_unsigned_float_Conv(node);
334 if (mode_is_float(from_mode) && mode_is_int(to_mode)
335 && get_mode_size_bits(to_mode) <= 32
336 && !mode_is_signed(to_mode)) {
337 rewrite_float_unsigned_Conv(node);
344 static void sparc_handle_intrinsics(void)
346 ir_type *tp, *int_tp, *uint_tp;
348 size_t n_records = 0;
350 runtime_rt rt_iMod, rt_uMod;
352 #define ID(x) new_id_from_chars(x, sizeof(x)-1)
354 int_tp = new_type_primitive(mode_Is);
355 uint_tp = new_type_primitive(mode_Iu);
357 /* we need to rewrite some forms of int->float conversions */
359 i_instr_record *map_Conv = &records[n_records++].i_instr;
361 map_Conv->kind = INTRINSIC_INSTR;
362 map_Conv->op = op_Conv;
363 map_Conv->i_mapper = sparc_rewrite_Conv;
365 /* SPARC has no signed mod instruction ... */
367 i_instr_record *map_Mod = &records[n_records++].i_instr;
369 tp = new_type_method(2, 1);
370 set_method_param_type(tp, 0, int_tp);
371 set_method_param_type(tp, 1, int_tp);
372 set_method_res_type(tp, 0, int_tp);
374 rt_iMod.ent = new_entity(get_glob_type(), ID(".rem"), tp);
375 set_entity_ld_ident(rt_iMod.ent, ID(".rem"));
376 rt_iMod.mode = mode_T;
377 rt_iMod.res_mode = mode_Is;
378 rt_iMod.mem_proj_nr = pn_Mod_M;
379 rt_iMod.regular_proj_nr = pn_Mod_X_regular;
380 rt_iMod.exc_proj_nr = pn_Mod_X_except;
381 rt_iMod.res_proj_nr = pn_Mod_res;
383 set_entity_visibility(rt_iMod.ent, ir_visibility_external);
385 map_Mod->kind = INTRINSIC_INSTR;
386 map_Mod->op = op_Mod;
387 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
388 map_Mod->ctx = &rt_iMod;
390 /* ... nor an unsigned mod. */
392 i_instr_record *map_Mod = &records[n_records++].i_instr;
394 tp = new_type_method(2, 1);
395 set_method_param_type(tp, 0, uint_tp);
396 set_method_param_type(tp, 1, uint_tp);
397 set_method_res_type(tp, 0, uint_tp);
399 rt_uMod.ent = new_entity(get_glob_type(), ID(".urem"), tp);
400 set_entity_ld_ident(rt_uMod.ent, ID(".urem"));
401 rt_uMod.mode = mode_T;
402 rt_uMod.res_mode = mode_Iu;
403 rt_uMod.mem_proj_nr = pn_Mod_M;
404 rt_uMod.regular_proj_nr = pn_Mod_X_regular;
405 rt_uMod.exc_proj_nr = pn_Mod_X_except;
406 rt_uMod.res_proj_nr = pn_Mod_res;
408 set_entity_visibility(rt_uMod.ent, ir_visibility_external);
410 map_Mod->kind = INTRINSIC_INSTR;
411 map_Mod->op = op_Mod;
412 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
413 map_Mod->ctx = &rt_uMod;
416 assert(n_records < ARRAY_SIZE(records));
417 lower_intrinsics(records, n_records, /*part_block_used=*/ true);
420 static void sparc_init(void)
422 sparc_register_init();
423 sparc_create_opcodes(&sparc_irn_ops);
427 static void sparc_finish(void)
429 sparc_free_opcodes();
432 static arch_env_t *sparc_begin_codegeneration(const be_main_env_t *env)
434 sparc_isa_t *isa = XMALLOC(sparc_isa_t);
435 *isa = sparc_isa_template;
436 isa->constants = pmap_create();
438 be_gas_elf_type_char = '#';
439 be_gas_object_file_format = OBJECT_FILE_FORMAT_ELF;
440 be_gas_elf_variant = ELF_VARIANT_SPARC;
442 be_emit_init(env->file_handle);
443 be_gas_begin_compilation_unit(env);
449 * Closes the output file and frees the ISA structure.
451 static void sparc_end_codegeneration(void *self)
453 sparc_isa_t *isa = (sparc_isa_t*)self;
455 /* emit now all global declarations */
456 be_gas_end_compilation_unit(isa->base.main_env);
458 pmap_destroy(isa->constants);
463 static void sparc_lower_for_target(void)
465 ir_mode *mode_gp = sparc_reg_classes[CLASS_sparc_gp].mode;
466 size_t i, n_irgs = get_irp_n_irgs();
468 lower_calls_with_compounds(LF_RETURN_HIDDEN);
470 for (i = 0; i < n_irgs; ++i) {
471 ir_graph *irg = get_irp_irg(i);
472 /* Turn all small CopyBs into loads/stores and all bigger CopyBs into
474 lower_CopyB(irg, 31, 32, false);
477 if (sparc_isa_template.fpu_arch == SPARC_FPU_ARCH_SOFTFLOAT)
478 lower_floating_point();
480 lower_builtins(0, NULL);
484 for (i = 0; i < n_irgs; ++i) {
485 ir_graph *irg = get_irp_irg(i);
486 ir_lower_mode_b(irg, mode_Iu);
487 lower_switch(irg, 4, 256, mode_gp);
488 /* TODO: Pass SPARC_MIN_STACKSIZE as addr_delta as soon as
489 * Alloc nodes are implemented more efficiently. */
490 lower_alloc(irg, SPARC_STACK_ALIGNMENT, true, 0);
494 static int sparc_is_mux_allowed(ir_node *sel, ir_node *mux_false,
497 return ir_is_optimizable_mux(sel, mux_false, mux_true);
501 * Returns the libFirm configuration parameter for this backend.
503 static const backend_params *sparc_get_backend_params(void)
505 static const ir_settings_arch_dep_t arch_dep = {
506 1, /* also_use_subs */
507 1, /* maximum_shifts */
508 31, /* highest_shift_amount */
509 NULL, /* evaluate_cost_func */
512 32, /* max_bits_for_mulh */
514 static backend_params p = {
515 0, /* no inline assembly */
516 0, /* no support for RotL nodes */
518 1, /* modulo shift efficient */
519 0, /* non-modulo shift not efficient */
520 &arch_dep, /* will be set later */
521 sparc_is_mux_allowed, /* parameter for if conversion */
522 32, /* machine size */
523 NULL, /* float arithmetic mode */
524 NULL, /* long long type */
525 NULL, /* usigned long long type */
526 NULL, /* long double type */
527 0, /* no trampoline support: size 0 */
528 0, /* no trampoline support: align 0 */
529 NULL, /* no trampoline support: no trampoline builder */
530 4 /* alignment of stack parameter: typically 4 (32bit) or 8 (64bit) */
533 ir_mode *mode_long_long
534 = new_int_mode("long long", irma_twos_complement, 64, 1, 64);
535 ir_type *type_long_long = new_type_primitive(mode_long_long);
536 ir_mode *mode_unsigned_long_long
537 = new_int_mode("unsigned long long", irma_twos_complement, 64, 0, 64);
538 ir_type *type_unsigned_long_long
539 = new_type_primitive(mode_unsigned_long_long);
541 p.type_long_long = type_long_long;
542 p.type_unsigned_long_long = type_unsigned_long_long;
544 ir_type *type_long_double = new_type_primitive(mode_Q);
546 set_type_alignment_bytes(type_long_double, 8);
547 set_type_size_bytes(type_long_double, 16);
548 p.type_long_double = type_long_double;
552 static asm_constraint_flags_t sparc_parse_asm_constraint(const char **c)
555 return ASM_CONSTRAINT_FLAG_INVALID;
558 static int sparc_is_valid_clobber(const char *clobber)
564 /* fpu set architectures. */
565 static const lc_opt_enum_int_items_t sparc_fpu_items[] = {
566 { "fpu", SPARC_FPU_ARCH_FPU },
567 { "softfloat", SPARC_FPU_ARCH_SOFTFLOAT },
571 static lc_opt_enum_int_var_t arch_fpu_var = {
572 &sparc_isa_template.fpu_arch, sparc_fpu_items
575 static const lc_opt_table_entry_t sparc_options[] = {
576 LC_OPT_ENT_ENUM_INT("fpunit", "select the floating point unit", &arch_fpu_var),
580 static ir_node *sparc_new_spill(ir_node *value, ir_node *after)
582 ir_node *block = get_block(after);
583 ir_graph *irg = get_irn_irg(value);
584 ir_node *frame = get_irg_frame(irg);
585 ir_node *mem = get_irg_no_mem(irg);
586 ir_mode *mode = get_irn_mode(value);
589 if (mode_is_float(mode)) {
590 store = create_stf(NULL, block, value, frame, mem, mode, NULL, 0, true);
592 store = new_bd_sparc_St_imm(NULL, block, value, frame, mem, mode, NULL,
595 sched_add_after(after, store);
599 static ir_node *sparc_new_reload(ir_node *value, ir_node *spill,
602 ir_node *block = get_block(before);
603 ir_graph *irg = get_irn_irg(value);
604 ir_node *frame = get_irg_frame(irg);
605 ir_mode *mode = get_irn_mode(value);
609 if (mode_is_float(mode)) {
610 load = create_ldf(NULL, block, frame, spill, mode, NULL, 0, true);
612 load = new_bd_sparc_Ld_imm(NULL, block, frame, spill, mode, NULL, 0,
615 sched_add_before(before, load);
616 assert((long)pn_sparc_Ld_res == (long)pn_sparc_Ldf_res);
617 res = new_r_Proj(load, mode, pn_sparc_Ld_res);
622 const arch_isa_if_t sparc_isa_if = {
625 sparc_get_backend_params,
626 sparc_lower_for_target,
627 sparc_parse_asm_constraint,
628 sparc_is_valid_clobber,
630 sparc_begin_codegeneration,
631 sparc_end_codegeneration,
633 NULL, /* get call abi */
634 NULL, /* mark remat */
635 NULL, /* get_pic_base */
638 NULL, /* register_saved_by */
640 sparc_handle_intrinsics,
641 NULL, /* before_abi */
648 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_sparc)
649 void be_init_arch_sparc(void)
651 lc_opt_entry_t *be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
652 lc_opt_entry_t *sparc_grp = lc_opt_get_grp(be_grp, "sparc");
654 lc_opt_add_table(sparc_grp, sparc_options);
656 be_register_isa_if("sparc", &sparc_isa_if);
657 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.cg");
658 sparc_init_transform();
659 sparc_init_emitter();