2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The main sparc backend driver file.
29 #include "lc_opts_enum.h"
37 #include "iroptimize.h"
47 #include "../bearch.h"
48 #include "../benode.h"
49 #include "../belower.h"
50 #include "../besched.h"
53 #include "../bemachine.h"
54 #include "../beilpsched.h"
55 #include "../bemodule.h"
57 #include "../bespillslots.h"
58 #include "../begnuas.h"
59 #include "../belistsched.h"
60 #include "../beflags.h"
62 #include "bearch_sparc_t.h"
63 #include "bearch_sparc.h"
65 #include "sparc_new_nodes.h"
66 #include "gen_sparc_regalloc_if.h"
67 #include "sparc_transform.h"
68 #include "sparc_emitter.h"
69 #include "sparc_map_regs.h"
71 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
73 static arch_irn_class_t sparc_classify(const ir_node *irn)
79 static ir_entity *sparc_get_frame_entity(const ir_node *irn)
81 const sparc_attr_t *attr = get_sparc_attr_const(irn);
83 if (is_sparc_FrameAddr(irn)) {
84 const sparc_symconst_attr_t *attr = get_irn_generic_attr_const(irn);
88 if (attr->is_load_store) {
89 const sparc_load_store_attr_t *load_store_attr = get_sparc_load_store_attr_const(irn);
90 if (load_store_attr->is_frame_entity) {
91 return load_store_attr->entity;
99 * This function is called by the generic backend to correct offsets for
100 * nodes accessing the stack.
102 static void sparc_set_frame_offset(ir_node *irn, int offset)
104 if (is_sparc_FrameAddr(irn)) {
105 sparc_symconst_attr_t *attr = get_irn_generic_attr(irn);
106 attr->fp_offset += offset;
108 sparc_load_store_attr_t *attr = get_sparc_load_store_attr(irn);
109 assert(attr->base.is_load_store);
110 attr->offset += offset;
114 static int sparc_get_sp_bias(const ir_node *irn)
117 return SPARC_MIN_STACKSIZE;
120 /* fill register allocator interface */
122 static const arch_irn_ops_t sparc_irn_ops = {
125 sparc_get_frame_entity,
126 sparc_set_frame_offset,
128 NULL, /* get_inverse */
129 NULL, /* get_op_estimated_cost */
130 NULL, /* possible_memory_operand */
131 NULL, /* perform_memory_operand */
137 * Transforms the standard firm graph into
140 static void sparc_prepare_graph(void *self)
142 sparc_code_gen_t *cg = self;
144 /* transform FIRM into SPARC asm nodes */
145 sparc_transform_graph(cg);
148 dump_ir_graph(cg->irg, "transformed");
153 static ir_node *sparc_flags_remat(ir_node *node, ir_node *after)
158 if (is_Block(after)) {
161 block = get_nodes_block(after);
163 copy = exact_copy(node);
164 set_nodes_block(copy, block);
165 sched_add_after(after, copy);
169 static void sparc_before_ra(void *self)
171 sparc_code_gen_t *cg = self;
172 /* fixup flags register */
173 be_sched_fix_flags(cg->irg, &sparc_reg_classes[CLASS_sparc_flags], &sparc_flags_remat);
177 * transform reload node => load
179 static void transform_Reload(ir_node *node)
181 ir_graph *irg = get_irn_irg(node);
182 ir_node *block = get_nodes_block(node);
183 dbg_info *dbgi = get_irn_dbg_info(node);
184 ir_node *ptr = get_irg_frame(irg);
185 ir_node *mem = get_irn_n(node, be_pos_Reload_mem);
186 ir_mode *mode = get_irn_mode(node);
187 ir_entity *entity = be_get_frame_entity(node);
188 const arch_register_t *reg;
192 ir_node *sched_point = sched_prev(node);
194 load = new_bd_sparc_Load(dbgi, block, ptr, mem, mode, entity, false, 0, true);
195 sched_add_after(sched_point, load);
198 proj = new_rd_Proj(dbgi, load, mode, pn_sparc_Load_res);
200 reg = arch_get_irn_register(node);
201 arch_set_irn_register(proj, reg);
203 exchange(node, proj);
207 * transform spill node => store
209 static void transform_Spill(ir_node *node)
211 ir_graph *irg = get_irn_irg(node);
212 ir_node *block = get_nodes_block(node);
213 dbg_info *dbgi = get_irn_dbg_info(node);
214 ir_node *ptr = get_irg_frame(irg);
215 ir_node *mem = new_NoMem();
216 ir_node *val = get_irn_n(node, be_pos_Spill_val);
217 ir_mode *mode = get_irn_mode(val);
218 ir_entity *entity = be_get_frame_entity(node);
219 ir_node *sched_point;
222 sched_point = sched_prev(node);
223 store = new_bd_sparc_Store(dbgi, block, ptr, val, mem, mode, entity, false, 0, true);
225 sched_add_after(sched_point, store);
227 exchange(node, store);
231 * walker to transform be_Spill and be_Reload nodes
233 static void sparc_after_ra_walker(ir_node *block, void *data)
235 ir_node *node, *prev;
238 for (node = sched_last(block); !sched_is_begin(node); node = prev) {
239 prev = sched_prev(node);
241 if (be_is_Reload(node)) {
242 transform_Reload(node);
243 } else if (be_is_Spill(node)) {
244 transform_Spill(node);
250 static void sparc_after_ra(void *self)
252 sparc_code_gen_t *cg = self;
253 be_coalesce_spillslots(cg->irg);
255 irg_block_walk_graph(cg->irg, NULL, sparc_after_ra_walker, NULL);
261 * Emits the code, closes the output file and frees
262 * the code generator interface.
264 static void sparc_emit_and_done(void *self)
266 sparc_code_gen_t *cg = self;
267 ir_graph *irg = cg->irg;
269 sparc_gen_routine(cg, irg);
271 /* de-allocate code generator */
275 static void *sparc_cg_init(ir_graph *irg);
277 static const arch_code_generator_if_t sparc_code_gen_if = {
279 NULL, /* get_pic_base hook */
280 NULL, /* before abi introduce hook */
282 NULL, /* spill hook */
283 sparc_before_ra, /* before register allocation hook */
284 sparc_after_ra, /* after register allocation hook */
290 * Initializes the code generator.
292 static void *sparc_cg_init(ir_graph *irg)
294 static ir_type *int_tp = NULL;
295 sparc_isa_t *isa = (sparc_isa_t *) be_get_irg_arch_env(irg);
296 sparc_code_gen_t *cg;
299 /* create an integer type with machine size */
300 int_tp = new_type_primitive(mode_Is);
303 cg = XMALLOC(sparc_code_gen_t);
304 cg->impl = &sparc_code_gen_if;
306 //cg->reg_set = new_set(arm_cmp_irn_reg_assoc, 1024);
308 //cg->int_tp = int_tp;
309 //cg->have_fp_insn = 0;
310 //cg->unknown_gp = NULL;
311 //cg->unknown_fpa = NULL;
312 cg->dump = (be_get_irg_options(irg)->dump_flags & DUMP_BE) ? 1 : 0;
314 /* enter the current code generator */
317 return (arch_code_generator_t *)cg;
322 const arch_isa_if_t sparc_isa_if;
323 static sparc_isa_t sparc_isa_template = {
325 &sparc_isa_if, /* isa interface implementation */
326 &sparc_gp_regs[REG_SP], /* stack pointer register */
327 &sparc_gp_regs[REG_FP], /* base pointer register */
328 &sparc_reg_classes[CLASS_sparc_gp], /* link pointer register class */
329 -1, /* stack direction */
330 1, /* power of two stack alignment for calls, 2^2 == 4 */
331 NULL, /* main environment */
332 7, /* costs for a spill instruction */
333 5, /* costs for a reload instruction */
334 false, /* no custom abi handling */
336 NULL /* current code generator */
340 static void sparc_handle_intrinsics(void)
342 ir_type *tp, *int_tp, *uint_tp;
346 runtime_rt rt_iMod, rt_uMod;
348 #define ID(x) new_id_from_chars(x, sizeof(x)-1)
350 int_tp = new_type_primitive(mode_Is);
351 uint_tp = new_type_primitive(mode_Iu);
354 /* SPARC has no signed mod instruction ... */
356 i_instr_record *map_Mod = &records[n_records++].i_instr;
358 tp = new_type_method(2, 1);
359 set_method_param_type(tp, 0, int_tp);
360 set_method_param_type(tp, 1, int_tp);
361 set_method_res_type(tp, 0, int_tp);
363 rt_iMod.ent = new_entity(get_glob_type(), ID(".rem"), tp);
364 set_entity_ld_ident(rt_iMod.ent, ID(".rem"));
365 rt_iMod.mode = mode_T;
366 rt_iMod.res_mode = mode_Is;
367 rt_iMod.mem_proj_nr = pn_Mod_M;
368 rt_iMod.regular_proj_nr = pn_Mod_X_regular;
369 rt_iMod.exc_proj_nr = pn_Mod_X_except;
370 rt_iMod.exc_mem_proj_nr = pn_Mod_M;
371 rt_iMod.res_proj_nr = pn_Mod_res;
373 set_entity_visibility(rt_iMod.ent, ir_visibility_external);
375 map_Mod->kind = INTRINSIC_INSTR;
376 map_Mod->op = op_Mod;
377 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
378 map_Mod->ctx = &rt_iMod;
380 /* ... nor an unsigned mod. */
382 i_instr_record *map_Mod = &records[n_records++].i_instr;
384 tp = new_type_method(2, 1);
385 set_method_param_type(tp, 0, uint_tp);
386 set_method_param_type(tp, 1, uint_tp);
387 set_method_res_type(tp, 0, uint_tp);
389 rt_uMod.ent = new_entity(get_glob_type(), ID(".urem"), tp);
390 set_entity_ld_ident(rt_uMod.ent, ID(".urem"));
391 rt_uMod.mode = mode_T;
392 rt_uMod.res_mode = mode_Iu;
393 rt_uMod.mem_proj_nr = pn_Mod_M;
394 rt_uMod.regular_proj_nr = pn_Mod_X_regular;
395 rt_uMod.exc_proj_nr = pn_Mod_X_except;
396 rt_uMod.exc_mem_proj_nr = pn_Mod_M;
397 rt_uMod.res_proj_nr = pn_Mod_res;
399 set_entity_visibility(rt_uMod.ent, ir_visibility_external);
401 map_Mod->kind = INTRINSIC_INSTR;
402 map_Mod->op = op_Mod;
403 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
404 map_Mod->ctx = &rt_uMod;
408 lower_intrinsics(records, n_records, /*part_block_used=*/0);
413 * Initializes the backend ISA
415 static arch_env_t *sparc_init(FILE *outfile)
417 static int run_once = 0;
424 isa = XMALLOC(sparc_isa_t);
425 memcpy(isa, &sparc_isa_template, sizeof(*isa));
427 be_emit_init(outfile);
429 sparc_register_init();
430 sparc_create_opcodes(&sparc_irn_ops);
431 sparc_handle_intrinsics();
439 * Closes the output file and frees the ISA structure.
441 static void sparc_done(void *self)
443 sparc_isa_t *isa = self;
445 /* emit now all global declarations */
446 be_gas_emit_decls(isa->base.main_env);
453 static unsigned sparc_get_n_reg_class(void)
458 static const arch_register_class_t *sparc_get_reg_class(unsigned i)
460 assert(i < N_CLASSES);
461 return &sparc_reg_classes[i];
467 * Get the register class which shall be used to store a value of a given mode.
468 * @param self The this pointer.
469 * @param mode The mode in question.
470 * @return A register class which can hold values of the given mode.
472 static const arch_register_class_t *sparc_get_reg_class_for_mode(const ir_mode *mode)
474 if (mode_is_float(mode))
475 return &sparc_reg_classes[CLASS_sparc_fp];
477 return &sparc_reg_classes[CLASS_sparc_gp];
483 be_abi_call_flags_bits_t flags;
487 static void *sparc_abi_init(const be_abi_call_t *call, ir_graph *irg)
489 sparc_abi_env_t *env = XMALLOC(sparc_abi_env_t);
490 be_abi_call_flags_t fl = be_abi_call_get_flags(call);
491 env->flags = fl.bits;
497 * Get the between type for that call.
498 * @param self The callback object.
499 * @return The between type of for that call.
501 static ir_type *sparc_get_between_type(void *self)
503 static ir_type *between_type = NULL;
506 if (between_type == NULL) {
507 between_type = new_type_class(new_id_from_str("sparc_between_type"));
508 set_type_size_bytes(between_type, 0);
516 * Build the prolog, return the BASE POINTER register
518 static const arch_register_t *sparc_abi_prologue(void *self, ir_node **mem,
519 pmap *reg_map, int *stack_bias)
521 sparc_abi_env_t *env = self;
522 ir_node *block = get_irg_start_block(env->irg);
523 const arch_register_t *fp = &sparc_gp_regs[REG_FP];
524 const arch_register_t *sp = &sparc_gp_regs[REG_SP];
527 ir_node *sp_proj = be_abi_reg_map_get(reg_map, sp);
530 //ir_type *frame_type = get_irg_frame_type(env->irg);
531 //frame_alloc_area(frame_type, reserved_stack_size, 1, 1);
533 // alloc min required stack space
534 // TODO: the min stacksize depends on wether this is a leaf procedure or not
535 ir_node *save = new_bd_sparc_Save(NULL, block, sp_proj, *mem, SPARC_MIN_STACKSIZE);
541 *stack_bias -= SPARC_MIN_STACKSIZE;
542 sp_proj = new_r_Proj(save, sp->reg_class->mode, pn_sparc_Save_stack);
543 *mem = new_r_Proj(save, mode_M, pn_sparc_Save_mem);
545 arch_set_irn_register(sp_proj, sp);
546 be_abi_reg_map_set(reg_map, sp, sp_proj);
548 // we always have a framepointer
552 /* Build the epilog */
553 static void sparc_abi_epilogue(void *self, ir_node *bl, ir_node **mem,
562 static const be_abi_callbacks_t sparc_abi_callbacks = {
565 sparc_get_between_type,
571 * Get the ABI restrictions for procedure calls.
572 * @param self The this pointer.
573 * @param method_type The type of the method (procedure) in question.
574 * @param abi The abi object to be modified
576 static void sparc_get_call_abi(const void *self, ir_type *method_type,
581 int i, n = get_method_n_params(method_type);
582 be_abi_call_flags_t call_flags;
585 /* set abi flags for calls */
586 call_flags.bits.left_to_right = 0;
587 call_flags.bits.store_args_sequential = 1;
589 call_flags.bits.try_omit_fp = 0;
590 call_flags.bits.fp_free = 0;
591 call_flags.bits.call_has_imm = 1;
593 /* set stack parameter passing style */
594 be_abi_call_set_flags(abi, call_flags, &sparc_abi_callbacks);
596 for (i = 0; i < n; i++) {
597 /* reg = get reg for param i; */
598 /* be_abi_call_param_reg(abi, i, reg); */
600 /* pass outgoing params 0-5 via registers, remaining via stack */
601 /* on sparc we need to set the ABI context since register names of parameters change to i0-i5 if we are the callee */
603 be_abi_call_param_reg(abi, i, sparc_get_RegParamOut_reg(i), ABI_CONTEXT_CALLER);
604 be_abi_call_param_reg(abi, i, sparc_get_RegParamIn_reg(i), ABI_CONTEXT_CALLEE);
606 tp = get_method_param_type(method_type, i);
607 mode = get_type_mode(tp);
608 be_abi_call_param_stack(abi, i, mode, 4, 0, 0, ABI_CONTEXT_BOTH); /*< stack args have no special context >*/
612 /* set return value register: return value is in i0 resp. f0 */
613 if (get_method_n_ress(method_type) > 0) {
614 tp = get_method_res_type(method_type, 0);
615 mode = get_type_mode(tp);
617 be_abi_call_res_reg(abi, 0,
618 mode_is_float(mode) ? &sparc_fp_regs[REG_F0] : &sparc_gp_regs[REG_I0], ABI_CONTEXT_CALLEE); /*< return has no special context >*/
620 be_abi_call_res_reg(abi, 0,
621 mode_is_float(mode) ? &sparc_fp_regs[REG_F0] : &sparc_gp_regs[REG_O0], ABI_CONTEXT_CALLER); /*< return has no special context >*/
625 static int sparc_to_appear_in_schedule(void *block_env, const ir_node *irn)
629 if (!is_sparc_irn(irn))
636 * Initializes the code generator interface.
638 static const arch_code_generator_if_t *sparc_get_code_generator_if(
642 return &sparc_code_gen_if;
645 list_sched_selector_t sparc_sched_selector;
648 * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
650 static const list_sched_selector_t *sparc_get_list_sched_selector(
651 const void *self, list_sched_selector_t *selector)
656 sparc_sched_selector = trivial_selector;
657 sparc_sched_selector.to_appear_in_schedule = sparc_to_appear_in_schedule;
658 return &sparc_sched_selector;
661 static const ilp_sched_selector_t *sparc_get_ilp_sched_selector(
669 * Returns the necessary byte alignment for storing a register of given class.
671 static int sparc_get_reg_class_alignment(const arch_register_class_t *cls)
673 ir_mode *mode = arch_register_class_mode(cls);
674 return get_mode_size_bytes(mode);
678 * Returns the libFirm configuration parameter for this backend.
680 static const backend_params *sparc_get_backend_params(void)
682 static backend_params p = {
683 0, /* no dword lowering */
684 0, /* no inline assembly */
685 NULL, /* will be set later */
686 NULL, /* no creator function */
687 NULL, /* context for create_intrinsic_fkt */
688 NULL, /* parameter for if conversion */
689 NULL, /* float arithmetic mode */
690 0, /* no trampoline support: size 0 */
691 0, /* no trampoline support: align 0 */
692 NULL, /* no trampoline support: no trampoline builder */
693 4 /* alignment of stack parameter: typically 4 (32bit) or 8 (64bit) */
698 static const be_execution_unit_t ***sparc_get_allowed_execution_units(
703 panic("sparc_get_allowed_execution_units not implemented yet");
706 static const be_machine_t *sparc_get_machine(const void *self)
710 panic("sparc_get_machine not implemented yet");
713 static ir_graph **sparc_get_backend_irg_list(const void *self,
721 static asm_constraint_flags_t sparc_parse_asm_constraint(const char **c)
724 return ASM_CONSTRAINT_FLAG_INVALID;
727 static int sparc_is_valid_clobber(const char *clobber)
733 const arch_isa_if_t sparc_isa_if = {
736 NULL, /* handle intrinsics */
737 sparc_get_n_reg_class,
739 sparc_get_reg_class_for_mode,
741 sparc_get_code_generator_if,
742 sparc_get_list_sched_selector,
743 sparc_get_ilp_sched_selector,
744 sparc_get_reg_class_alignment,
745 sparc_get_backend_params,
746 sparc_get_allowed_execution_units,
748 sparc_get_backend_irg_list,
749 NULL, /* mark remat */
750 sparc_parse_asm_constraint,
751 sparc_is_valid_clobber
754 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_sparc);
755 void be_init_arch_sparc(void)
757 be_register_isa_if("sparc", &sparc_isa_if);
758 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.cg");
759 sparc_init_transform();
760 sparc_init_emitter();