2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The main sparc backend driver file.
23 * @author Hannes Rapp, Matthias Braun
28 #include "lc_opts_enum.h"
36 #include "iroptimize.h"
42 #include "lower_alloc.h"
43 #include "lower_builtins.h"
44 #include "lower_calls.h"
45 #include "lower_mode_b.h"
46 #include "lower_softfloat.h"
62 #include "belistsched.h"
66 #include "bearch_sparc_t.h"
68 #include "sparc_new_nodes.h"
69 #include "gen_sparc_regalloc_if.h"
70 #include "sparc_transform.h"
71 #include "sparc_emitter.h"
72 #include "sparc_cconv.h"
74 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
76 static ir_entity *sparc_get_frame_entity(const ir_node *node)
78 if (is_sparc_FrameAddr(node)) {
79 const sparc_attr_t *attr = get_sparc_attr_const(node);
80 return attr->immediate_value_entity;
83 if (sparc_has_load_store_attr(node)) {
84 const sparc_load_store_attr_t *load_store_attr
85 = get_sparc_load_store_attr_const(node);
86 if (load_store_attr->is_frame_entity) {
87 return load_store_attr->base.immediate_value_entity;
95 * This function is called by the generic backend to correct offsets for
96 * nodes accessing the stack.
98 static void sparc_set_frame_offset(ir_node *node, int offset)
100 sparc_attr_t *attr = get_sparc_attr(node);
101 attr->immediate_value += offset;
103 /* must be a FrameAddr or a load/store node with frame_entity */
104 assert(is_sparc_FrameAddr(node) ||
105 get_sparc_load_store_attr_const(node)->is_frame_entity);
108 static int sparc_get_sp_bias(const ir_node *node)
110 if (is_sparc_Save(node)) {
111 const sparc_attr_t *attr = get_sparc_attr_const(node);
112 if (get_irn_arity(node) == 3)
113 panic("no support for _reg variant yet");
115 return -attr->immediate_value;
116 } else if (is_sparc_RestoreZero(node)) {
117 return SP_BIAS_RESET;
122 /* fill register allocator interface */
124 const arch_irn_ops_t sparc_irn_ops = {
125 sparc_get_frame_entity,
126 sparc_set_frame_offset,
128 NULL, /* get_inverse */
129 NULL, /* get_op_estimated_cost */
130 NULL, /* possible_memory_operand */
131 NULL, /* perform_memory_operand */
135 * Transforms the standard firm graph into
138 static void sparc_prepare_graph(ir_graph *irg)
140 sparc_transform_graph(irg);
143 static bool sparc_modifies_flags(const ir_node *node)
145 unsigned n_outs = arch_get_irn_n_outs(node);
146 for (unsigned o = 0; o < n_outs; ++o) {
147 const arch_register_req_t *req = arch_get_irn_register_req_out(node, o);
148 if (req->cls == &sparc_reg_classes[CLASS_sparc_flags_class])
154 static bool sparc_modifies_fp_flags(const ir_node *node)
156 unsigned n_outs = arch_get_irn_n_outs(node);
157 for (unsigned o = 0; o < n_outs; ++o) {
158 const arch_register_req_t *req = arch_get_irn_register_req_out(node, o);
159 if (req->cls == &sparc_reg_classes[CLASS_sparc_fpflags_class])
165 static void sparc_before_ra(ir_graph *irg)
167 /* fixup flags register */
168 be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_flags_class],
169 NULL, sparc_modifies_flags);
170 be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_fpflags_class],
171 NULL, sparc_modifies_fp_flags);
174 extern const arch_isa_if_t sparc_isa_if;
175 static sparc_isa_t sparc_isa_template = {
177 &sparc_isa_if, /* isa interface implementation */
182 &sparc_registers[REG_SP], /* stack pointer register */
183 &sparc_registers[REG_FRAME_POINTER],/* base pointer register */
184 &sparc_reg_classes[CLASS_sparc_gp], /* link pointer register class */
185 3, /* power of two stack alignment
187 NULL, /* main environment */
188 7, /* costs for a spill instruction */
189 5, /* costs for a reload instruction */
190 true, /* custom abi handling */
192 NULL, /* constants */
193 SPARC_FPU_ARCH_FPU, /* FPU architecture */
197 * rewrite unsigned->float conversion.
198 * Sparc has no instruction for this so instead we do the following:
200 * int signed_x = unsigned_value_x;
201 * double res = signed_x;
203 * res += 4294967296. ;
204 * return (float) res;
206 static void rewrite_unsigned_float_Conv(ir_node *node)
208 ir_graph *irg = get_irn_irg(node);
209 dbg_info *dbgi = get_irn_dbg_info(node);
210 ir_node *lower_block = get_nodes_block(node);
215 ir_node *block = get_nodes_block(node);
216 ir_node *unsigned_x = get_Conv_op(node);
217 ir_mode *mode_u = get_irn_mode(unsigned_x);
218 ir_mode *mode_s = find_signed_mode(mode_u);
219 ir_mode *mode_d = mode_D;
220 ir_node *signed_x = new_rd_Conv(dbgi, block, unsigned_x, mode_s);
221 ir_node *res = new_rd_Conv(dbgi, block, signed_x, mode_d);
222 ir_node *zero = new_r_Const(irg, get_mode_null(mode_s));
223 ir_node *cmp = new_rd_Cmp(dbgi, block, signed_x, zero,
225 ir_node *cond = new_rd_Cond(dbgi, block, cmp);
226 ir_node *proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
227 ir_node *proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
228 ir_node *in_true[1] = { proj_true };
229 ir_node *in_false[1] = { proj_false };
230 ir_node *true_block = new_r_Block(irg, ARRAY_SIZE(in_true), in_true);
231 ir_node *false_block = new_r_Block(irg, ARRAY_SIZE(in_false),in_false);
232 ir_node *true_jmp = new_r_Jmp(true_block);
233 ir_node *false_jmp = new_r_Jmp(false_block);
234 ir_tarval *correction = new_tarval_from_double(4294967296., mode_d);
235 ir_node *c_const = new_r_Const(irg, correction);
236 ir_node *fadd = new_rd_Add(dbgi, true_block, res, c_const,
239 ir_node *lower_in[2] = { true_jmp, false_jmp };
240 ir_node *phi_in[2] = { fadd, res };
241 ir_mode *dest_mode = get_irn_mode(node);
245 set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
246 phi = new_r_Phi(lower_block, ARRAY_SIZE(phi_in), phi_in, mode_d);
247 assert(get_Block_phis(lower_block) == NULL);
248 set_Block_phis(lower_block, phi);
249 set_Phi_next(phi, NULL);
251 res_conv = new_rd_Conv(dbgi, lower_block, phi, dest_mode);
253 exchange(node, res_conv);
258 * rewrite float->unsigned conversions.
259 * Sparc has no instruction for this so instead we do the following:
261 * if (x >= 2147483648.) {
262 * converted ^= (int)(x-2147483648.) ^ 0x80000000;
264 * converted = (int)x;
266 * return (unsigned)converted;
268 static void rewrite_float_unsigned_Conv(ir_node *node)
270 ir_graph *irg = get_irn_irg(node);
271 dbg_info *dbgi = get_irn_dbg_info(node);
272 ir_node *lower_block = get_nodes_block(node);
277 ir_node *block = get_nodes_block(node);
278 ir_node *float_x = get_Conv_op(node);
279 ir_mode *mode_u = get_irn_mode(node);
280 ir_mode *mode_s = find_signed_mode(mode_u);
281 ir_mode *mode_f = get_irn_mode(float_x);
282 ir_tarval *limit = new_tarval_from_double(2147483648., mode_f);
283 ir_node *limitc = new_r_Const(irg, limit);
284 ir_node *cmp = new_rd_Cmp(dbgi, block, float_x, limitc,
285 ir_relation_greater_equal);
286 ir_node *cond = new_rd_Cond(dbgi, block, cmp);
287 ir_node *proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
288 ir_node *proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
289 ir_node *in_true[1] = { proj_true };
290 ir_node *in_false[1] = { proj_false };
291 ir_node *true_block = new_r_Block(irg, ARRAY_SIZE(in_true), in_true);
292 ir_node *false_block = new_r_Block(irg, ARRAY_SIZE(in_false),in_false);
293 ir_node *true_jmp = new_r_Jmp(true_block);
294 ir_node *false_jmp = new_r_Jmp(false_block);
296 ir_tarval *correction = new_tarval_from_long(0x80000000l, mode_s);
297 ir_node *c_const = new_r_Const(irg, correction);
298 ir_node *sub = new_rd_Sub(dbgi, true_block, float_x, limitc,
300 ir_node *sub_conv = new_rd_Conv(dbgi, true_block, sub, mode_s);
301 ir_node *xorn = new_rd_Eor(dbgi, true_block, sub_conv, c_const,
304 ir_node *converted = new_rd_Conv(dbgi, false_block, float_x,mode_s);
306 ir_node *lower_in[2] = { true_jmp, false_jmp };
307 ir_node *phi_in[2] = { xorn, converted };
311 set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
312 phi = new_r_Phi(lower_block, ARRAY_SIZE(phi_in), phi_in, mode_s);
313 assert(get_Block_phis(lower_block) == NULL);
314 set_Block_phis(lower_block, phi);
315 set_Phi_next(phi, NULL);
317 res_conv = new_rd_Conv(dbgi, lower_block, phi, mode_u);
318 exchange(node, res_conv);
322 static int sparc_rewrite_Conv(ir_node *node, void *ctx)
324 ir_mode *to_mode = get_irn_mode(node);
325 ir_node *op = get_Conv_op(node);
326 ir_mode *from_mode = get_irn_mode(op);
329 if (mode_is_float(to_mode) && mode_is_int(from_mode)
330 && get_mode_size_bits(from_mode) == 32
331 && !mode_is_signed(from_mode)) {
332 rewrite_unsigned_float_Conv(node);
335 if (mode_is_float(from_mode) && mode_is_int(to_mode)
336 && get_mode_size_bits(to_mode) <= 32
337 && !mode_is_signed(to_mode)) {
338 rewrite_float_unsigned_Conv(node);
345 static void sparc_handle_intrinsics(void)
347 ir_type *tp, *int_tp, *uint_tp;
349 size_t n_records = 0;
351 runtime_rt rt_iMod, rt_uMod;
353 #define ID(x) new_id_from_chars(x, sizeof(x)-1)
355 int_tp = new_type_primitive(mode_Is);
356 uint_tp = new_type_primitive(mode_Iu);
358 /* we need to rewrite some forms of int->float conversions */
360 i_instr_record *map_Conv = &records[n_records++].i_instr;
362 map_Conv->kind = INTRINSIC_INSTR;
363 map_Conv->op = op_Conv;
364 map_Conv->i_mapper = sparc_rewrite_Conv;
366 /* SPARC has no signed mod instruction ... */
368 i_instr_record *map_Mod = &records[n_records++].i_instr;
370 tp = new_type_method(2, 1);
371 set_method_param_type(tp, 0, int_tp);
372 set_method_param_type(tp, 1, int_tp);
373 set_method_res_type(tp, 0, int_tp);
375 rt_iMod.ent = new_entity(get_glob_type(), ID(".rem"), tp);
376 set_entity_ld_ident(rt_iMod.ent, ID(".rem"));
377 rt_iMod.mode = mode_T;
378 rt_iMod.res_mode = mode_Is;
379 rt_iMod.mem_proj_nr = pn_Mod_M;
380 rt_iMod.regular_proj_nr = pn_Mod_X_regular;
381 rt_iMod.exc_proj_nr = pn_Mod_X_except;
382 rt_iMod.res_proj_nr = pn_Mod_res;
384 set_entity_visibility(rt_iMod.ent, ir_visibility_external);
386 map_Mod->kind = INTRINSIC_INSTR;
387 map_Mod->op = op_Mod;
388 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
389 map_Mod->ctx = &rt_iMod;
391 /* ... nor an unsigned mod. */
393 i_instr_record *map_Mod = &records[n_records++].i_instr;
395 tp = new_type_method(2, 1);
396 set_method_param_type(tp, 0, uint_tp);
397 set_method_param_type(tp, 1, uint_tp);
398 set_method_res_type(tp, 0, uint_tp);
400 rt_uMod.ent = new_entity(get_glob_type(), ID(".urem"), tp);
401 set_entity_ld_ident(rt_uMod.ent, ID(".urem"));
402 rt_uMod.mode = mode_T;
403 rt_uMod.res_mode = mode_Iu;
404 rt_uMod.mem_proj_nr = pn_Mod_M;
405 rt_uMod.regular_proj_nr = pn_Mod_X_regular;
406 rt_uMod.exc_proj_nr = pn_Mod_X_except;
407 rt_uMod.res_proj_nr = pn_Mod_res;
409 set_entity_visibility(rt_uMod.ent, ir_visibility_external);
411 map_Mod->kind = INTRINSIC_INSTR;
412 map_Mod->op = op_Mod;
413 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
414 map_Mod->ctx = &rt_uMod;
417 assert(n_records < ARRAY_SIZE(records));
418 lower_intrinsics(records, n_records, /*part_block_used=*/ true);
421 static void sparc_init(void)
423 sparc_register_init();
424 sparc_create_opcodes(&sparc_irn_ops);
428 static void sparc_finish(void)
430 sparc_free_opcodes();
433 static arch_env_t *sparc_begin_codegeneration(const be_main_env_t *env)
435 sparc_isa_t *isa = XMALLOC(sparc_isa_t);
436 *isa = sparc_isa_template;
437 isa->constants = pmap_create();
439 be_gas_elf_type_char = '#';
440 be_gas_object_file_format = OBJECT_FILE_FORMAT_ELF;
441 be_gas_elf_variant = ELF_VARIANT_SPARC;
443 be_emit_init(env->file_handle);
444 be_gas_begin_compilation_unit(env);
450 * Closes the output file and frees the ISA structure.
452 static void sparc_end_codegeneration(void *self)
454 sparc_isa_t *isa = (sparc_isa_t*)self;
456 /* emit now all global declarations */
457 be_gas_end_compilation_unit(isa->base.main_env);
459 pmap_destroy(isa->constants);
464 static void sparc_lower_for_target(void)
466 ir_mode *mode_gp = sparc_reg_classes[CLASS_sparc_gp].mode;
467 size_t i, n_irgs = get_irp_n_irgs();
469 lower_calls_with_compounds(LF_RETURN_HIDDEN);
471 for (i = 0; i < n_irgs; ++i) {
472 ir_graph *irg = get_irp_irg(i);
473 /* Turn all small CopyBs into loads/stores and all bigger CopyBs into
475 lower_CopyB(irg, 31, 32, false);
478 if (sparc_isa_template.fpu_arch == SPARC_FPU_ARCH_SOFTFLOAT)
479 lower_floating_point();
481 lower_builtins(0, NULL);
485 for (i = 0; i < n_irgs; ++i) {
486 ir_graph *irg = get_irp_irg(i);
487 ir_lower_mode_b(irg, mode_Iu);
488 lower_switch(irg, 4, 256, mode_gp);
489 /* TODO: Pass SPARC_MIN_STACKSIZE as addr_delta as soon as
490 * Alloc nodes are implemented more efficiently. */
491 lower_alloc(irg, SPARC_STACK_ALIGNMENT, true, 0);
495 static int sparc_is_mux_allowed(ir_node *sel, ir_node *mux_false,
498 return ir_is_optimizable_mux(sel, mux_false, mux_true);
502 * Returns the libFirm configuration parameter for this backend.
504 static const backend_params *sparc_get_backend_params(void)
506 static const ir_settings_arch_dep_t arch_dep = {
507 1, /* also_use_subs */
508 1, /* maximum_shifts */
509 31, /* highest_shift_amount */
510 NULL, /* evaluate_cost_func */
513 32, /* max_bits_for_mulh */
515 static backend_params p = {
516 0, /* no inline assembly */
517 0, /* no support for RotL nodes */
519 1, /* modulo shift efficient */
520 0, /* non-modulo shift not efficient */
521 &arch_dep, /* will be set later */
522 sparc_is_mux_allowed, /* parameter for if conversion */
523 32, /* machine size */
524 NULL, /* float arithmetic mode */
525 NULL, /* long long type */
526 NULL, /* usigned long long type */
527 NULL, /* long double type */
528 0, /* no trampoline support: size 0 */
529 0, /* no trampoline support: align 0 */
530 NULL, /* no trampoline support: no trampoline builder */
531 4 /* alignment of stack parameter: typically 4 (32bit) or 8 (64bit) */
534 ir_mode *mode_long_long
535 = new_int_mode("long long", irma_twos_complement, 64, 1, 64);
536 ir_type *type_long_long = new_type_primitive(mode_long_long);
537 ir_mode *mode_unsigned_long_long
538 = new_int_mode("unsigned long long", irma_twos_complement, 64, 0, 64);
539 ir_type *type_unsigned_long_long
540 = new_type_primitive(mode_unsigned_long_long);
542 p.type_long_long = type_long_long;
543 p.type_unsigned_long_long = type_unsigned_long_long;
545 ir_type *type_long_double = new_type_primitive(mode_Q);
547 set_type_alignment_bytes(type_long_double, 8);
548 set_type_size_bytes(type_long_double, 16);
549 p.type_long_double = type_long_double;
553 static asm_constraint_flags_t sparc_parse_asm_constraint(const char **c)
556 return ASM_CONSTRAINT_FLAG_INVALID;
559 static int sparc_is_valid_clobber(const char *clobber)
565 /* fpu set architectures. */
566 static const lc_opt_enum_int_items_t sparc_fpu_items[] = {
567 { "fpu", SPARC_FPU_ARCH_FPU },
568 { "softfloat", SPARC_FPU_ARCH_SOFTFLOAT },
572 static lc_opt_enum_int_var_t arch_fpu_var = {
573 &sparc_isa_template.fpu_arch, sparc_fpu_items
576 static const lc_opt_table_entry_t sparc_options[] = {
577 LC_OPT_ENT_ENUM_INT("fpunit", "select the floating point unit", &arch_fpu_var),
581 static ir_node *sparc_new_spill(ir_node *value, ir_node *after)
583 ir_node *block = get_block(after);
584 ir_graph *irg = get_irn_irg(value);
585 ir_node *frame = get_irg_frame(irg);
586 ir_node *mem = get_irg_no_mem(irg);
587 ir_mode *mode = get_irn_mode(value);
590 if (mode_is_float(mode)) {
591 store = create_stf(NULL, block, value, frame, mem, mode, NULL, 0, true);
593 store = new_bd_sparc_St_imm(NULL, block, value, frame, mem, mode, NULL,
596 sched_add_after(after, store);
600 static ir_node *sparc_new_reload(ir_node *value, ir_node *spill,
603 ir_node *block = get_block(before);
604 ir_graph *irg = get_irn_irg(value);
605 ir_node *frame = get_irg_frame(irg);
606 ir_mode *mode = get_irn_mode(value);
610 if (mode_is_float(mode)) {
611 load = create_ldf(NULL, block, frame, spill, mode, NULL, 0, true);
613 load = new_bd_sparc_Ld_imm(NULL, block, frame, spill, mode, NULL, 0,
616 sched_add_before(before, load);
617 assert((long)pn_sparc_Ld_res == (long)pn_sparc_Ldf_res);
618 res = new_r_Proj(load, mode, pn_sparc_Ld_res);
623 const arch_isa_if_t sparc_isa_if = {
626 sparc_get_backend_params,
627 sparc_lower_for_target,
628 sparc_parse_asm_constraint,
629 sparc_is_valid_clobber,
631 sparc_begin_codegeneration,
632 sparc_end_codegeneration,
634 NULL, /* get call abi */
635 NULL, /* mark remat */
636 NULL, /* get_pic_base */
639 NULL, /* register_saved_by */
641 sparc_handle_intrinsics,
642 NULL, /* before_abi */
649 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_sparc)
650 void be_init_arch_sparc(void)
652 lc_opt_entry_t *be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
653 lc_opt_entry_t *sparc_grp = lc_opt_get_grp(be_grp, "sparc");
655 lc_opt_add_table(sparc_grp, sparc_options);
657 be_register_isa_if("sparc", &sparc_isa_if);
658 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.cg");
659 sparc_init_transform();
660 sparc_init_emitter();