2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The main sparc backend driver file.
28 #include "lc_opts_enum.h"
36 #include "iroptimize.h"
46 #include "../bearch.h"
47 #include "../benode.h"
48 #include "../belower.h"
49 #include "../besched.h"
52 #include "../bemachine.h"
53 #include "../beilpsched.h"
54 #include "../bemodule.h"
56 #include "../bespillslots.h"
57 #include "../begnuas.h"
58 #include "../belistsched.h"
59 #include "../beflags.h"
61 #include "bearch_sparc_t.h"
63 #include "sparc_new_nodes.h"
64 #include "gen_sparc_regalloc_if.h"
65 #include "sparc_transform.h"
66 #include "sparc_emitter.h"
68 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
70 static arch_irn_class_t sparc_classify(const ir_node *irn)
76 static ir_entity *sparc_get_frame_entity(const ir_node *irn)
78 const sparc_attr_t *attr = get_sparc_attr_const(irn);
80 if (is_sparc_FrameAddr(irn)) {
81 const sparc_symconst_attr_t *attr = get_irn_generic_attr_const(irn);
85 if (attr->is_load_store) {
86 const sparc_load_store_attr_t *load_store_attr = get_sparc_load_store_attr_const(irn);
87 if (load_store_attr->is_frame_entity) {
88 return load_store_attr->entity;
96 * This function is called by the generic backend to correct offsets for
97 * nodes accessing the stack.
99 static void sparc_set_frame_offset(ir_node *irn, int offset)
101 if (is_sparc_FrameAddr(irn)) {
102 sparc_symconst_attr_t *attr = get_irn_generic_attr(irn);
103 attr->fp_offset += offset;
105 sparc_load_store_attr_t *attr = get_sparc_load_store_attr(irn);
106 assert(attr->base.is_load_store);
107 attr->offset += offset;
111 static int sparc_get_sp_bias(const ir_node *node)
113 if (is_sparc_Save(node)) {
114 const sparc_save_attr_t *attr = get_sparc_save_attr_const(node);
115 /* Note we do not retport the change of the SPARC_MIN_STACKSIZE
116 * size, since we have additional magic in the emitter which
117 * calculates that! */
118 assert(attr->initial_stacksize >= SPARC_MIN_STACKSIZE);
119 return attr->initial_stacksize - SPARC_MIN_STACKSIZE;
124 /* fill register allocator interface */
126 static const arch_irn_ops_t sparc_irn_ops = {
129 sparc_get_frame_entity,
130 sparc_set_frame_offset,
132 NULL, /* get_inverse */
133 NULL, /* get_op_estimated_cost */
134 NULL, /* possible_memory_operand */
135 NULL, /* perform_memory_operand */
141 * Transforms the standard firm graph into
144 static void sparc_prepare_graph(void *self)
146 sparc_code_gen_t *cg = self;
148 /* transform FIRM into SPARC asm nodes */
149 sparc_transform_graph(cg);
152 dump_ir_graph(cg->irg, "transformed");
157 static ir_node *sparc_flags_remat(ir_node *node, ir_node *after)
162 if (is_Block(after)) {
165 block = get_nodes_block(after);
167 copy = exact_copy(node);
168 set_nodes_block(copy, block);
169 sched_add_after(after, copy);
173 static void sparc_before_ra(void *self)
175 sparc_code_gen_t *cg = self;
176 /* fixup flags register */
177 be_sched_fix_flags(cg->irg, &sparc_reg_classes[CLASS_sparc_flags], &sparc_flags_remat);
181 * transform reload node => load
183 static void transform_Reload(ir_node *node)
185 ir_graph *irg = get_irn_irg(node);
186 ir_node *block = get_nodes_block(node);
187 dbg_info *dbgi = get_irn_dbg_info(node);
188 ir_node *ptr = get_irg_frame(irg);
189 ir_node *mem = get_irn_n(node, be_pos_Reload_mem);
190 ir_mode *mode = get_irn_mode(node);
191 ir_entity *entity = be_get_frame_entity(node);
192 const arch_register_t *reg;
196 ir_node *sched_point = sched_prev(node);
198 load = new_bd_sparc_Ld(dbgi, block, ptr, mem, mode, entity, false, 0, true);
199 sched_add_after(sched_point, load);
202 proj = new_rd_Proj(dbgi, load, mode, pn_sparc_Ld_res);
204 reg = arch_get_irn_register(node);
205 arch_set_irn_register(proj, reg);
207 exchange(node, proj);
211 * transform spill node => store
213 static void transform_Spill(ir_node *node)
215 ir_graph *irg = get_irn_irg(node);
216 ir_node *block = get_nodes_block(node);
217 dbg_info *dbgi = get_irn_dbg_info(node);
218 ir_node *ptr = get_irg_frame(irg);
219 ir_node *mem = new_NoMem();
220 ir_node *val = get_irn_n(node, be_pos_Spill_val);
221 ir_mode *mode = get_irn_mode(val);
222 ir_entity *entity = be_get_frame_entity(node);
223 ir_node *sched_point;
226 sched_point = sched_prev(node);
227 store = new_bd_sparc_St(dbgi, block, ptr, val, mem, mode, entity, false, 0, true);
229 sched_add_after(sched_point, store);
231 exchange(node, store);
235 * walker to transform be_Spill and be_Reload nodes
237 static void sparc_after_ra_walker(ir_node *block, void *data)
239 ir_node *node, *prev;
242 for (node = sched_last(block); !sched_is_begin(node); node = prev) {
243 prev = sched_prev(node);
245 if (be_is_Reload(node)) {
246 transform_Reload(node);
247 } else if (be_is_Spill(node)) {
248 transform_Spill(node);
254 static void sparc_after_ra(void *self)
256 sparc_code_gen_t *cg = self;
257 be_coalesce_spillslots(cg->irg);
259 irg_block_walk_graph(cg->irg, NULL, sparc_after_ra_walker, NULL);
265 * Emits the code, closes the output file and frees
266 * the code generator interface.
268 static void sparc_emit_and_done(void *self)
270 sparc_code_gen_t *cg = self;
271 ir_graph *irg = cg->irg;
273 sparc_gen_routine(cg, irg);
275 /* de-allocate code generator */
279 static void *sparc_cg_init(ir_graph *irg);
281 static const arch_code_generator_if_t sparc_code_gen_if = {
283 NULL, /* get_pic_base hook */
284 NULL, /* before abi introduce hook */
286 NULL, /* spill hook */
287 sparc_before_ra, /* before register allocation hook */
288 sparc_after_ra, /* after register allocation hook */
294 * Initializes the code generator.
296 static void *sparc_cg_init(ir_graph *irg)
298 sparc_isa_t *isa = (sparc_isa_t *) be_get_irg_arch_env(irg);
299 sparc_code_gen_t *cg = XMALLOCZ(sparc_code_gen_t);
301 cg->impl = &sparc_code_gen_if;
304 cg->dump = (be_get_irg_options(irg)->dump_flags & DUMP_BE) != 0;
305 cg->constants = pmap_create();
307 /* enter the current code generator */
310 return (arch_code_generator_t*) cg;
313 const arch_isa_if_t sparc_isa_if;
314 static sparc_isa_t sparc_isa_template = {
316 &sparc_isa_if, /* isa interface implementation */
317 &sparc_gp_regs[REG_SP], /* stack pointer register */
318 &sparc_gp_regs[REG_FP], /* base pointer register */
319 &sparc_reg_classes[CLASS_sparc_gp], /* link pointer register class */
320 -1, /* stack direction */
321 3, /* power of two stack alignment for calls, 2^2 == 4 */
322 NULL, /* main environment */
323 7, /* costs for a spill instruction */
324 5, /* costs for a reload instruction */
325 false, /* no custom abi handling */
327 NULL /* current code generator */
331 static void sparc_handle_intrinsics(void)
333 ir_type *tp, *int_tp, *uint_tp;
337 runtime_rt rt_iMod, rt_uMod;
339 #define ID(x) new_id_from_chars(x, sizeof(x)-1)
341 int_tp = new_type_primitive(mode_Is);
342 uint_tp = new_type_primitive(mode_Iu);
345 /* SPARC has no signed mod instruction ... */
347 i_instr_record *map_Mod = &records[n_records++].i_instr;
349 tp = new_type_method(2, 1);
350 set_method_param_type(tp, 0, int_tp);
351 set_method_param_type(tp, 1, int_tp);
352 set_method_res_type(tp, 0, int_tp);
354 rt_iMod.ent = new_entity(get_glob_type(), ID(".rem"), tp);
355 set_entity_ld_ident(rt_iMod.ent, ID(".rem"));
356 rt_iMod.mode = mode_T;
357 rt_iMod.res_mode = mode_Is;
358 rt_iMod.mem_proj_nr = pn_Mod_M;
359 rt_iMod.regular_proj_nr = pn_Mod_X_regular;
360 rt_iMod.exc_proj_nr = pn_Mod_X_except;
361 rt_iMod.exc_mem_proj_nr = pn_Mod_M;
362 rt_iMod.res_proj_nr = pn_Mod_res;
364 set_entity_visibility(rt_iMod.ent, ir_visibility_external);
366 map_Mod->kind = INTRINSIC_INSTR;
367 map_Mod->op = op_Mod;
368 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
369 map_Mod->ctx = &rt_iMod;
371 /* ... nor an unsigned mod. */
373 i_instr_record *map_Mod = &records[n_records++].i_instr;
375 tp = new_type_method(2, 1);
376 set_method_param_type(tp, 0, uint_tp);
377 set_method_param_type(tp, 1, uint_tp);
378 set_method_res_type(tp, 0, uint_tp);
380 rt_uMod.ent = new_entity(get_glob_type(), ID(".urem"), tp);
381 set_entity_ld_ident(rt_uMod.ent, ID(".urem"));
382 rt_uMod.mode = mode_T;
383 rt_uMod.res_mode = mode_Iu;
384 rt_uMod.mem_proj_nr = pn_Mod_M;
385 rt_uMod.regular_proj_nr = pn_Mod_X_regular;
386 rt_uMod.exc_proj_nr = pn_Mod_X_except;
387 rt_uMod.exc_mem_proj_nr = pn_Mod_M;
388 rt_uMod.res_proj_nr = pn_Mod_res;
390 set_entity_visibility(rt_uMod.ent, ir_visibility_external);
392 map_Mod->kind = INTRINSIC_INSTR;
393 map_Mod->op = op_Mod;
394 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
395 map_Mod->ctx = &rt_uMod;
399 lower_intrinsics(records, n_records, /*part_block_used=*/0);
404 * Initializes the backend ISA
406 static arch_env_t *sparc_init(FILE *outfile)
408 static int run_once = 0;
415 isa = XMALLOC(sparc_isa_t);
416 memcpy(isa, &sparc_isa_template, sizeof(*isa));
418 be_emit_init(outfile);
420 sparc_register_init();
421 sparc_create_opcodes(&sparc_irn_ops);
422 sparc_handle_intrinsics();
430 * Closes the output file and frees the ISA structure.
432 static void sparc_done(void *self)
434 sparc_isa_t *isa = self;
436 /* emit now all global declarations */
437 be_gas_emit_decls(isa->base.main_env);
444 static unsigned sparc_get_n_reg_class(void)
449 static const arch_register_class_t *sparc_get_reg_class(unsigned i)
451 assert(i < N_CLASSES);
452 return &sparc_reg_classes[i];
458 * Get the register class which shall be used to store a value of a given mode.
459 * @param self The this pointer.
460 * @param mode The mode in question.
461 * @return A register class which can hold values of the given mode.
463 static const arch_register_class_t *sparc_get_reg_class_for_mode(const ir_mode *mode)
465 if (mode_is_float(mode))
466 return &sparc_reg_classes[CLASS_sparc_fp];
468 return &sparc_reg_classes[CLASS_sparc_gp];
474 be_abi_call_flags_bits_t flags;
478 static void *sparc_abi_init(const be_abi_call_t *call, ir_graph *irg)
480 sparc_abi_env_t *env = XMALLOC(sparc_abi_env_t);
481 be_abi_call_flags_t fl = be_abi_call_get_flags(call);
482 env->flags = fl.bits;
488 * Get the between type for that call.
489 * @param self The callback object.
490 * @return The between type of for that call.
492 static ir_type *sparc_get_between_type(void *self)
494 static ir_type *between_type = NULL;
497 if (between_type == NULL) {
498 between_type = new_type_class(new_id_from_str("sparc_between_type"));
499 set_type_size_bytes(between_type, SPARC_MIN_STACKSIZE);
507 * Build the prolog, return the BASE POINTER register
509 static const arch_register_t *sparc_abi_prologue(void *self, ir_node **mem,
510 pmap *reg_map, int *stack_bias)
512 sparc_abi_env_t *env = self;
513 ir_node *block = get_irg_start_block(env->irg);
514 const arch_register_t *fp = &sparc_gp_regs[REG_FP];
515 const arch_register_t *sp = &sparc_gp_regs[REG_SP];
518 ir_node *sp_proj = be_abi_reg_map_get(reg_map, sp);
521 //ir_type *frame_type = get_irg_frame_type(env->irg);
522 //frame_alloc_area(frame_type, reserved_stack_size, 1, 1);
524 // alloc min required stack space
525 // TODO: the min stacksize depends on wether this is a leaf procedure or not
526 ir_node *save = new_bd_sparc_Save(NULL, block, sp_proj, *mem, SPARC_MIN_STACKSIZE);
532 sp_proj = new_r_Proj(save, sp->reg_class->mode, pn_sparc_Save_stack);
533 *mem = new_r_Proj(save, mode_M, pn_sparc_Save_mem);
535 arch_set_irn_register(sp_proj, sp);
536 be_abi_reg_map_set(reg_map, sp, sp_proj);
538 // we always have a framepointer
542 /* Build the epilog */
543 static void sparc_abi_epilogue(void *self, ir_node *bl, ir_node **mem,
552 static const be_abi_callbacks_t sparc_abi_callbacks = {
555 sparc_get_between_type,
560 static const arch_register_t *gp_param_out_regs[] = {
561 &sparc_gp_regs[REG_O0],
562 &sparc_gp_regs[REG_O1],
563 &sparc_gp_regs[REG_O2],
564 &sparc_gp_regs[REG_O3],
565 &sparc_gp_regs[REG_O4],
566 &sparc_gp_regs[REG_O5],
569 static const arch_register_t *gp_param_in_regs[] = {
570 &sparc_gp_regs[REG_I0],
571 &sparc_gp_regs[REG_I1],
572 &sparc_gp_regs[REG_I2],
573 &sparc_gp_regs[REG_I3],
574 &sparc_gp_regs[REG_I4],
575 &sparc_gp_regs[REG_I5],
579 * get register for outgoing parameters 1-6
581 static const arch_register_t *sparc_get_RegParamOut_reg(int n)
583 assert(n < 6 && n >=0 && "trying to get (out) register for param >= 6");
584 return gp_param_out_regs[n];
588 * get register for incoming parameters 1-6
590 static const arch_register_t *sparc_get_RegParamIn_reg(int n)
592 assert(n < 6 && n >=0 && "trying to get (in) register for param >= 6");
593 return gp_param_in_regs[n];
597 * Get the ABI restrictions for procedure calls.
598 * @param self The this pointer.
599 * @param method_type The type of the method (procedure) in question.
600 * @param abi The abi object to be modified
602 static void sparc_get_call_abi(const void *self, ir_type *method_type,
607 int i, n = get_method_n_params(method_type);
608 be_abi_call_flags_t call_flags;
611 /* set abi flags for calls */
612 call_flags.bits.left_to_right = 0;
613 call_flags.bits.store_args_sequential = 1;
614 call_flags.bits.try_omit_fp = 0;
615 call_flags.bits.fp_free = 0;
616 call_flags.bits.call_has_imm = 1;
618 /* set stack parameter passing style */
619 be_abi_call_set_flags(abi, call_flags, &sparc_abi_callbacks);
621 for (i = 0; i < n; i++) {
622 ir_type *type = get_method_param_type(method_type, i);
623 ir_mode *mode = get_type_mode(type);
625 if (mode_is_float(mode) || i >= 6) {
626 unsigned align = get_type_size_bytes(type);
627 be_abi_call_param_stack(abi, i, mode, align, 0, 0,
632 /* pass integer params 0-5 via registers.
633 * On sparc we need to set the ABI context since register names of
634 * parameters change to i0-i5 if we are the callee */
635 be_abi_call_param_reg(abi, i, sparc_get_RegParamOut_reg(i),
637 be_abi_call_param_reg(abi, i, sparc_get_RegParamIn_reg(i),
641 n = get_method_n_ress(method_type);
642 /* more than 1 result not supported */
644 for (i = 0; i < n; ++i) {
645 tp = get_method_res_type(method_type, i);
646 mode = get_type_mode(tp);
648 /* set return value register: return value is in i0 resp. f0 */
649 if (mode_is_float(mode)) {
650 be_abi_call_res_reg(abi, i, &sparc_fp_regs[REG_F0],
653 be_abi_call_res_reg(abi, i, &sparc_gp_regs[REG_I0],
655 be_abi_call_res_reg(abi, i, &sparc_gp_regs[REG_O0],
661 static int sparc_to_appear_in_schedule(void *block_env, const ir_node *irn)
665 if (!is_sparc_irn(irn))
672 * Initializes the code generator interface.
674 static const arch_code_generator_if_t *sparc_get_code_generator_if(
678 return &sparc_code_gen_if;
681 list_sched_selector_t sparc_sched_selector;
684 * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
686 static const list_sched_selector_t *sparc_get_list_sched_selector(
687 const void *self, list_sched_selector_t *selector)
692 sparc_sched_selector = trivial_selector;
693 sparc_sched_selector.to_appear_in_schedule = sparc_to_appear_in_schedule;
694 return &sparc_sched_selector;
697 static const ilp_sched_selector_t *sparc_get_ilp_sched_selector(
705 * Returns the necessary byte alignment for storing a register of given class.
707 static int sparc_get_reg_class_alignment(const arch_register_class_t *cls)
709 ir_mode *mode = arch_register_class_mode(cls);
710 return get_mode_size_bytes(mode);
714 * Returns the libFirm configuration parameter for this backend.
716 static const backend_params *sparc_get_backend_params(void)
718 static backend_params p = {
719 0, /* no dword lowering */
720 0, /* no inline assembly */
721 NULL, /* will be set later */
722 NULL, /* no creator function */
723 NULL, /* context for create_intrinsic_fkt */
724 NULL, /* parameter for if conversion */
725 NULL, /* float arithmetic mode */
726 0, /* no trampoline support: size 0 */
727 0, /* no trampoline support: align 0 */
728 NULL, /* no trampoline support: no trampoline builder */
729 4 /* alignment of stack parameter: typically 4 (32bit) or 8 (64bit) */
734 static const be_execution_unit_t ***sparc_get_allowed_execution_units(
739 panic("sparc_get_allowed_execution_units not implemented yet");
742 static const be_machine_t *sparc_get_machine(const void *self)
746 panic("sparc_get_machine not implemented yet");
749 static ir_graph **sparc_get_backend_irg_list(const void *self,
757 static asm_constraint_flags_t sparc_parse_asm_constraint(const char **c)
760 return ASM_CONSTRAINT_FLAG_INVALID;
763 static int sparc_is_valid_clobber(const char *clobber)
769 const arch_isa_if_t sparc_isa_if = {
772 NULL, /* handle intrinsics */
773 sparc_get_n_reg_class,
775 sparc_get_reg_class_for_mode,
777 sparc_get_code_generator_if,
778 sparc_get_list_sched_selector,
779 sparc_get_ilp_sched_selector,
780 sparc_get_reg_class_alignment,
781 sparc_get_backend_params,
782 sparc_get_allowed_execution_units,
784 sparc_get_backend_irg_list,
785 NULL, /* mark remat */
786 sparc_parse_asm_constraint,
787 sparc_is_valid_clobber
790 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_sparc);
791 void be_init_arch_sparc(void)
793 be_register_isa_if("sparc", &sparc_isa_if);
794 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.cg");
795 sparc_init_transform();
796 sparc_init_emitter();