2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The main sparc backend driver file.
28 #include "lc_opts_enum.h"
36 #include "iroptimize.h"
46 #include "../bearch.h"
47 #include "../benode.h"
48 #include "../belower.h"
49 #include "../besched.h"
51 #include "../bemachine.h"
52 #include "../beilpsched.h"
53 #include "../bemodule.h"
55 #include "../bespillslots.h"
56 #include "../begnuas.h"
57 #include "../belistsched.h"
58 #include "../beflags.h"
60 #include "bearch_sparc_t.h"
62 #include "sparc_new_nodes.h"
63 #include "gen_sparc_regalloc_if.h"
64 #include "sparc_transform.h"
65 #include "sparc_emitter.h"
67 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
69 static arch_irn_class_t sparc_classify(const ir_node *node)
75 static ir_entity *sparc_get_frame_entity(const ir_node *node)
77 if (is_sparc_FrameAddr(node)) {
78 const sparc_attr_t *attr = get_sparc_attr_const(node);
79 return attr->immediate_value_entity;
82 if (sparc_has_load_store_attr(node)) {
83 const sparc_load_store_attr_t *load_store_attr
84 = get_sparc_load_store_attr_const(node);
85 if (load_store_attr->is_frame_entity) {
86 return load_store_attr->base.immediate_value_entity;
94 * This function is called by the generic backend to correct offsets for
95 * nodes accessing the stack.
97 static void sparc_set_frame_offset(ir_node *node, int offset)
99 sparc_attr_t *attr = get_sparc_attr(node);
100 attr->immediate_value += offset;
102 /* must be a FrameAddr or a load/store node with frame_entity */
103 assert(is_sparc_FrameAddr(node) ||
104 get_sparc_load_store_attr_const(node)->is_frame_entity);
107 static int sparc_get_sp_bias(const ir_node *node)
109 if (is_sparc_Save(node)) {
110 const sparc_save_attr_t *attr = get_sparc_save_attr_const(node);
111 /* Note we do not retport the change of the SPARC_MIN_STACKSIZE
112 * size, since we have additional magic in the emitter which
113 * calculates that! */
114 assert(attr->initial_stacksize >= SPARC_MIN_STACKSIZE);
115 return attr->initial_stacksize - SPARC_MIN_STACKSIZE;
120 /* fill register allocator interface */
122 static const arch_irn_ops_t sparc_irn_ops = {
124 sparc_get_frame_entity,
125 sparc_set_frame_offset,
127 NULL, /* get_inverse */
128 NULL, /* get_op_estimated_cost */
129 NULL, /* possible_memory_operand */
130 NULL, /* perform_memory_operand */
134 * Transforms the standard firm graph into
137 static void sparc_prepare_graph(void *self)
139 sparc_code_gen_t *cg = self;
141 /* transform FIRM into SPARC asm nodes */
142 sparc_transform_graph(cg);
145 dump_ir_graph(cg->irg, "transformed");
148 static bool sparc_modifies_flags(const ir_node *node)
150 return arch_irn_get_flags(node) & sparc_arch_irn_flag_modifies_flags;
153 static bool sparc_modifies_fp_flags(const ir_node *node)
155 return arch_irn_get_flags(node) & sparc_arch_irn_flag_modifies_fp_flags;
158 static void sparc_before_ra(void *self)
160 sparc_code_gen_t *cg = self;
161 /* fixup flags register */
162 be_sched_fix_flags(cg->irg, &sparc_reg_classes[CLASS_sparc_flags_class],
163 NULL, sparc_modifies_flags);
164 be_sched_fix_flags(cg->irg, &sparc_reg_classes[CLASS_sparc_fpflags_class],
165 NULL, sparc_modifies_fp_flags);
169 * transform reload node => load
171 static void transform_Reload(ir_node *node)
173 ir_node *block = get_nodes_block(node);
174 dbg_info *dbgi = get_irn_dbg_info(node);
175 ir_node *ptr = get_irn_n(node, be_pos_Spill_frame);
176 ir_node *mem = get_irn_n(node, be_pos_Reload_mem);
177 ir_mode *mode = get_irn_mode(node);
178 ir_entity *entity = be_get_frame_entity(node);
179 const arch_register_t *reg;
183 ir_node *sched_point = sched_prev(node);
185 load = new_bd_sparc_Ld_imm(dbgi, block, ptr, mem, mode, entity, 0, true);
186 sched_add_after(sched_point, load);
189 proj = new_rd_Proj(dbgi, load, mode, pn_sparc_Ld_res);
191 reg = arch_get_irn_register(node);
192 arch_set_irn_register(proj, reg);
194 exchange(node, proj);
198 * transform spill node => store
200 static void transform_Spill(ir_node *node)
202 ir_node *block = get_nodes_block(node);
203 dbg_info *dbgi = get_irn_dbg_info(node);
204 ir_node *ptr = get_irn_n(node, be_pos_Spill_frame);
205 ir_node *mem = new_NoMem();
206 ir_node *val = get_irn_n(node, be_pos_Spill_val);
207 ir_mode *mode = get_irn_mode(val);
208 ir_entity *entity = be_get_frame_entity(node);
209 ir_node *sched_point;
212 sched_point = sched_prev(node);
213 store = new_bd_sparc_St_imm(dbgi, block, val, ptr, mem, mode, entity, 0, true);
215 sched_add_after(sched_point, store);
217 exchange(node, store);
221 * walker to transform be_Spill and be_Reload nodes
223 static void sparc_after_ra_walker(ir_node *block, void *data)
225 ir_node *node, *prev;
228 for (node = sched_last(block); !sched_is_begin(node); node = prev) {
229 prev = sched_prev(node);
231 if (be_is_Reload(node)) {
232 transform_Reload(node);
233 } else if (be_is_Spill(node)) {
234 transform_Spill(node);
239 static void sparc_collect_frame_entity_nodes(ir_node *node, void *data)
241 be_fec_env_t *env = data;
245 const sparc_load_store_attr_t *attr;
247 if (be_is_Reload(node) && be_get_frame_entity(node) == NULL) {
248 mode = get_irn_mode(node);
249 align = get_mode_size_bytes(mode);
250 be_node_needs_frame_entity(env, node, mode, align);
254 if (!is_sparc_Ld(node) && !is_sparc_Ldf(node))
257 attr = get_sparc_load_store_attr_const(node);
258 entity = attr->base.immediate_value_entity;
259 mode = attr->load_store_mode;
262 if (!attr->is_frame_entity)
264 if (arch_irn_get_flags(node) & sparc_arch_irn_flag_needs_64bit_spillslot)
266 align = get_mode_size_bytes(mode);
267 be_node_needs_frame_entity(env, node, mode, align);
270 static void sparc_set_frame_entity(ir_node *node, ir_entity *entity)
272 if (is_be_node(node)) {
273 be_node_set_frame_entity(node, entity);
275 /* we only say be_node_needs_frame_entity on nodes with load_store
276 * attributes, so this should be fine */
277 sparc_load_store_attr_t *attr = get_sparc_load_store_attr(node);
278 assert(attr->is_frame_entity);
279 assert(attr->base.immediate_value_entity == NULL);
280 attr->base.immediate_value_entity = entity;
284 static void sparc_after_ra(void *self)
286 sparc_code_gen_t *cg = self;
287 ir_graph *irg = cg->irg;
288 be_fec_env_t *fec_env = be_new_frame_entity_coalescer(irg);
290 irg_walk_graph(irg, NULL, sparc_collect_frame_entity_nodes, fec_env);
291 be_assign_entities(fec_env, sparc_set_frame_entity);
292 be_free_frame_entity_coalescer(fec_env);
294 irg_block_walk_graph(cg->irg, NULL, sparc_after_ra_walker, NULL);
298 * Emits the code, closes the output file and frees
299 * the code generator interface.
301 static void sparc_emit_and_done(void *self)
303 sparc_code_gen_t *cg = self;
304 ir_graph *irg = cg->irg;
306 sparc_emit_routine(irg);
308 /* de-allocate code generator */
312 static void *sparc_cg_init(ir_graph *irg);
314 static const arch_code_generator_if_t sparc_code_gen_if = {
316 NULL, /* get_pic_base hook */
317 NULL, /* before abi introduce hook */
319 NULL, /* spill hook */
320 sparc_before_ra, /* before register allocation hook */
321 sparc_after_ra, /* after register allocation hook */
327 * Initializes the code generator.
329 static void *sparc_cg_init(ir_graph *irg)
331 sparc_isa_t *isa = (sparc_isa_t *) be_get_irg_arch_env(irg);
332 sparc_code_gen_t *cg = XMALLOCZ(sparc_code_gen_t);
334 cg->impl = &sparc_code_gen_if;
337 cg->dump = (be_get_irg_options(irg)->dump_flags & DUMP_BE) != 0;
338 cg->constants = pmap_create();
340 /* enter the current code generator */
343 return (arch_code_generator_t*) cg;
346 const arch_isa_if_t sparc_isa_if;
347 static sparc_isa_t sparc_isa_template = {
349 &sparc_isa_if, /* isa interface implementation */
350 &sparc_gp_regs[REG_SP], /* stack pointer register */
351 &sparc_gp_regs[REG_FRAME_POINTER], /* base pointer register */
352 &sparc_reg_classes[CLASS_sparc_gp], /* link pointer register class */
353 -1, /* stack direction */
354 3, /* power of two stack alignment
356 NULL, /* main environment */
357 7, /* costs for a spill instruction */
358 5, /* costs for a reload instruction */
359 true, /* custom abi handling */
361 NULL /* current code generator */
364 static void sparc_handle_intrinsics(void)
366 ir_type *tp, *int_tp, *uint_tp;
370 runtime_rt rt_iMod, rt_uMod;
372 #define ID(x) new_id_from_chars(x, sizeof(x)-1)
374 int_tp = new_type_primitive(mode_Is);
375 uint_tp = new_type_primitive(mode_Iu);
378 /* SPARC has no signed mod instruction ... */
380 i_instr_record *map_Mod = &records[n_records++].i_instr;
382 tp = new_type_method(2, 1);
383 set_method_param_type(tp, 0, int_tp);
384 set_method_param_type(tp, 1, int_tp);
385 set_method_res_type(tp, 0, int_tp);
387 rt_iMod.ent = new_entity(get_glob_type(), ID(".rem"), tp);
388 set_entity_ld_ident(rt_iMod.ent, ID(".rem"));
389 rt_iMod.mode = mode_T;
390 rt_iMod.res_mode = mode_Is;
391 rt_iMod.mem_proj_nr = pn_Mod_M;
392 rt_iMod.regular_proj_nr = pn_Mod_X_regular;
393 rt_iMod.exc_proj_nr = pn_Mod_X_except;
394 rt_iMod.exc_mem_proj_nr = pn_Mod_M;
395 rt_iMod.res_proj_nr = pn_Mod_res;
397 set_entity_visibility(rt_iMod.ent, ir_visibility_external);
399 map_Mod->kind = INTRINSIC_INSTR;
400 map_Mod->op = op_Mod;
401 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
402 map_Mod->ctx = &rt_iMod;
404 /* ... nor an unsigned mod. */
406 i_instr_record *map_Mod = &records[n_records++].i_instr;
408 tp = new_type_method(2, 1);
409 set_method_param_type(tp, 0, uint_tp);
410 set_method_param_type(tp, 1, uint_tp);
411 set_method_res_type(tp, 0, uint_tp);
413 rt_uMod.ent = new_entity(get_glob_type(), ID(".urem"), tp);
414 set_entity_ld_ident(rt_uMod.ent, ID(".urem"));
415 rt_uMod.mode = mode_T;
416 rt_uMod.res_mode = mode_Iu;
417 rt_uMod.mem_proj_nr = pn_Mod_M;
418 rt_uMod.regular_proj_nr = pn_Mod_X_regular;
419 rt_uMod.exc_proj_nr = pn_Mod_X_except;
420 rt_uMod.exc_mem_proj_nr = pn_Mod_M;
421 rt_uMod.res_proj_nr = pn_Mod_res;
423 set_entity_visibility(rt_uMod.ent, ir_visibility_external);
425 map_Mod->kind = INTRINSIC_INSTR;
426 map_Mod->op = op_Mod;
427 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
428 map_Mod->ctx = &rt_uMod;
432 lower_intrinsics(records, n_records, /*part_block_used=*/0);
436 * Initializes the backend ISA
438 static arch_env_t *sparc_init(FILE *outfile)
440 static int run_once = 0;
447 isa = XMALLOC(sparc_isa_t);
448 memcpy(isa, &sparc_isa_template, sizeof(*isa));
450 be_emit_init(outfile);
452 sparc_register_init();
453 sparc_create_opcodes(&sparc_irn_ops);
454 sparc_handle_intrinsics();
460 * Closes the output file and frees the ISA structure.
462 static void sparc_done(void *self)
464 sparc_isa_t *isa = self;
466 /* emit now all global declarations */
467 be_gas_emit_decls(isa->base.main_env);
473 static unsigned sparc_get_n_reg_class(void)
478 static const arch_register_class_t *sparc_get_reg_class(unsigned i)
480 assert(i < N_CLASSES);
481 return &sparc_reg_classes[i];
487 * Get the register class which shall be used to store a value of a given mode.
488 * @param self The this pointer.
489 * @param mode The mode in question.
490 * @return A register class which can hold values of the given mode.
492 static const arch_register_class_t *sparc_get_reg_class_for_mode(const ir_mode *mode)
494 if (mode_is_float(mode))
495 return &sparc_reg_classes[CLASS_sparc_fp];
497 return &sparc_reg_classes[CLASS_sparc_gp];
500 static int sparc_to_appear_in_schedule(void *block_env, const ir_node *irn)
504 if (!is_sparc_irn(irn))
511 * Initializes the code generator interface.
513 static const arch_code_generator_if_t *sparc_get_code_generator_if(
517 return &sparc_code_gen_if;
520 list_sched_selector_t sparc_sched_selector;
523 * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
525 static const list_sched_selector_t *sparc_get_list_sched_selector(
526 const void *self, list_sched_selector_t *selector)
531 sparc_sched_selector = trivial_selector;
532 sparc_sched_selector.to_appear_in_schedule = sparc_to_appear_in_schedule;
533 return &sparc_sched_selector;
536 static const ilp_sched_selector_t *sparc_get_ilp_sched_selector(
544 * Returns the necessary byte alignment for storing a register of given class.
546 static int sparc_get_reg_class_alignment(const arch_register_class_t *cls)
548 ir_mode *mode = arch_register_class_mode(cls);
549 return get_mode_size_bytes(mode);
552 static void sparc_lower_for_target(void)
555 int n_irgs = get_irp_n_irgs();
557 /* TODO, doubleword lowering and others */
559 for (i = 0; i < n_irgs; ++i) {
560 ir_graph *irg = get_irp_irg(i);
561 lower_switch(irg, 128);
566 * Returns the libFirm configuration parameter for this backend.
568 static const backend_params *sparc_get_backend_params(void)
570 static const ir_settings_arch_dep_t arch_dep = {
571 1, /* also_use_subs */
572 1, /* maximum_shifts */
573 31, /* highest_shift_amount */
574 NULL, /* evaluate_cost_func */
577 32, /* max_bits_for_mulh */
579 static backend_params p = {
580 0, /* no inline assembly */
581 0, /* no support for RotL nodes */
583 sparc_lower_for_target, /* lowering callback */
584 &arch_dep, /* will be set later */
585 NULL, /* parameter for if conversion */
586 NULL, /* float arithmetic mode */
587 0, /* no trampoline support: size 0 */
588 0, /* no trampoline support: align 0 */
589 NULL, /* no trampoline support: no trampoline builder */
590 4 /* alignment of stack parameter: typically 4 (32bit) or 8 (64bit) */
595 static const be_execution_unit_t ***sparc_get_allowed_execution_units(
600 panic("sparc_get_allowed_execution_units not implemented yet");
603 static const be_machine_t *sparc_get_machine(const void *self)
607 panic("sparc_get_machine not implemented yet");
610 static ir_graph **sparc_get_backend_irg_list(const void *self,
618 static asm_constraint_flags_t sparc_parse_asm_constraint(const char **c)
621 return ASM_CONSTRAINT_FLAG_INVALID;
624 static int sparc_is_valid_clobber(const char *clobber)
630 const arch_isa_if_t sparc_isa_if = {
633 NULL, /* handle intrinsics */
634 sparc_get_n_reg_class,
636 sparc_get_reg_class_for_mode,
638 sparc_get_code_generator_if,
639 sparc_get_list_sched_selector,
640 sparc_get_ilp_sched_selector,
641 sparc_get_reg_class_alignment,
642 sparc_get_backend_params,
643 sparc_get_allowed_execution_units,
645 sparc_get_backend_irg_list,
646 NULL, /* mark remat */
647 sparc_parse_asm_constraint,
648 sparc_is_valid_clobber
651 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_sparc);
652 void be_init_arch_sparc(void)
654 be_register_isa_if("sparc", &sparc_isa_if);
655 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.cg");
656 sparc_init_transform();
657 sparc_init_emitter();