2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The main sparc backend driver file.
28 #include "lc_opts_enum.h"
36 #include "iroptimize.h"
47 #include "../bearch.h"
48 #include "../benode.h"
49 #include "../belower.h"
50 #include "../besched.h"
52 #include "../bemachine.h"
53 #include "../bemodule.h"
55 #include "../bespillslots.h"
56 #include "../begnuas.h"
57 #include "../belistsched.h"
58 #include "../beflags.h"
60 #include "bearch_sparc_t.h"
62 #include "sparc_new_nodes.h"
63 #include "gen_sparc_regalloc_if.h"
64 #include "sparc_transform.h"
65 #include "sparc_emitter.h"
67 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
69 static arch_irn_class_t sparc_classify(const ir_node *node)
72 return arch_irn_class_none;
75 static ir_entity *sparc_get_frame_entity(const ir_node *node)
77 if (is_sparc_FrameAddr(node)) {
78 const sparc_attr_t *attr = get_sparc_attr_const(node);
79 return attr->immediate_value_entity;
82 if (sparc_has_load_store_attr(node)) {
83 const sparc_load_store_attr_t *load_store_attr
84 = get_sparc_load_store_attr_const(node);
85 if (load_store_attr->is_frame_entity) {
86 return load_store_attr->base.immediate_value_entity;
94 * This function is called by the generic backend to correct offsets for
95 * nodes accessing the stack.
97 static void sparc_set_frame_offset(ir_node *node, int offset)
99 sparc_attr_t *attr = get_sparc_attr(node);
100 attr->immediate_value += offset;
102 /* must be a FrameAddr or a load/store node with frame_entity */
103 assert(is_sparc_FrameAddr(node) ||
104 get_sparc_load_store_attr_const(node)->is_frame_entity);
107 static int sparc_get_sp_bias(const ir_node *node)
109 if (is_sparc_Save(node)) {
110 const sparc_attr_t *attr = get_sparc_attr_const(node);
111 if (get_irn_arity(node) == 3)
112 panic("no support for _reg variant yet");
114 /* Note we do not report the change of the SPARC_MIN_STACKSIZE
115 * size, since we have additional magic in the emitter which
116 * calculates that! */
117 assert(attr->immediate_value <= -SPARC_MIN_STACKSIZE);
118 return attr->immediate_value + SPARC_MIN_STACKSIZE;
123 /* fill register allocator interface */
125 static const arch_irn_ops_t sparc_irn_ops = {
127 sparc_get_frame_entity,
128 sparc_set_frame_offset,
130 NULL, /* get_inverse */
131 NULL, /* get_op_estimated_cost */
132 NULL, /* possible_memory_operand */
133 NULL, /* perform_memory_operand */
137 * Transforms the standard firm graph into
140 static void sparc_prepare_graph(ir_graph *irg)
142 sparc_transform_graph(irg);
145 static bool sparc_modifies_flags(const ir_node *node)
147 return arch_irn_get_flags(node) & sparc_arch_irn_flag_modifies_flags;
150 static bool sparc_modifies_fp_flags(const ir_node *node)
152 return arch_irn_get_flags(node) & sparc_arch_irn_flag_modifies_fp_flags;
155 static void sparc_before_ra(ir_graph *irg)
157 /* fixup flags register */
158 be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_flags_class],
159 NULL, sparc_modifies_flags);
160 be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_fpflags_class],
161 NULL, sparc_modifies_fp_flags);
165 * transform reload node => load
167 static void transform_Reload(ir_node *node)
169 ir_node *block = get_nodes_block(node);
170 dbg_info *dbgi = get_irn_dbg_info(node);
171 ir_node *ptr = get_irn_n(node, be_pos_Spill_frame);
172 ir_node *mem = get_irn_n(node, be_pos_Reload_mem);
173 ir_mode *mode = get_irn_mode(node);
174 ir_entity *entity = be_get_frame_entity(node);
175 const arch_register_t *reg;
179 ir_node *sched_point = sched_prev(node);
181 load = new_bd_sparc_Ld_imm(dbgi, block, ptr, mem, mode, entity, 0, true);
182 sched_add_after(sched_point, load);
185 proj = new_rd_Proj(dbgi, load, mode, pn_sparc_Ld_res);
187 reg = arch_get_irn_register(node);
188 arch_set_irn_register(proj, reg);
190 exchange(node, proj);
194 * transform spill node => store
196 static void transform_Spill(ir_node *node)
198 ir_node *block = get_nodes_block(node);
199 dbg_info *dbgi = get_irn_dbg_info(node);
200 ir_node *ptr = get_irn_n(node, be_pos_Spill_frame);
201 ir_graph *irg = get_irn_irg(node);
202 ir_node *mem = new_r_NoMem(irg);
203 ir_node *val = get_irn_n(node, be_pos_Spill_val);
204 ir_mode *mode = get_irn_mode(val);
205 ir_entity *entity = be_get_frame_entity(node);
206 ir_node *sched_point;
209 sched_point = sched_prev(node);
210 store = new_bd_sparc_St_imm(dbgi, block, val, ptr, mem, mode, entity, 0, true);
212 sched_add_after(sched_point, store);
214 exchange(node, store);
218 * walker to transform be_Spill and be_Reload nodes
220 static void sparc_after_ra_walker(ir_node *block, void *data)
222 ir_node *node, *prev;
225 for (node = sched_last(block); !sched_is_begin(node); node = prev) {
226 prev = sched_prev(node);
228 if (be_is_Reload(node)) {
229 transform_Reload(node);
230 } else if (be_is_Spill(node)) {
231 transform_Spill(node);
236 static void sparc_collect_frame_entity_nodes(ir_node *node, void *data)
238 be_fec_env_t *env = (be_fec_env_t*)data;
242 const sparc_load_store_attr_t *attr;
244 if (be_is_Reload(node) && be_get_frame_entity(node) == NULL) {
245 mode = get_irn_mode(node);
246 align = get_mode_size_bytes(mode);
247 be_node_needs_frame_entity(env, node, mode, align);
251 if (!is_sparc_Ld(node) && !is_sparc_Ldf(node))
254 attr = get_sparc_load_store_attr_const(node);
255 entity = attr->base.immediate_value_entity;
256 mode = attr->load_store_mode;
259 if (!attr->is_frame_entity)
261 if (arch_irn_get_flags(node) & sparc_arch_irn_flag_needs_64bit_spillslot)
263 align = get_mode_size_bytes(mode);
264 be_node_needs_frame_entity(env, node, mode, align);
267 static void sparc_set_frame_entity(ir_node *node, ir_entity *entity)
269 if (is_be_node(node)) {
270 be_node_set_frame_entity(node, entity);
272 /* we only say be_node_needs_frame_entity on nodes with load_store
273 * attributes, so this should be fine */
274 sparc_load_store_attr_t *attr = get_sparc_load_store_attr(node);
275 assert(attr->is_frame_entity);
276 assert(attr->base.immediate_value_entity == NULL);
277 attr->base.immediate_value_entity = entity;
281 static void sparc_after_ra(ir_graph *irg)
283 be_fec_env_t *fec_env = be_new_frame_entity_coalescer(irg);
285 irg_walk_graph(irg, NULL, sparc_collect_frame_entity_nodes, fec_env);
286 be_assign_entities(fec_env, sparc_set_frame_entity);
287 be_free_frame_entity_coalescer(fec_env);
289 irg_block_walk_graph(irg, NULL, sparc_after_ra_walker, NULL);
292 static void sparc_init_graph(ir_graph *irg)
297 extern const arch_isa_if_t sparc_isa_if;
298 static sparc_isa_t sparc_isa_template = {
300 &sparc_isa_if, /* isa interface implementation */
305 &sparc_registers[REG_SP], /* stack pointer register */
306 &sparc_registers[REG_FRAME_POINTER],/* base pointer register */
307 &sparc_reg_classes[CLASS_sparc_gp], /* link pointer register class */
308 -1, /* stack direction */
309 3, /* power of two stack alignment
311 NULL, /* main environment */
312 7, /* costs for a spill instruction */
313 5, /* costs for a reload instruction */
314 true, /* custom abi handling */
316 NULL, /* constants */
320 * rewrite unsigned->float conversion.
321 * Sparc has no instruction for this so instead we do the following:
323 * int signed_x = unsigned_value_x;
324 * double res = signed_x;
326 * res += 4294967296. ;
327 * return (float) res;
329 static void rewrite_unsigned_float_Conv(ir_node *node)
331 ir_graph *irg = get_irn_irg(node);
332 dbg_info *dbgi = get_irn_dbg_info(node);
333 ir_node *lower_block = get_nodes_block(node);
338 ir_node *block = get_nodes_block(node);
339 ir_node *unsigned_x = get_Conv_op(node);
340 ir_mode *mode_u = get_irn_mode(unsigned_x);
341 ir_mode *mode_s = find_signed_mode(mode_u);
342 ir_mode *mode_d = mode_D;
343 ir_node *signed_x = new_rd_Conv(dbgi, block, unsigned_x, mode_s);
344 ir_node *res = new_rd_Conv(dbgi, block, signed_x, mode_d);
345 ir_node *zero = new_r_Const(irg, get_mode_null(mode_s));
346 ir_node *cmp = new_rd_Cmp(dbgi, block, signed_x, zero);
347 ir_node *proj_lt = new_r_Proj(cmp, mode_b, pn_Cmp_Lt);
348 ir_node *cond = new_rd_Cond(dbgi, block, proj_lt);
349 ir_node *proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
350 ir_node *proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
351 ir_node *in_true[1] = { proj_true };
352 ir_node *in_false[1] = { proj_false };
353 ir_node *true_block = new_r_Block(irg, ARRAY_SIZE(in_true), in_true);
354 ir_node *false_block = new_r_Block(irg, ARRAY_SIZE(in_false),in_false);
355 ir_node *true_jmp = new_r_Jmp(true_block);
356 ir_node *false_jmp = new_r_Jmp(false_block);
357 ir_tarval *correction = new_tarval_from_double(4294967296., mode_d);
358 ir_node *c_const = new_r_Const(irg, correction);
359 ir_node *fadd = new_rd_Add(dbgi, true_block, res, c_const,
362 ir_node *lower_in[2] = { true_jmp, false_jmp };
363 ir_node *phi_in[2] = { fadd, res };
364 ir_mode *dest_mode = get_irn_mode(node);
368 set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
369 phi = new_r_Phi(lower_block, ARRAY_SIZE(phi_in), phi_in, mode_d);
370 assert(get_Block_phis(lower_block) == NULL);
371 set_Block_phis(lower_block, phi);
372 set_Phi_next(phi, NULL);
374 res_conv = new_rd_Conv(dbgi, lower_block, phi, dest_mode);
376 exchange(node, res_conv);
380 static int sparc_rewrite_Conv(ir_node *node, void *ctx)
382 ir_mode *to_mode = get_irn_mode(node);
383 ir_node *op = get_Conv_op(node);
384 ir_mode *from_mode = get_irn_mode(op);
387 if (mode_is_float(to_mode) && mode_is_int(from_mode)
388 && get_mode_size_bits(from_mode) == 32
389 && !mode_is_signed(from_mode)) {
390 rewrite_unsigned_float_Conv(node);
397 static void sparc_handle_intrinsics(void)
399 ir_type *tp, *int_tp, *uint_tp;
401 size_t n_records = 0;
403 runtime_rt rt_iMod, rt_uMod;
405 #define ID(x) new_id_from_chars(x, sizeof(x)-1)
407 int_tp = new_type_primitive(mode_Is);
408 uint_tp = new_type_primitive(mode_Iu);
410 /* we need to rewrite some forms of int->float conversions */
412 i_instr_record *map_Conv = &records[n_records++].i_instr;
414 map_Conv->kind = INTRINSIC_INSTR;
415 map_Conv->op = op_Conv;
416 map_Conv->i_mapper = sparc_rewrite_Conv;
418 /* SPARC has no signed mod instruction ... */
420 i_instr_record *map_Mod = &records[n_records++].i_instr;
422 tp = new_type_method(2, 1);
423 set_method_param_type(tp, 0, int_tp);
424 set_method_param_type(tp, 1, int_tp);
425 set_method_res_type(tp, 0, int_tp);
427 rt_iMod.ent = new_entity(get_glob_type(), ID(".rem"), tp);
428 set_entity_ld_ident(rt_iMod.ent, ID(".rem"));
429 rt_iMod.mode = mode_T;
430 rt_iMod.res_mode = mode_Is;
431 rt_iMod.mem_proj_nr = pn_Mod_M;
432 rt_iMod.regular_proj_nr = pn_Mod_X_regular;
433 rt_iMod.exc_proj_nr = pn_Mod_X_except;
434 rt_iMod.exc_mem_proj_nr = pn_Mod_M;
435 rt_iMod.res_proj_nr = pn_Mod_res;
437 set_entity_visibility(rt_iMod.ent, ir_visibility_external);
439 map_Mod->kind = INTRINSIC_INSTR;
440 map_Mod->op = op_Mod;
441 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
442 map_Mod->ctx = &rt_iMod;
444 /* ... nor an unsigned mod. */
446 i_instr_record *map_Mod = &records[n_records++].i_instr;
448 tp = new_type_method(2, 1);
449 set_method_param_type(tp, 0, uint_tp);
450 set_method_param_type(tp, 1, uint_tp);
451 set_method_res_type(tp, 0, uint_tp);
453 rt_uMod.ent = new_entity(get_glob_type(), ID(".urem"), tp);
454 set_entity_ld_ident(rt_uMod.ent, ID(".urem"));
455 rt_uMod.mode = mode_T;
456 rt_uMod.res_mode = mode_Iu;
457 rt_uMod.mem_proj_nr = pn_Mod_M;
458 rt_uMod.regular_proj_nr = pn_Mod_X_regular;
459 rt_uMod.exc_proj_nr = pn_Mod_X_except;
460 rt_uMod.exc_mem_proj_nr = pn_Mod_M;
461 rt_uMod.res_proj_nr = pn_Mod_res;
463 set_entity_visibility(rt_uMod.ent, ir_visibility_external);
465 map_Mod->kind = INTRINSIC_INSTR;
466 map_Mod->op = op_Mod;
467 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
468 map_Mod->ctx = &rt_uMod;
471 assert(n_records < ARRAY_SIZE(records));
472 lower_intrinsics(records, n_records, /*part_block_used=*/ true);
476 * Initializes the backend ISA
478 static arch_env_t *sparc_init(FILE *outfile)
480 sparc_isa_t *isa = XMALLOC(sparc_isa_t);
481 memcpy(isa, &sparc_isa_template, sizeof(*isa));
482 isa->constants = pmap_create();
484 be_emit_init(outfile);
486 sparc_register_init();
487 sparc_create_opcodes(&sparc_irn_ops);
488 sparc_handle_intrinsics();
494 * Closes the output file and frees the ISA structure.
496 static void sparc_done(void *self)
498 sparc_isa_t *isa = (sparc_isa_t*)self;
500 /* emit now all global declarations */
501 be_gas_emit_decls(isa->base.main_env);
503 pmap_destroy(isa->constants);
510 * Get the register class which shall be used to store a value of a given mode.
511 * @param self The this pointer.
512 * @param mode The mode in question.
513 * @return A register class which can hold values of the given mode.
515 static const arch_register_class_t *sparc_get_reg_class_for_mode(const ir_mode *mode)
517 if (mode_is_float(mode))
518 return &sparc_reg_classes[CLASS_sparc_fp];
520 return &sparc_reg_classes[CLASS_sparc_gp];
524 * Returns the necessary byte alignment for storing a register of given class.
526 static int sparc_get_reg_class_alignment(const arch_register_class_t *cls)
528 ir_mode *mode = arch_register_class_mode(cls);
529 return get_mode_size_bytes(mode);
532 static ir_node *sparc_create_set(ir_node *cond)
534 return ir_create_cond_set(cond, mode_Iu);
537 static void sparc_lower_for_target(void)
540 int n_irgs = get_irp_n_irgs();
541 lower_mode_b_config_t lower_mode_b_config = {
547 for (i = 0; i < n_irgs; ++i) {
548 ir_graph *irg = get_irp_irg(i);
549 ir_lower_mode_b(irg, &lower_mode_b_config);
550 lower_switch(irg, 256, false);
554 static int sparc_is_mux_allowed(ir_node *sel, ir_node *mux_false,
557 ir_graph *irg = get_irn_irg(sel);
558 ir_mode *mode = get_irn_mode(mux_true);
560 if (get_irg_phase_state(irg) == phase_low)
563 if (!mode_is_int(mode) && !mode_is_reference(mode) && mode != mode_b)
565 if (is_Const(mux_true) && is_Const_one(mux_true) &&
566 is_Const(mux_false) && is_Const_null(mux_false))
572 * Returns the libFirm configuration parameter for this backend.
574 static const backend_params *sparc_get_backend_params(void)
576 static const ir_settings_arch_dep_t arch_dep = {
577 1, /* also_use_subs */
578 1, /* maximum_shifts */
579 31, /* highest_shift_amount */
580 NULL, /* evaluate_cost_func */
583 32, /* max_bits_for_mulh */
585 static backend_params p = {
586 0, /* no inline assembly */
587 0, /* no support for RotL nodes */
589 sparc_lower_for_target, /* lowering callback */
590 &arch_dep, /* will be set later */
591 sparc_is_mux_allowed, /* parameter for if conversion */
592 NULL, /* float arithmetic mode */
593 0, /* no trampoline support: size 0 */
594 0, /* no trampoline support: align 0 */
595 NULL, /* no trampoline support: no trampoline builder */
596 4 /* alignment of stack parameter: typically 4 (32bit) or 8 (64bit) */
601 static ir_graph **sparc_get_backend_irg_list(const void *self,
609 static asm_constraint_flags_t sparc_parse_asm_constraint(const char **c)
612 return ASM_CONSTRAINT_FLAG_INVALID;
615 static int sparc_is_valid_clobber(const char *clobber)
621 const arch_isa_if_t sparc_isa_if = {
624 NULL, /* handle intrinsics */
625 sparc_get_reg_class_for_mode,
627 sparc_get_reg_class_alignment,
628 sparc_get_backend_params,
629 sparc_get_backend_irg_list,
630 NULL, /* mark remat */
631 sparc_parse_asm_constraint,
632 sparc_is_valid_clobber,
635 NULL, /* get_pic_base */
636 NULL, /* before_abi */
644 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_sparc);
645 void be_init_arch_sparc(void)
647 be_register_isa_if("sparc", &sparc_isa_if);
648 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.cg");
649 sparc_init_transform();
650 sparc_init_emitter();