2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The main sparc backend driver file.
23 * @author Hannes Rapp, Matthias Braun
29 #include "lc_opts_enum.h"
37 #include "iroptimize.h"
42 #include "lower_calls.h"
43 #include "lower_softfloat.h"
51 #include "../bearch.h"
52 #include "../benode.h"
53 #include "../belower.h"
54 #include "../besched.h"
56 #include "../bemachine.h"
57 #include "../bemodule.h"
59 #include "../begnuas.h"
60 #include "../belistsched.h"
61 #include "../beflags.h"
62 #include "../beutil.h"
64 #include "bearch_sparc_t.h"
66 #include "sparc_new_nodes.h"
67 #include "gen_sparc_regalloc_if.h"
68 #include "sparc_transform.h"
69 #include "sparc_emitter.h"
70 #include "sparc_cconv.h"
72 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
74 static arch_irn_class_t sparc_classify(const ir_node *node)
77 return arch_irn_class_none;
80 static ir_entity *sparc_get_frame_entity(const ir_node *node)
82 if (is_sparc_FrameAddr(node)) {
83 const sparc_attr_t *attr = get_sparc_attr_const(node);
84 return attr->immediate_value_entity;
87 if (sparc_has_load_store_attr(node)) {
88 const sparc_load_store_attr_t *load_store_attr
89 = get_sparc_load_store_attr_const(node);
90 if (load_store_attr->is_frame_entity) {
91 return load_store_attr->base.immediate_value_entity;
99 * This function is called by the generic backend to correct offsets for
100 * nodes accessing the stack.
102 static void sparc_set_frame_offset(ir_node *node, int offset)
104 sparc_attr_t *attr = get_sparc_attr(node);
105 attr->immediate_value += offset;
107 /* must be a FrameAddr or a load/store node with frame_entity */
108 assert(is_sparc_FrameAddr(node) ||
109 get_sparc_load_store_attr_const(node)->is_frame_entity);
112 static int sparc_get_sp_bias(const ir_node *node)
114 if (is_sparc_Save(node)) {
115 const sparc_attr_t *attr = get_sparc_attr_const(node);
116 if (get_irn_arity(node) == 3)
117 panic("no support for _reg variant yet");
119 return -attr->immediate_value;
120 } else if (is_sparc_RestoreZero(node)) {
121 return SP_BIAS_RESET;
126 /* fill register allocator interface */
128 const arch_irn_ops_t sparc_irn_ops = {
130 sparc_get_frame_entity,
131 sparc_set_frame_offset,
133 NULL, /* get_inverse */
134 NULL, /* get_op_estimated_cost */
135 NULL, /* possible_memory_operand */
136 NULL, /* perform_memory_operand */
140 * Transforms the standard firm graph into
143 static void sparc_prepare_graph(ir_graph *irg)
145 sparc_transform_graph(irg);
148 static bool sparc_modifies_flags(const ir_node *node)
150 return arch_get_irn_flags(node) & sparc_arch_irn_flag_modifies_flags;
153 static bool sparc_modifies_fp_flags(const ir_node *node)
155 return arch_get_irn_flags(node) & sparc_arch_irn_flag_modifies_fp_flags;
158 static void sparc_before_ra(ir_graph *irg)
160 /* fixup flags register */
161 be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_flags_class],
162 NULL, sparc_modifies_flags);
163 be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_fpflags_class],
164 NULL, sparc_modifies_fp_flags);
167 static void sparc_init_graph(ir_graph *irg)
172 extern const arch_isa_if_t sparc_isa_if;
173 static sparc_isa_t sparc_isa_template = {
175 &sparc_isa_if, /* isa interface implementation */
180 &sparc_registers[REG_SP], /* stack pointer register */
181 &sparc_registers[REG_FRAME_POINTER],/* base pointer register */
182 &sparc_reg_classes[CLASS_sparc_gp], /* link pointer register class */
183 3, /* power of two stack alignment
185 NULL, /* main environment */
186 7, /* costs for a spill instruction */
187 5, /* costs for a reload instruction */
188 true, /* custom abi handling */
190 NULL, /* constants */
191 SPARC_FPU_ARCH_FPU, /* FPU architecture */
195 * rewrite unsigned->float conversion.
196 * Sparc has no instruction for this so instead we do the following:
198 * int signed_x = unsigned_value_x;
199 * double res = signed_x;
201 * res += 4294967296. ;
202 * return (float) res;
204 static void rewrite_unsigned_float_Conv(ir_node *node)
206 ir_graph *irg = get_irn_irg(node);
207 dbg_info *dbgi = get_irn_dbg_info(node);
208 ir_node *lower_block = get_nodes_block(node);
213 ir_node *block = get_nodes_block(node);
214 ir_node *unsigned_x = get_Conv_op(node);
215 ir_mode *mode_u = get_irn_mode(unsigned_x);
216 ir_mode *mode_s = find_signed_mode(mode_u);
217 ir_mode *mode_d = mode_D;
218 ir_node *signed_x = new_rd_Conv(dbgi, block, unsigned_x, mode_s);
219 ir_node *res = new_rd_Conv(dbgi, block, signed_x, mode_d);
220 ir_node *zero = new_r_Const(irg, get_mode_null(mode_s));
221 ir_node *cmp = new_rd_Cmp(dbgi, block, signed_x, zero,
223 ir_node *cond = new_rd_Cond(dbgi, block, cmp);
224 ir_node *proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
225 ir_node *proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
226 ir_node *in_true[1] = { proj_true };
227 ir_node *in_false[1] = { proj_false };
228 ir_node *true_block = new_r_Block(irg, ARRAY_SIZE(in_true), in_true);
229 ir_node *false_block = new_r_Block(irg, ARRAY_SIZE(in_false),in_false);
230 ir_node *true_jmp = new_r_Jmp(true_block);
231 ir_node *false_jmp = new_r_Jmp(false_block);
232 ir_tarval *correction = new_tarval_from_double(4294967296., mode_d);
233 ir_node *c_const = new_r_Const(irg, correction);
234 ir_node *fadd = new_rd_Add(dbgi, true_block, res, c_const,
237 ir_node *lower_in[2] = { true_jmp, false_jmp };
238 ir_node *phi_in[2] = { fadd, res };
239 ir_mode *dest_mode = get_irn_mode(node);
243 set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
244 phi = new_r_Phi(lower_block, ARRAY_SIZE(phi_in), phi_in, mode_d);
245 assert(get_Block_phis(lower_block) == NULL);
246 set_Block_phis(lower_block, phi);
247 set_Phi_next(phi, NULL);
249 res_conv = new_rd_Conv(dbgi, lower_block, phi, dest_mode);
251 exchange(node, res_conv);
255 static int sparc_rewrite_Conv(ir_node *node, void *ctx)
257 ir_mode *to_mode = get_irn_mode(node);
258 ir_node *op = get_Conv_op(node);
259 ir_mode *from_mode = get_irn_mode(op);
262 if (mode_is_float(to_mode) && mode_is_int(from_mode)
263 && get_mode_size_bits(from_mode) == 32
264 && !mode_is_signed(from_mode)) {
265 rewrite_unsigned_float_Conv(node);
272 static void sparc_handle_intrinsics(void)
274 ir_type *tp, *int_tp, *uint_tp;
276 size_t n_records = 0;
278 runtime_rt rt_iMod, rt_uMod;
280 #define ID(x) new_id_from_chars(x, sizeof(x)-1)
282 int_tp = new_type_primitive(mode_Is);
283 uint_tp = new_type_primitive(mode_Iu);
285 /* we need to rewrite some forms of int->float conversions */
287 i_instr_record *map_Conv = &records[n_records++].i_instr;
289 map_Conv->kind = INTRINSIC_INSTR;
290 map_Conv->op = op_Conv;
291 map_Conv->i_mapper = sparc_rewrite_Conv;
293 /* SPARC has no signed mod instruction ... */
295 i_instr_record *map_Mod = &records[n_records++].i_instr;
297 tp = new_type_method(2, 1);
298 set_method_param_type(tp, 0, int_tp);
299 set_method_param_type(tp, 1, int_tp);
300 set_method_res_type(tp, 0, int_tp);
302 rt_iMod.ent = new_entity(get_glob_type(), ID(".rem"), tp);
303 set_entity_ld_ident(rt_iMod.ent, ID(".rem"));
304 rt_iMod.mode = mode_T;
305 rt_iMod.res_mode = mode_Is;
306 rt_iMod.mem_proj_nr = pn_Mod_M;
307 rt_iMod.regular_proj_nr = pn_Mod_X_regular;
308 rt_iMod.exc_proj_nr = pn_Mod_X_except;
309 rt_iMod.res_proj_nr = pn_Mod_res;
311 set_entity_visibility(rt_iMod.ent, ir_visibility_external);
313 map_Mod->kind = INTRINSIC_INSTR;
314 map_Mod->op = op_Mod;
315 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
316 map_Mod->ctx = &rt_iMod;
318 /* ... nor an unsigned mod. */
320 i_instr_record *map_Mod = &records[n_records++].i_instr;
322 tp = new_type_method(2, 1);
323 set_method_param_type(tp, 0, uint_tp);
324 set_method_param_type(tp, 1, uint_tp);
325 set_method_res_type(tp, 0, uint_tp);
327 rt_uMod.ent = new_entity(get_glob_type(), ID(".urem"), tp);
328 set_entity_ld_ident(rt_uMod.ent, ID(".urem"));
329 rt_uMod.mode = mode_T;
330 rt_uMod.res_mode = mode_Iu;
331 rt_uMod.mem_proj_nr = pn_Mod_M;
332 rt_uMod.regular_proj_nr = pn_Mod_X_regular;
333 rt_uMod.exc_proj_nr = pn_Mod_X_except;
334 rt_uMod.res_proj_nr = pn_Mod_res;
336 set_entity_visibility(rt_uMod.ent, ir_visibility_external);
338 map_Mod->kind = INTRINSIC_INSTR;
339 map_Mod->op = op_Mod;
340 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
341 map_Mod->ctx = &rt_uMod;
344 assert(n_records < ARRAY_SIZE(records));
345 lower_intrinsics(records, n_records, /*part_block_used=*/ true);
349 * Initializes the backend ISA
351 static arch_env_t *sparc_init(FILE *outfile)
353 sparc_isa_t *isa = XMALLOC(sparc_isa_t);
354 *isa = sparc_isa_template;
355 isa->constants = pmap_create();
357 be_emit_init(outfile);
359 sparc_register_init();
360 sparc_create_opcodes(&sparc_irn_ops);
361 sparc_handle_intrinsics();
368 * Closes the output file and frees the ISA structure.
370 static void sparc_done(void *self)
372 sparc_isa_t *isa = (sparc_isa_t*)self;
374 /* emit now all global declarations */
375 be_gas_emit_decls(isa->base.main_env);
377 pmap_destroy(isa->constants);
384 * Get the register class which shall be used to store a value of a given mode.
385 * @param self The this pointer.
386 * @param mode The mode in question.
387 * @return A register class which can hold values of the given mode.
389 static const arch_register_class_t *sparc_get_reg_class_for_mode(const ir_mode *mode)
391 if (mode_is_float(mode))
392 return &sparc_reg_classes[CLASS_sparc_fp];
394 return &sparc_reg_classes[CLASS_sparc_gp];
398 * Returns the necessary byte alignment for storing a register of given class.
400 static int sparc_get_reg_class_alignment(const arch_register_class_t *cls)
402 ir_mode *mode = arch_register_class_mode(cls);
403 return get_mode_size_bytes(mode);
406 static ir_node *sparc_create_set(ir_node *cond)
408 return ir_create_cond_set(cond, mode_Iu);
411 static void sparc_lower_for_target(void)
413 size_t i, n_irgs = get_irp_n_irgs();
414 lower_mode_b_config_t lower_mode_b_config = {
419 lower_calls_with_compounds(LF_RETURN_HIDDEN);
421 if (sparc_isa_template.fpu_arch == SPARC_FPU_ARCH_SOFTFLOAT)
422 lower_floating_point();
426 for (i = 0; i < n_irgs; ++i) {
427 ir_graph *irg = get_irp_irg(i);
428 ir_lower_mode_b(irg, &lower_mode_b_config);
429 lower_switch(irg, 4, 256, false);
433 static int sparc_is_mux_allowed(ir_node *sel, ir_node *mux_false,
436 ir_graph *irg = get_irn_irg(sel);
437 ir_mode *mode = get_irn_mode(mux_true);
439 if (get_irg_phase_state(irg) == phase_low)
442 if (!mode_is_int(mode) && !mode_is_reference(mode) && mode != mode_b)
444 if (is_Const(mux_true) && is_Const_one(mux_true) &&
445 is_Const(mux_false) && is_Const_null(mux_false))
451 * Returns the libFirm configuration parameter for this backend.
453 static const backend_params *sparc_get_backend_params(void)
455 static const ir_settings_arch_dep_t arch_dep = {
456 1, /* also_use_subs */
457 1, /* maximum_shifts */
458 31, /* highest_shift_amount */
459 NULL, /* evaluate_cost_func */
462 32, /* max_bits_for_mulh */
464 static backend_params p = {
465 0, /* no inline assembly */
466 0, /* no support for RotL nodes */
468 1, /* modulo shift efficient */
469 0, /* non-modulo shift not efficient */
470 &arch_dep, /* will be set later */
471 sparc_is_mux_allowed, /* parameter for if conversion */
472 32, /* machine size */
473 NULL, /* float arithmetic mode */
474 NULL, /* long long type */
475 NULL, /* usigned long long type */
476 NULL, /* long double type */
477 0, /* no trampoline support: size 0 */
478 0, /* no trampoline support: align 0 */
479 NULL, /* no trampoline support: no trampoline builder */
480 4 /* alignment of stack parameter: typically 4 (32bit) or 8 (64bit) */
483 ir_mode *mode_long_long
484 = new_ir_mode("long long", irms_int_number, 64, 1, irma_twos_complement,
486 ir_type *type_long_long = new_type_primitive(mode_long_long);
487 ir_mode *mode_unsigned_long_long
488 = new_ir_mode("unsigned long long", irms_int_number, 64, 0,
489 irma_twos_complement, 64);
490 ir_type *type_unsigned_long_long
491 = new_type_primitive(mode_unsigned_long_long);
492 ir_mode *mode_long_double
493 = new_ir_mode("long double", irms_float_number, 128, 1,
495 ir_type *type_long_double = new_type_primitive(mode_long_double);
497 set_type_alignment_bytes(type_long_double, 8);
498 p.type_long_double = type_long_double;
499 p.type_long_long = type_long_long;
500 p.type_unsigned_long_long = type_unsigned_long_long;
504 static ir_graph **sparc_get_backend_irg_list(const void *self,
512 static asm_constraint_flags_t sparc_parse_asm_constraint(const char **c)
515 return ASM_CONSTRAINT_FLAG_INVALID;
518 static int sparc_is_valid_clobber(const char *clobber)
524 /* fpu set architectures. */
525 static const lc_opt_enum_int_items_t sparc_fpu_items[] = {
526 { "fpu", SPARC_FPU_ARCH_FPU },
527 { "softfloat", SPARC_FPU_ARCH_SOFTFLOAT },
531 static lc_opt_enum_int_var_t arch_fpu_var = {
532 &sparc_isa_template.fpu_arch, sparc_fpu_items
535 static const lc_opt_table_entry_t sparc_options[] = {
536 LC_OPT_ENT_ENUM_INT("fpunit", "select the floating point unit", &arch_fpu_var),
540 static ir_node *sparc_new_spill(ir_node *value, ir_node *after)
542 ir_node *block = get_block(after);
543 ir_graph *irg = get_irn_irg(value);
544 ir_node *frame = get_irg_frame(irg);
545 ir_node *mem = get_irg_no_mem(irg);
546 ir_mode *mode = get_irn_mode(value);
549 if (mode_is_float(mode)) {
550 store = create_stf(NULL, block, value, frame, mem, mode, NULL, 0, true);
552 store = new_bd_sparc_St_imm(NULL, block, value, frame, mem, mode, NULL,
555 sched_add_after(after, store);
559 static ir_node *sparc_new_reload(ir_node *value, ir_node *spill,
562 ir_node *block = get_block(before);
563 ir_graph *irg = get_irn_irg(value);
564 ir_node *frame = get_irg_frame(irg);
565 ir_mode *mode = get_irn_mode(value);
569 if (mode_is_float(mode)) {
570 load = create_ldf(NULL, block, frame, spill, mode, NULL, 0, true);
572 load = new_bd_sparc_Ld_imm(NULL, block, frame, spill, mode, NULL, 0,
575 sched_add_before(before, load);
576 assert((long)pn_sparc_Ld_res == (long)pn_sparc_Ldf_res);
577 res = new_r_Proj(load, mode, pn_sparc_Ld_res);
582 const arch_isa_if_t sparc_isa_if = {
584 sparc_lower_for_target,
586 NULL, /* handle intrinsics */
587 sparc_get_reg_class_for_mode,
589 sparc_get_reg_class_alignment,
590 sparc_get_backend_params,
591 sparc_get_backend_irg_list,
592 NULL, /* mark remat */
593 sparc_parse_asm_constraint,
594 sparc_is_valid_clobber,
597 NULL, /* get_pic_base */
598 NULL, /* before_abi */
603 NULL, /* register_saved_by */
608 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_sparc)
609 void be_init_arch_sparc(void)
611 lc_opt_entry_t *be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
612 lc_opt_entry_t *sparc_grp = lc_opt_get_grp(be_grp, "sparc");
614 lc_opt_add_table(sparc_grp, sparc_options);
616 be_register_isa_if("sparc", &sparc_isa_if);
617 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.cg");
618 sparc_init_transform();
619 sparc_init_emitter();