2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The main sparc backend driver file.
28 #include "lc_opts_enum.h"
36 #include "iroptimize.h"
46 #include "../bearch.h"
47 #include "../benode.h"
48 #include "../belower.h"
49 #include "../besched.h"
51 #include "../bemachine.h"
52 #include "../beilpsched.h"
53 #include "../bemodule.h"
55 #include "../bespillslots.h"
56 #include "../begnuas.h"
57 #include "../belistsched.h"
58 #include "../beflags.h"
60 #include "bearch_sparc_t.h"
62 #include "sparc_new_nodes.h"
63 #include "gen_sparc_regalloc_if.h"
64 #include "sparc_transform.h"
65 #include "sparc_emitter.h"
67 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
69 static arch_irn_class_t sparc_classify(const ir_node *irn)
75 static ir_entity *sparc_get_frame_entity(const ir_node *irn)
77 const sparc_attr_t *attr = get_sparc_attr_const(irn);
79 if (is_sparc_FrameAddr(irn)) {
80 const sparc_symconst_attr_t *attr = get_irn_generic_attr_const(irn);
84 if (attr->is_load_store) {
85 const sparc_load_store_attr_t *load_store_attr = get_sparc_load_store_attr_const(irn);
86 if (load_store_attr->is_frame_entity) {
87 return load_store_attr->entity;
95 * This function is called by the generic backend to correct offsets for
96 * nodes accessing the stack.
98 static void sparc_set_frame_offset(ir_node *irn, int offset)
100 if (is_sparc_FrameAddr(irn)) {
101 sparc_symconst_attr_t *attr = get_irn_generic_attr(irn);
102 attr->fp_offset += offset;
104 sparc_load_store_attr_t *attr = get_sparc_load_store_attr(irn);
105 assert(attr->base.is_load_store);
106 attr->offset += offset;
110 static int sparc_get_sp_bias(const ir_node *node)
112 if (is_sparc_Save(node)) {
113 const sparc_save_attr_t *attr = get_sparc_save_attr_const(node);
114 /* Note we do not retport the change of the SPARC_MIN_STACKSIZE
115 * size, since we have additional magic in the emitter which
116 * calculates that! */
117 assert(attr->initial_stacksize >= SPARC_MIN_STACKSIZE);
118 return attr->initial_stacksize - SPARC_MIN_STACKSIZE;
123 /* fill register allocator interface */
125 static const arch_irn_ops_t sparc_irn_ops = {
128 sparc_get_frame_entity,
129 sparc_set_frame_offset,
131 NULL, /* get_inverse */
132 NULL, /* get_op_estimated_cost */
133 NULL, /* possible_memory_operand */
134 NULL, /* perform_memory_operand */
140 * Transforms the standard firm graph into
143 static void sparc_prepare_graph(void *self)
145 sparc_code_gen_t *cg = self;
147 /* transform FIRM into SPARC asm nodes */
148 sparc_transform_graph(cg);
151 dump_ir_graph(cg->irg, "transformed");
154 static bool sparc_modifies_flags(const ir_node *node)
156 return arch_irn_get_flags(node) & sparc_arch_irn_flag_modifies_flags;
159 static bool sparc_modifies_fp_flags(const ir_node *node)
161 return arch_irn_get_flags(node) & sparc_arch_irn_flag_modifies_fp_flags;
164 static void sparc_before_ra(void *self)
166 sparc_code_gen_t *cg = self;
167 /* fixup flags register */
168 be_sched_fix_flags(cg->irg, &sparc_reg_classes[CLASS_sparc_flags_class],
169 NULL, sparc_modifies_flags);
170 be_sched_fix_flags(cg->irg, &sparc_reg_classes[CLASS_sparc_fpflags_class],
171 NULL, sparc_modifies_fp_flags);
175 * transform reload node => load
177 static void transform_Reload(ir_node *node)
179 ir_node *block = get_nodes_block(node);
180 dbg_info *dbgi = get_irn_dbg_info(node);
181 ir_node *ptr = get_irn_n(node, be_pos_Spill_frame);
182 ir_node *mem = get_irn_n(node, be_pos_Reload_mem);
183 ir_mode *mode = get_irn_mode(node);
184 ir_entity *entity = be_get_frame_entity(node);
185 const arch_register_t *reg;
189 ir_node *sched_point = sched_prev(node);
191 load = new_bd_sparc_Ld(dbgi, block, ptr, mem, mode, entity, false, 0, true);
192 sched_add_after(sched_point, load);
195 proj = new_rd_Proj(dbgi, load, mode, pn_sparc_Ld_res);
197 reg = arch_get_irn_register(node);
198 arch_set_irn_register(proj, reg);
200 exchange(node, proj);
204 * transform spill node => store
206 static void transform_Spill(ir_node *node)
208 ir_node *block = get_nodes_block(node);
209 dbg_info *dbgi = get_irn_dbg_info(node);
210 ir_node *ptr = get_irn_n(node, be_pos_Spill_frame);
211 ir_node *mem = new_NoMem();
212 ir_node *val = get_irn_n(node, be_pos_Spill_val);
213 ir_mode *mode = get_irn_mode(val);
214 ir_entity *entity = be_get_frame_entity(node);
215 ir_node *sched_point;
218 sched_point = sched_prev(node);
219 store = new_bd_sparc_St(dbgi, block, ptr, val, mem, mode, entity, false, 0, true);
221 sched_add_after(sched_point, store);
223 exchange(node, store);
227 * walker to transform be_Spill and be_Reload nodes
229 static void sparc_after_ra_walker(ir_node *block, void *data)
231 ir_node *node, *prev;
234 for (node = sched_last(block); !sched_is_begin(node); node = prev) {
235 prev = sched_prev(node);
237 if (be_is_Reload(node)) {
238 transform_Reload(node);
239 } else if (be_is_Spill(node)) {
240 transform_Spill(node);
245 static void sparc_collect_frame_entity_nodes(ir_node *node, void *data)
247 be_fec_env_t *env = data;
251 const sparc_load_store_attr_t *attr;
253 if (be_is_Reload(node) && be_get_frame_entity(node) == NULL) {
254 mode = get_irn_mode(node);
255 align = get_mode_size_bytes(mode);
256 be_node_needs_frame_entity(env, node, mode, align);
260 if (!is_sparc_Ld(node) && !is_sparc_Ldf(node))
263 attr = get_sparc_load_store_attr_const(node);
264 entity = attr->entity;
265 mode = attr->load_store_mode;
268 if (!attr->is_frame_entity)
270 if (arch_irn_get_flags(node) & sparc_arch_irn_flag_needs_64bit_spillslot)
272 align = get_mode_size_bytes(mode);
273 be_node_needs_frame_entity(env, node, mode, align);
276 static void sparc_set_frame_entity(ir_node *node, ir_entity *entity)
278 if (is_be_node(node)) {
279 be_node_set_frame_entity(node, entity);
281 /* we only say be_node_needs_frame_entity on nodes with load_store
282 * attributes, so this should be fine */
283 sparc_load_store_attr_t *attr = get_sparc_load_store_attr(node);
284 attr->entity = entity;
289 static void sparc_after_ra(void *self)
291 sparc_code_gen_t *cg = self;
292 ir_graph *irg = cg->irg;
293 be_fec_env_t *fec_env = be_new_frame_entity_coalescer(irg);
295 irg_walk_graph(irg, NULL, sparc_collect_frame_entity_nodes, fec_env);
296 be_assign_entities(fec_env, sparc_set_frame_entity);
297 be_free_frame_entity_coalescer(fec_env);
299 irg_block_walk_graph(cg->irg, NULL, sparc_after_ra_walker, NULL);
305 * Emits the code, closes the output file and frees
306 * the code generator interface.
308 static void sparc_emit_and_done(void *self)
310 sparc_code_gen_t *cg = self;
311 ir_graph *irg = cg->irg;
313 sparc_gen_routine(cg, irg);
315 /* de-allocate code generator */
319 static void *sparc_cg_init(ir_graph *irg);
321 static const arch_code_generator_if_t sparc_code_gen_if = {
323 NULL, /* get_pic_base hook */
324 NULL, /* before abi introduce hook */
326 NULL, /* spill hook */
327 sparc_before_ra, /* before register allocation hook */
328 sparc_after_ra, /* after register allocation hook */
334 * Initializes the code generator.
336 static void *sparc_cg_init(ir_graph *irg)
338 sparc_isa_t *isa = (sparc_isa_t *) be_get_irg_arch_env(irg);
339 sparc_code_gen_t *cg = XMALLOCZ(sparc_code_gen_t);
341 cg->impl = &sparc_code_gen_if;
344 cg->dump = (be_get_irg_options(irg)->dump_flags & DUMP_BE) != 0;
345 cg->constants = pmap_create();
347 /* enter the current code generator */
350 return (arch_code_generator_t*) cg;
353 const arch_isa_if_t sparc_isa_if;
354 static sparc_isa_t sparc_isa_template = {
356 &sparc_isa_if, /* isa interface implementation */
357 &sparc_gp_regs[REG_SP], /* stack pointer register */
358 &sparc_gp_regs[REG_FRAME_POINTER], /* base pointer register */
359 &sparc_reg_classes[CLASS_sparc_gp], /* link pointer register class */
360 -1, /* stack direction */
361 3, /* power of two stack alignment
363 NULL, /* main environment */
364 7, /* costs for a spill instruction */
365 5, /* costs for a reload instruction */
366 true, /* custom abi handling */
368 NULL /* current code generator */
372 static void sparc_handle_intrinsics(void)
374 ir_type *tp, *int_tp, *uint_tp;
378 runtime_rt rt_iMod, rt_uMod;
380 #define ID(x) new_id_from_chars(x, sizeof(x)-1)
382 int_tp = new_type_primitive(mode_Is);
383 uint_tp = new_type_primitive(mode_Iu);
386 /* SPARC has no signed mod instruction ... */
388 i_instr_record *map_Mod = &records[n_records++].i_instr;
390 tp = new_type_method(2, 1);
391 set_method_param_type(tp, 0, int_tp);
392 set_method_param_type(tp, 1, int_tp);
393 set_method_res_type(tp, 0, int_tp);
395 rt_iMod.ent = new_entity(get_glob_type(), ID(".rem"), tp);
396 set_entity_ld_ident(rt_iMod.ent, ID(".rem"));
397 rt_iMod.mode = mode_T;
398 rt_iMod.res_mode = mode_Is;
399 rt_iMod.mem_proj_nr = pn_Mod_M;
400 rt_iMod.regular_proj_nr = pn_Mod_X_regular;
401 rt_iMod.exc_proj_nr = pn_Mod_X_except;
402 rt_iMod.exc_mem_proj_nr = pn_Mod_M;
403 rt_iMod.res_proj_nr = pn_Mod_res;
405 set_entity_visibility(rt_iMod.ent, ir_visibility_external);
407 map_Mod->kind = INTRINSIC_INSTR;
408 map_Mod->op = op_Mod;
409 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
410 map_Mod->ctx = &rt_iMod;
412 /* ... nor an unsigned mod. */
414 i_instr_record *map_Mod = &records[n_records++].i_instr;
416 tp = new_type_method(2, 1);
417 set_method_param_type(tp, 0, uint_tp);
418 set_method_param_type(tp, 1, uint_tp);
419 set_method_res_type(tp, 0, uint_tp);
421 rt_uMod.ent = new_entity(get_glob_type(), ID(".urem"), tp);
422 set_entity_ld_ident(rt_uMod.ent, ID(".urem"));
423 rt_uMod.mode = mode_T;
424 rt_uMod.res_mode = mode_Iu;
425 rt_uMod.mem_proj_nr = pn_Mod_M;
426 rt_uMod.regular_proj_nr = pn_Mod_X_regular;
427 rt_uMod.exc_proj_nr = pn_Mod_X_except;
428 rt_uMod.exc_mem_proj_nr = pn_Mod_M;
429 rt_uMod.res_proj_nr = pn_Mod_res;
431 set_entity_visibility(rt_uMod.ent, ir_visibility_external);
433 map_Mod->kind = INTRINSIC_INSTR;
434 map_Mod->op = op_Mod;
435 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
436 map_Mod->ctx = &rt_uMod;
440 lower_intrinsics(records, n_records, /*part_block_used=*/0);
445 * Initializes the backend ISA
447 static arch_env_t *sparc_init(FILE *outfile)
449 static int run_once = 0;
456 isa = XMALLOC(sparc_isa_t);
457 memcpy(isa, &sparc_isa_template, sizeof(*isa));
459 be_emit_init(outfile);
461 sparc_register_init();
462 sparc_create_opcodes(&sparc_irn_ops);
463 sparc_handle_intrinsics();
471 * Closes the output file and frees the ISA structure.
473 static void sparc_done(void *self)
475 sparc_isa_t *isa = self;
477 /* emit now all global declarations */
478 be_gas_emit_decls(isa->base.main_env);
485 static unsigned sparc_get_n_reg_class(void)
490 static const arch_register_class_t *sparc_get_reg_class(unsigned i)
492 assert(i < N_CLASSES);
493 return &sparc_reg_classes[i];
499 * Get the register class which shall be used to store a value of a given mode.
500 * @param self The this pointer.
501 * @param mode The mode in question.
502 * @return A register class which can hold values of the given mode.
504 static const arch_register_class_t *sparc_get_reg_class_for_mode(const ir_mode *mode)
506 if (mode_is_float(mode))
507 return &sparc_reg_classes[CLASS_sparc_fp];
509 return &sparc_reg_classes[CLASS_sparc_gp];
512 static int sparc_to_appear_in_schedule(void *block_env, const ir_node *irn)
516 if (!is_sparc_irn(irn))
523 * Initializes the code generator interface.
525 static const arch_code_generator_if_t *sparc_get_code_generator_if(
529 return &sparc_code_gen_if;
532 list_sched_selector_t sparc_sched_selector;
535 * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
537 static const list_sched_selector_t *sparc_get_list_sched_selector(
538 const void *self, list_sched_selector_t *selector)
543 sparc_sched_selector = trivial_selector;
544 sparc_sched_selector.to_appear_in_schedule = sparc_to_appear_in_schedule;
545 return &sparc_sched_selector;
548 static const ilp_sched_selector_t *sparc_get_ilp_sched_selector(
556 * Returns the necessary byte alignment for storing a register of given class.
558 static int sparc_get_reg_class_alignment(const arch_register_class_t *cls)
560 ir_mode *mode = arch_register_class_mode(cls);
561 return get_mode_size_bytes(mode);
565 * Returns the libFirm configuration parameter for this backend.
567 static const backend_params *sparc_get_backend_params(void)
569 static backend_params p = {
570 0, /* no dword lowering */
571 0, /* no inline assembly */
572 NULL, /* will be set later */
573 NULL, /* no creator function */
574 NULL, /* context for create_intrinsic_fkt */
575 NULL, /* parameter for if conversion */
576 NULL, /* float arithmetic mode */
577 0, /* no trampoline support: size 0 */
578 0, /* no trampoline support: align 0 */
579 NULL, /* no trampoline support: no trampoline builder */
580 4 /* alignment of stack parameter: typically 4 (32bit) or 8 (64bit) */
585 static const be_execution_unit_t ***sparc_get_allowed_execution_units(
590 panic("sparc_get_allowed_execution_units not implemented yet");
593 static const be_machine_t *sparc_get_machine(const void *self)
597 panic("sparc_get_machine not implemented yet");
600 static ir_graph **sparc_get_backend_irg_list(const void *self,
608 static asm_constraint_flags_t sparc_parse_asm_constraint(const char **c)
611 return ASM_CONSTRAINT_FLAG_INVALID;
614 static int sparc_is_valid_clobber(const char *clobber)
620 const arch_isa_if_t sparc_isa_if = {
623 NULL, /* handle intrinsics */
624 sparc_get_n_reg_class,
626 sparc_get_reg_class_for_mode,
628 sparc_get_code_generator_if,
629 sparc_get_list_sched_selector,
630 sparc_get_ilp_sched_selector,
631 sparc_get_reg_class_alignment,
632 sparc_get_backend_params,
633 sparc_get_allowed_execution_units,
635 sparc_get_backend_irg_list,
636 NULL, /* mark remat */
637 sparc_parse_asm_constraint,
638 sparc_is_valid_clobber
641 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_sparc);
642 void be_init_arch_sparc(void)
644 be_register_isa_if("sparc", &sparc_isa_if);
645 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.cg");
646 sparc_init_transform();
647 sparc_init_emitter();