2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The main sparc backend driver file.
28 #include "lc_opts_enum.h"
36 #include "iroptimize.h"
46 #include "../bearch.h"
47 #include "../benode.h"
48 #include "../belower.h"
49 #include "../besched.h"
52 #include "../bemachine.h"
53 #include "../beilpsched.h"
54 #include "../bemodule.h"
56 #include "../bespillslots.h"
57 #include "../begnuas.h"
58 #include "../belistsched.h"
59 #include "../beflags.h"
61 #include "bearch_sparc_t.h"
63 #include "sparc_new_nodes.h"
64 #include "gen_sparc_regalloc_if.h"
65 #include "sparc_transform.h"
66 #include "sparc_emitter.h"
68 // sparc ABI requires a min stacksize to
69 // save registers in case of a trap etc.
70 // by now we assume only non-leaf procedures: 92 + 4 (padding)
71 #define SPARC_MIN_STACKSIZE 112
73 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
75 static arch_irn_class_t sparc_classify(const ir_node *irn)
81 static ir_entity *sparc_get_frame_entity(const ir_node *irn)
83 const sparc_attr_t *attr = get_sparc_attr_const(irn);
85 if (is_sparc_FrameAddr(irn)) {
86 const sparc_symconst_attr_t *attr = get_irn_generic_attr_const(irn);
90 if (attr->is_load_store) {
91 const sparc_load_store_attr_t *load_store_attr = get_sparc_load_store_attr_const(irn);
92 if (load_store_attr->is_frame_entity) {
93 return load_store_attr->entity;
101 * This function is called by the generic backend to correct offsets for
102 * nodes accessing the stack.
104 static void sparc_set_frame_offset(ir_node *irn, int offset)
106 if (is_sparc_FrameAddr(irn)) {
107 sparc_symconst_attr_t *attr = get_irn_generic_attr(irn);
108 attr->fp_offset += offset;
110 sparc_load_store_attr_t *attr = get_sparc_load_store_attr(irn);
111 assert(attr->base.is_load_store);
112 attr->offset += offset;
116 static int sparc_get_sp_bias(const ir_node *irn)
119 return SPARC_MIN_STACKSIZE;
122 /* fill register allocator interface */
124 static const arch_irn_ops_t sparc_irn_ops = {
127 sparc_get_frame_entity,
128 sparc_set_frame_offset,
130 NULL, /* get_inverse */
131 NULL, /* get_op_estimated_cost */
132 NULL, /* possible_memory_operand */
133 NULL, /* perform_memory_operand */
139 * Transforms the standard firm graph into
142 static void sparc_prepare_graph(void *self)
144 sparc_code_gen_t *cg = self;
146 /* transform FIRM into SPARC asm nodes */
147 sparc_transform_graph(cg);
150 dump_ir_graph(cg->irg, "transformed");
155 static ir_node *sparc_flags_remat(ir_node *node, ir_node *after)
160 if (is_Block(after)) {
163 block = get_nodes_block(after);
165 copy = exact_copy(node);
166 set_nodes_block(copy, block);
167 sched_add_after(after, copy);
171 static void sparc_before_ra(void *self)
173 sparc_code_gen_t *cg = self;
174 /* fixup flags register */
175 be_sched_fix_flags(cg->irg, &sparc_reg_classes[CLASS_sparc_flags], &sparc_flags_remat);
179 * transform reload node => load
181 static void transform_Reload(ir_node *node)
183 ir_graph *irg = get_irn_irg(node);
184 ir_node *block = get_nodes_block(node);
185 dbg_info *dbgi = get_irn_dbg_info(node);
186 ir_node *ptr = get_irg_frame(irg);
187 ir_node *mem = get_irn_n(node, be_pos_Reload_mem);
188 ir_mode *mode = get_irn_mode(node);
189 ir_entity *entity = be_get_frame_entity(node);
190 const arch_register_t *reg;
194 ir_node *sched_point = sched_prev(node);
196 load = new_bd_sparc_Ld(dbgi, block, ptr, mem, mode, entity, false, 0, true);
197 sched_add_after(sched_point, load);
200 proj = new_rd_Proj(dbgi, load, mode, pn_sparc_Ld_res);
202 reg = arch_get_irn_register(node);
203 arch_set_irn_register(proj, reg);
205 exchange(node, proj);
209 * transform spill node => store
211 static void transform_Spill(ir_node *node)
213 ir_graph *irg = get_irn_irg(node);
214 ir_node *block = get_nodes_block(node);
215 dbg_info *dbgi = get_irn_dbg_info(node);
216 ir_node *ptr = get_irg_frame(irg);
217 ir_node *mem = new_NoMem();
218 ir_node *val = get_irn_n(node, be_pos_Spill_val);
219 ir_mode *mode = get_irn_mode(val);
220 ir_entity *entity = be_get_frame_entity(node);
221 ir_node *sched_point;
224 sched_point = sched_prev(node);
225 store = new_bd_sparc_St(dbgi, block, ptr, val, mem, mode, entity, false, 0, true);
227 sched_add_after(sched_point, store);
229 exchange(node, store);
233 * walker to transform be_Spill and be_Reload nodes
235 static void sparc_after_ra_walker(ir_node *block, void *data)
237 ir_node *node, *prev;
240 for (node = sched_last(block); !sched_is_begin(node); node = prev) {
241 prev = sched_prev(node);
243 if (be_is_Reload(node)) {
244 transform_Reload(node);
245 } else if (be_is_Spill(node)) {
246 transform_Spill(node);
252 static void sparc_after_ra(void *self)
254 sparc_code_gen_t *cg = self;
255 be_coalesce_spillslots(cg->irg);
257 irg_block_walk_graph(cg->irg, NULL, sparc_after_ra_walker, NULL);
263 * Emits the code, closes the output file and frees
264 * the code generator interface.
266 static void sparc_emit_and_done(void *self)
268 sparc_code_gen_t *cg = self;
269 ir_graph *irg = cg->irg;
271 sparc_gen_routine(cg, irg);
273 /* de-allocate code generator */
277 static void *sparc_cg_init(ir_graph *irg);
279 static const arch_code_generator_if_t sparc_code_gen_if = {
281 NULL, /* get_pic_base hook */
282 NULL, /* before abi introduce hook */
284 NULL, /* spill hook */
285 sparc_before_ra, /* before register allocation hook */
286 sparc_after_ra, /* after register allocation hook */
292 * Initializes the code generator.
294 static void *sparc_cg_init(ir_graph *irg)
296 sparc_isa_t *isa = (sparc_isa_t *) be_get_irg_arch_env(irg);
297 sparc_code_gen_t *cg = XMALLOCZ(sparc_code_gen_t);
299 cg->impl = &sparc_code_gen_if;
302 cg->dump = (be_get_irg_options(irg)->dump_flags & DUMP_BE) != 0;
304 /* enter the current code generator */
307 return (arch_code_generator_t*) cg;
310 const arch_isa_if_t sparc_isa_if;
311 static sparc_isa_t sparc_isa_template = {
313 &sparc_isa_if, /* isa interface implementation */
314 &sparc_gp_regs[REG_SP], /* stack pointer register */
315 &sparc_gp_regs[REG_FP], /* base pointer register */
316 &sparc_reg_classes[CLASS_sparc_gp], /* link pointer register class */
317 -1, /* stack direction */
318 1, /* power of two stack alignment for calls, 2^2 == 4 */
319 NULL, /* main environment */
320 7, /* costs for a spill instruction */
321 5, /* costs for a reload instruction */
322 false, /* no custom abi handling */
324 NULL /* current code generator */
328 static void sparc_handle_intrinsics(void)
330 ir_type *tp, *int_tp, *uint_tp;
334 runtime_rt rt_iMod, rt_uMod;
336 #define ID(x) new_id_from_chars(x, sizeof(x)-1)
338 int_tp = new_type_primitive(mode_Is);
339 uint_tp = new_type_primitive(mode_Iu);
342 /* SPARC has no signed mod instruction ... */
344 i_instr_record *map_Mod = &records[n_records++].i_instr;
346 tp = new_type_method(2, 1);
347 set_method_param_type(tp, 0, int_tp);
348 set_method_param_type(tp, 1, int_tp);
349 set_method_res_type(tp, 0, int_tp);
351 rt_iMod.ent = new_entity(get_glob_type(), ID(".rem"), tp);
352 set_entity_ld_ident(rt_iMod.ent, ID(".rem"));
353 rt_iMod.mode = mode_T;
354 rt_iMod.res_mode = mode_Is;
355 rt_iMod.mem_proj_nr = pn_Mod_M;
356 rt_iMod.regular_proj_nr = pn_Mod_X_regular;
357 rt_iMod.exc_proj_nr = pn_Mod_X_except;
358 rt_iMod.exc_mem_proj_nr = pn_Mod_M;
359 rt_iMod.res_proj_nr = pn_Mod_res;
361 set_entity_visibility(rt_iMod.ent, ir_visibility_external);
363 map_Mod->kind = INTRINSIC_INSTR;
364 map_Mod->op = op_Mod;
365 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
366 map_Mod->ctx = &rt_iMod;
368 /* ... nor an unsigned mod. */
370 i_instr_record *map_Mod = &records[n_records++].i_instr;
372 tp = new_type_method(2, 1);
373 set_method_param_type(tp, 0, uint_tp);
374 set_method_param_type(tp, 1, uint_tp);
375 set_method_res_type(tp, 0, uint_tp);
377 rt_uMod.ent = new_entity(get_glob_type(), ID(".urem"), tp);
378 set_entity_ld_ident(rt_uMod.ent, ID(".urem"));
379 rt_uMod.mode = mode_T;
380 rt_uMod.res_mode = mode_Iu;
381 rt_uMod.mem_proj_nr = pn_Mod_M;
382 rt_uMod.regular_proj_nr = pn_Mod_X_regular;
383 rt_uMod.exc_proj_nr = pn_Mod_X_except;
384 rt_uMod.exc_mem_proj_nr = pn_Mod_M;
385 rt_uMod.res_proj_nr = pn_Mod_res;
387 set_entity_visibility(rt_uMod.ent, ir_visibility_external);
389 map_Mod->kind = INTRINSIC_INSTR;
390 map_Mod->op = op_Mod;
391 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
392 map_Mod->ctx = &rt_uMod;
396 lower_intrinsics(records, n_records, /*part_block_used=*/0);
401 * Initializes the backend ISA
403 static arch_env_t *sparc_init(FILE *outfile)
405 static int run_once = 0;
412 isa = XMALLOC(sparc_isa_t);
413 memcpy(isa, &sparc_isa_template, sizeof(*isa));
415 be_emit_init(outfile);
417 sparc_register_init();
418 sparc_create_opcodes(&sparc_irn_ops);
419 sparc_handle_intrinsics();
427 * Closes the output file and frees the ISA structure.
429 static void sparc_done(void *self)
431 sparc_isa_t *isa = self;
433 /* emit now all global declarations */
434 be_gas_emit_decls(isa->base.main_env);
441 static unsigned sparc_get_n_reg_class(void)
446 static const arch_register_class_t *sparc_get_reg_class(unsigned i)
448 assert(i < N_CLASSES);
449 return &sparc_reg_classes[i];
455 * Get the register class which shall be used to store a value of a given mode.
456 * @param self The this pointer.
457 * @param mode The mode in question.
458 * @return A register class which can hold values of the given mode.
460 static const arch_register_class_t *sparc_get_reg_class_for_mode(const ir_mode *mode)
462 if (mode_is_float(mode))
463 return &sparc_reg_classes[CLASS_sparc_fp];
465 return &sparc_reg_classes[CLASS_sparc_gp];
471 be_abi_call_flags_bits_t flags;
475 static void *sparc_abi_init(const be_abi_call_t *call, ir_graph *irg)
477 sparc_abi_env_t *env = XMALLOC(sparc_abi_env_t);
478 be_abi_call_flags_t fl = be_abi_call_get_flags(call);
479 env->flags = fl.bits;
485 * Get the between type for that call.
486 * @param self The callback object.
487 * @return The between type of for that call.
489 static ir_type *sparc_get_between_type(void *self)
491 static ir_type *between_type = NULL;
494 if (between_type == NULL) {
495 between_type = new_type_class(new_id_from_str("sparc_between_type"));
496 set_type_size_bytes(between_type, 0);
504 * Build the prolog, return the BASE POINTER register
506 static const arch_register_t *sparc_abi_prologue(void *self, ir_node **mem,
507 pmap *reg_map, int *stack_bias)
509 sparc_abi_env_t *env = self;
510 ir_node *block = get_irg_start_block(env->irg);
511 const arch_register_t *fp = &sparc_gp_regs[REG_FP];
512 const arch_register_t *sp = &sparc_gp_regs[REG_SP];
515 ir_node *sp_proj = be_abi_reg_map_get(reg_map, sp);
518 //ir_type *frame_type = get_irg_frame_type(env->irg);
519 //frame_alloc_area(frame_type, reserved_stack_size, 1, 1);
521 // alloc min required stack space
522 // TODO: the min stacksize depends on wether this is a leaf procedure or not
523 ir_node *save = new_bd_sparc_Save(NULL, block, sp_proj, *mem, SPARC_MIN_STACKSIZE);
529 *stack_bias -= SPARC_MIN_STACKSIZE;
530 sp_proj = new_r_Proj(save, sp->reg_class->mode, pn_sparc_Save_stack);
531 *mem = new_r_Proj(save, mode_M, pn_sparc_Save_mem);
533 arch_set_irn_register(sp_proj, sp);
534 be_abi_reg_map_set(reg_map, sp, sp_proj);
536 // we always have a framepointer
540 /* Build the epilog */
541 static void sparc_abi_epilogue(void *self, ir_node *bl, ir_node **mem,
550 static const be_abi_callbacks_t sparc_abi_callbacks = {
553 sparc_get_between_type,
558 static const arch_register_t *gp_param_out_regs[] = {
559 &sparc_gp_regs[REG_O0],
560 &sparc_gp_regs[REG_O1],
561 &sparc_gp_regs[REG_O2],
562 &sparc_gp_regs[REG_O3],
563 &sparc_gp_regs[REG_O4],
564 &sparc_gp_regs[REG_O5],
567 static const arch_register_t *gp_param_in_regs[] = {
568 &sparc_gp_regs[REG_I0],
569 &sparc_gp_regs[REG_I1],
570 &sparc_gp_regs[REG_I2],
571 &sparc_gp_regs[REG_I3],
572 &sparc_gp_regs[REG_I4],
573 &sparc_gp_regs[REG_I5],
577 * get register for outgoing parameters 1-6
579 static const arch_register_t *sparc_get_RegParamOut_reg(int n)
581 assert(n < 6 && n >=0 && "trying to get (out) register for param >= 6");
582 return gp_param_out_regs[n];
586 * get register for incoming parameters 1-6
588 static const arch_register_t *sparc_get_RegParamIn_reg(int n)
590 assert(n < 6 && n >=0 && "trying to get (in) register for param >= 6");
591 return gp_param_in_regs[n];
595 * Get the ABI restrictions for procedure calls.
596 * @param self The this pointer.
597 * @param method_type The type of the method (procedure) in question.
598 * @param abi The abi object to be modified
600 static void sparc_get_call_abi(const void *self, ir_type *method_type,
605 int i, n = get_method_n_params(method_type);
606 be_abi_call_flags_t call_flags;
609 /* set abi flags for calls */
610 call_flags.bits.left_to_right = 0;
611 call_flags.bits.store_args_sequential = 1;
612 call_flags.bits.try_omit_fp = 0;
613 call_flags.bits.fp_free = 0;
614 call_flags.bits.call_has_imm = 1;
616 /* set stack parameter passing style */
617 be_abi_call_set_flags(abi, call_flags, &sparc_abi_callbacks);
619 for (i = 0; i < n; i++) {
620 /* reg = get reg for param i; */
621 /* be_abi_call_param_reg(abi, i, reg); */
623 /* pass outgoing params 0-5 via registers, remaining via stack */
624 /* on sparc we need to set the ABI context since register names of parameters change to i0-i5 if we are the callee */
626 be_abi_call_param_reg(abi, i, sparc_get_RegParamOut_reg(i), ABI_CONTEXT_CALLER);
627 be_abi_call_param_reg(abi, i, sparc_get_RegParamIn_reg(i), ABI_CONTEXT_CALLEE);
629 tp = get_method_param_type(method_type, i);
630 mode = get_type_mode(tp);
631 be_abi_call_param_stack(abi, i, mode, 4, 0, 0, ABI_CONTEXT_BOTH); /*< stack args have no special context >*/
635 /* set return value register: return value is in i0 resp. f0 */
636 if (get_method_n_ress(method_type) > 0) {
637 tp = get_method_res_type(method_type, 0);
638 mode = get_type_mode(tp);
640 be_abi_call_res_reg(abi, 0,
641 mode_is_float(mode) ? &sparc_fp_regs[REG_F0] : &sparc_gp_regs[REG_I0], ABI_CONTEXT_CALLEE); /*< return has no special context >*/
643 be_abi_call_res_reg(abi, 0,
644 mode_is_float(mode) ? &sparc_fp_regs[REG_F0] : &sparc_gp_regs[REG_O0], ABI_CONTEXT_CALLER); /*< return has no special context >*/
648 static int sparc_to_appear_in_schedule(void *block_env, const ir_node *irn)
652 if (!is_sparc_irn(irn))
659 * Initializes the code generator interface.
661 static const arch_code_generator_if_t *sparc_get_code_generator_if(
665 return &sparc_code_gen_if;
668 list_sched_selector_t sparc_sched_selector;
671 * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
673 static const list_sched_selector_t *sparc_get_list_sched_selector(
674 const void *self, list_sched_selector_t *selector)
679 sparc_sched_selector = trivial_selector;
680 sparc_sched_selector.to_appear_in_schedule = sparc_to_appear_in_schedule;
681 return &sparc_sched_selector;
684 static const ilp_sched_selector_t *sparc_get_ilp_sched_selector(
692 * Returns the necessary byte alignment for storing a register of given class.
694 static int sparc_get_reg_class_alignment(const arch_register_class_t *cls)
696 ir_mode *mode = arch_register_class_mode(cls);
697 return get_mode_size_bytes(mode);
701 * Returns the libFirm configuration parameter for this backend.
703 static const backend_params *sparc_get_backend_params(void)
705 static backend_params p = {
706 0, /* no dword lowering */
707 0, /* no inline assembly */
708 NULL, /* will be set later */
709 NULL, /* no creator function */
710 NULL, /* context for create_intrinsic_fkt */
711 NULL, /* parameter for if conversion */
712 NULL, /* float arithmetic mode */
713 0, /* no trampoline support: size 0 */
714 0, /* no trampoline support: align 0 */
715 NULL, /* no trampoline support: no trampoline builder */
716 4 /* alignment of stack parameter: typically 4 (32bit) or 8 (64bit) */
721 static const be_execution_unit_t ***sparc_get_allowed_execution_units(
726 panic("sparc_get_allowed_execution_units not implemented yet");
729 static const be_machine_t *sparc_get_machine(const void *self)
733 panic("sparc_get_machine not implemented yet");
736 static ir_graph **sparc_get_backend_irg_list(const void *self,
744 static asm_constraint_flags_t sparc_parse_asm_constraint(const char **c)
747 return ASM_CONSTRAINT_FLAG_INVALID;
750 static int sparc_is_valid_clobber(const char *clobber)
756 const arch_isa_if_t sparc_isa_if = {
759 NULL, /* handle intrinsics */
760 sparc_get_n_reg_class,
762 sparc_get_reg_class_for_mode,
764 sparc_get_code_generator_if,
765 sparc_get_list_sched_selector,
766 sparc_get_ilp_sched_selector,
767 sparc_get_reg_class_alignment,
768 sparc_get_backend_params,
769 sparc_get_allowed_execution_units,
771 sparc_get_backend_irg_list,
772 NULL, /* mark remat */
773 sparc_parse_asm_constraint,
774 sparc_is_valid_clobber
777 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_sparc);
778 void be_init_arch_sparc(void)
780 be_register_isa_if("sparc", &sparc_isa_if);
781 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.cg");
782 sparc_init_transform();
783 sparc_init_emitter();