2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The main sparc backend driver file.
23 * @author Hannes Rapp, Matthias Braun
29 #include "lc_opts_enum.h"
37 #include "iroptimize.h"
42 #include "lower_builtins.h"
43 #include "lower_calls.h"
44 #include "lower_softfloat.h"
52 #include "../bearch.h"
53 #include "../benode.h"
54 #include "../belower.h"
55 #include "../besched.h"
57 #include "../bemachine.h"
58 #include "../bemodule.h"
60 #include "../begnuas.h"
61 #include "../belistsched.h"
62 #include "../beflags.h"
63 #include "../beutil.h"
65 #include "bearch_sparc_t.h"
67 #include "sparc_new_nodes.h"
68 #include "gen_sparc_regalloc_if.h"
69 #include "sparc_transform.h"
70 #include "sparc_emitter.h"
71 #include "sparc_cconv.h"
73 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
75 static arch_irn_class_t sparc_classify(const ir_node *node)
78 return arch_irn_class_none;
81 static ir_entity *sparc_get_frame_entity(const ir_node *node)
83 if (is_sparc_FrameAddr(node)) {
84 const sparc_attr_t *attr = get_sparc_attr_const(node);
85 return attr->immediate_value_entity;
88 if (sparc_has_load_store_attr(node)) {
89 const sparc_load_store_attr_t *load_store_attr
90 = get_sparc_load_store_attr_const(node);
91 if (load_store_attr->is_frame_entity) {
92 return load_store_attr->base.immediate_value_entity;
100 * This function is called by the generic backend to correct offsets for
101 * nodes accessing the stack.
103 static void sparc_set_frame_offset(ir_node *node, int offset)
105 sparc_attr_t *attr = get_sparc_attr(node);
106 attr->immediate_value += offset;
108 /* must be a FrameAddr or a load/store node with frame_entity */
109 assert(is_sparc_FrameAddr(node) ||
110 get_sparc_load_store_attr_const(node)->is_frame_entity);
113 static int sparc_get_sp_bias(const ir_node *node)
115 if (is_sparc_Save(node)) {
116 const sparc_attr_t *attr = get_sparc_attr_const(node);
117 if (get_irn_arity(node) == 3)
118 panic("no support for _reg variant yet");
120 return -attr->immediate_value;
121 } else if (is_sparc_RestoreZero(node)) {
122 return SP_BIAS_RESET;
127 /* fill register allocator interface */
129 const arch_irn_ops_t sparc_irn_ops = {
131 sparc_get_frame_entity,
132 sparc_set_frame_offset,
134 NULL, /* get_inverse */
135 NULL, /* get_op_estimated_cost */
136 NULL, /* possible_memory_operand */
137 NULL, /* perform_memory_operand */
141 * Transforms the standard firm graph into
144 static void sparc_prepare_graph(ir_graph *irg)
146 sparc_transform_graph(irg);
149 static bool sparc_modifies_flags(const ir_node *node)
151 return arch_get_irn_flags(node) & sparc_arch_irn_flag_modifies_flags;
154 static bool sparc_modifies_fp_flags(const ir_node *node)
156 return arch_get_irn_flags(node) & sparc_arch_irn_flag_modifies_fp_flags;
159 static void sparc_before_ra(ir_graph *irg)
161 /* fixup flags register */
162 be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_flags_class],
163 NULL, sparc_modifies_flags);
164 be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_fpflags_class],
165 NULL, sparc_modifies_fp_flags);
168 static void sparc_init_graph(ir_graph *irg)
173 extern const arch_isa_if_t sparc_isa_if;
174 static sparc_isa_t sparc_isa_template = {
176 &sparc_isa_if, /* isa interface implementation */
181 &sparc_registers[REG_SP], /* stack pointer register */
182 &sparc_registers[REG_FRAME_POINTER],/* base pointer register */
183 &sparc_reg_classes[CLASS_sparc_gp], /* link pointer register class */
184 3, /* power of two stack alignment
186 NULL, /* main environment */
187 7, /* costs for a spill instruction */
188 5, /* costs for a reload instruction */
189 true, /* custom abi handling */
191 NULL, /* constants */
192 SPARC_FPU_ARCH_FPU, /* FPU architecture */
196 * rewrite unsigned->float conversion.
197 * Sparc has no instruction for this so instead we do the following:
199 * int signed_x = unsigned_value_x;
200 * double res = signed_x;
202 * res += 4294967296. ;
203 * return (float) res;
205 static void rewrite_unsigned_float_Conv(ir_node *node)
207 ir_graph *irg = get_irn_irg(node);
208 dbg_info *dbgi = get_irn_dbg_info(node);
209 ir_node *lower_block = get_nodes_block(node);
214 ir_node *block = get_nodes_block(node);
215 ir_node *unsigned_x = get_Conv_op(node);
216 ir_mode *mode_u = get_irn_mode(unsigned_x);
217 ir_mode *mode_s = find_signed_mode(mode_u);
218 ir_mode *mode_d = mode_D;
219 ir_node *signed_x = new_rd_Conv(dbgi, block, unsigned_x, mode_s);
220 ir_node *res = new_rd_Conv(dbgi, block, signed_x, mode_d);
221 ir_node *zero = new_r_Const(irg, get_mode_null(mode_s));
222 ir_node *cmp = new_rd_Cmp(dbgi, block, signed_x, zero,
224 ir_node *cond = new_rd_Cond(dbgi, block, cmp);
225 ir_node *proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
226 ir_node *proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
227 ir_node *in_true[1] = { proj_true };
228 ir_node *in_false[1] = { proj_false };
229 ir_node *true_block = new_r_Block(irg, ARRAY_SIZE(in_true), in_true);
230 ir_node *false_block = new_r_Block(irg, ARRAY_SIZE(in_false),in_false);
231 ir_node *true_jmp = new_r_Jmp(true_block);
232 ir_node *false_jmp = new_r_Jmp(false_block);
233 ir_tarval *correction = new_tarval_from_double(4294967296., mode_d);
234 ir_node *c_const = new_r_Const(irg, correction);
235 ir_node *fadd = new_rd_Add(dbgi, true_block, res, c_const,
238 ir_node *lower_in[2] = { true_jmp, false_jmp };
239 ir_node *phi_in[2] = { fadd, res };
240 ir_mode *dest_mode = get_irn_mode(node);
244 set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
245 phi = new_r_Phi(lower_block, ARRAY_SIZE(phi_in), phi_in, mode_d);
246 assert(get_Block_phis(lower_block) == NULL);
247 set_Block_phis(lower_block, phi);
248 set_Phi_next(phi, NULL);
250 res_conv = new_rd_Conv(dbgi, lower_block, phi, dest_mode);
252 exchange(node, res_conv);
256 static int sparc_rewrite_Conv(ir_node *node, void *ctx)
258 ir_mode *to_mode = get_irn_mode(node);
259 ir_node *op = get_Conv_op(node);
260 ir_mode *from_mode = get_irn_mode(op);
263 if (mode_is_float(to_mode) && mode_is_int(from_mode)
264 && get_mode_size_bits(from_mode) == 32
265 && !mode_is_signed(from_mode)) {
266 rewrite_unsigned_float_Conv(node);
273 static void sparc_handle_intrinsics(void)
275 ir_type *tp, *int_tp, *uint_tp;
277 size_t n_records = 0;
279 runtime_rt rt_iMod, rt_uMod;
281 #define ID(x) new_id_from_chars(x, sizeof(x)-1)
283 int_tp = new_type_primitive(mode_Is);
284 uint_tp = new_type_primitive(mode_Iu);
286 /* we need to rewrite some forms of int->float conversions */
288 i_instr_record *map_Conv = &records[n_records++].i_instr;
290 map_Conv->kind = INTRINSIC_INSTR;
291 map_Conv->op = op_Conv;
292 map_Conv->i_mapper = sparc_rewrite_Conv;
294 /* SPARC has no signed mod instruction ... */
296 i_instr_record *map_Mod = &records[n_records++].i_instr;
298 tp = new_type_method(2, 1);
299 set_method_param_type(tp, 0, int_tp);
300 set_method_param_type(tp, 1, int_tp);
301 set_method_res_type(tp, 0, int_tp);
303 rt_iMod.ent = new_entity(get_glob_type(), ID(".rem"), tp);
304 set_entity_ld_ident(rt_iMod.ent, ID(".rem"));
305 rt_iMod.mode = mode_T;
306 rt_iMod.res_mode = mode_Is;
307 rt_iMod.mem_proj_nr = pn_Mod_M;
308 rt_iMod.regular_proj_nr = pn_Mod_X_regular;
309 rt_iMod.exc_proj_nr = pn_Mod_X_except;
310 rt_iMod.res_proj_nr = pn_Mod_res;
312 set_entity_visibility(rt_iMod.ent, ir_visibility_external);
314 map_Mod->kind = INTRINSIC_INSTR;
315 map_Mod->op = op_Mod;
316 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
317 map_Mod->ctx = &rt_iMod;
319 /* ... nor an unsigned mod. */
321 i_instr_record *map_Mod = &records[n_records++].i_instr;
323 tp = new_type_method(2, 1);
324 set_method_param_type(tp, 0, uint_tp);
325 set_method_param_type(tp, 1, uint_tp);
326 set_method_res_type(tp, 0, uint_tp);
328 rt_uMod.ent = new_entity(get_glob_type(), ID(".urem"), tp);
329 set_entity_ld_ident(rt_uMod.ent, ID(".urem"));
330 rt_uMod.mode = mode_T;
331 rt_uMod.res_mode = mode_Iu;
332 rt_uMod.mem_proj_nr = pn_Mod_M;
333 rt_uMod.regular_proj_nr = pn_Mod_X_regular;
334 rt_uMod.exc_proj_nr = pn_Mod_X_except;
335 rt_uMod.res_proj_nr = pn_Mod_res;
337 set_entity_visibility(rt_uMod.ent, ir_visibility_external);
339 map_Mod->kind = INTRINSIC_INSTR;
340 map_Mod->op = op_Mod;
341 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
342 map_Mod->ctx = &rt_uMod;
345 assert(n_records < ARRAY_SIZE(records));
346 lower_intrinsics(records, n_records, /*part_block_used=*/ true);
350 * Initializes the backend ISA
352 static arch_env_t *sparc_init(FILE *outfile)
354 sparc_isa_t *isa = XMALLOC(sparc_isa_t);
355 *isa = sparc_isa_template;
356 isa->constants = pmap_create();
358 be_gas_elf_type_char = '#';
359 be_gas_object_file_format = OBJECT_FILE_FORMAT_ELF_SPARC;
361 be_emit_init(outfile);
363 sparc_register_init();
364 sparc_create_opcodes(&sparc_irn_ops);
365 sparc_handle_intrinsics();
372 * Closes the output file and frees the ISA structure.
374 static void sparc_done(void *self)
376 sparc_isa_t *isa = (sparc_isa_t*)self;
378 /* emit now all global declarations */
379 be_gas_emit_decls(isa->base.main_env);
381 pmap_destroy(isa->constants);
388 * Get the register class which shall be used to store a value of a given mode.
389 * @param self The this pointer.
390 * @param mode The mode in question.
391 * @return A register class which can hold values of the given mode.
393 static const arch_register_class_t *sparc_get_reg_class_for_mode(const ir_mode *mode)
395 if (mode_is_float(mode))
396 return &sparc_reg_classes[CLASS_sparc_fp];
398 return &sparc_reg_classes[CLASS_sparc_gp];
402 * Returns the necessary byte alignment for storing a register of given class.
404 static int sparc_get_reg_class_alignment(const arch_register_class_t *cls)
406 ir_mode *mode = arch_register_class_mode(cls);
407 return get_mode_size_bytes(mode);
410 static ir_node *sparc_create_set(ir_node *cond)
412 return ir_create_cond_set(cond, mode_Iu);
415 static void sparc_lower_for_target(void)
417 size_t i, n_irgs = get_irp_n_irgs();
418 lower_mode_b_config_t lower_mode_b_config = {
424 lower_calls_with_compounds(LF_RETURN_HIDDEN);
426 if (sparc_isa_template.fpu_arch == SPARC_FPU_ARCH_SOFTFLOAT)
427 lower_floating_point();
429 lower_builtins(0, NULL);
433 for (i = 0; i < n_irgs; ++i) {
434 ir_graph *irg = get_irp_irg(i);
435 ir_lower_mode_b(irg, &lower_mode_b_config);
436 lower_switch(irg, 4, 256, false);
439 for (i = 0; i < n_irgs; ++i) {
440 ir_graph *irg = get_irp_irg(i);
441 /* Turn all small CopyBs into loads/stores and all bigger CopyBs into
443 lower_CopyB(irg, 31, 32);
447 static int sparc_is_mux_allowed(ir_node *sel, ir_node *mux_false,
450 ir_graph *irg = get_irn_irg(sel);
451 ir_mode *mode = get_irn_mode(mux_true);
453 if (get_irg_phase_state(irg) == phase_low)
456 if (!mode_is_int(mode) && !mode_is_reference(mode) && mode != mode_b)
458 if (is_Const(mux_true) && is_Const_one(mux_true) &&
459 is_Const(mux_false) && is_Const_null(mux_false))
465 * Returns the libFirm configuration parameter for this backend.
467 static const backend_params *sparc_get_backend_params(void)
469 static const ir_settings_arch_dep_t arch_dep = {
470 1, /* also_use_subs */
471 1, /* maximum_shifts */
472 31, /* highest_shift_amount */
473 NULL, /* evaluate_cost_func */
476 32, /* max_bits_for_mulh */
478 static backend_params p = {
479 0, /* no inline assembly */
480 0, /* no support for RotL nodes */
482 1, /* modulo shift efficient */
483 0, /* non-modulo shift not efficient */
484 &arch_dep, /* will be set later */
485 sparc_is_mux_allowed, /* parameter for if conversion */
486 32, /* machine size */
487 NULL, /* float arithmetic mode */
488 NULL, /* long long type */
489 NULL, /* usigned long long type */
490 NULL, /* long double type */
491 0, /* no trampoline support: size 0 */
492 0, /* no trampoline support: align 0 */
493 NULL, /* no trampoline support: no trampoline builder */
494 4 /* alignment of stack parameter: typically 4 (32bit) or 8 (64bit) */
497 ir_mode *mode_long_long
498 = new_ir_mode("long long", irms_int_number, 64, 1, irma_twos_complement,
500 ir_type *type_long_long = new_type_primitive(mode_long_long);
501 ir_mode *mode_unsigned_long_long
502 = new_ir_mode("unsigned long long", irms_int_number, 64, 0,
503 irma_twos_complement, 64);
504 ir_type *type_unsigned_long_long
505 = new_type_primitive(mode_unsigned_long_long);
506 ir_mode *mode_long_double
507 = new_ir_mode("long double", irms_float_number, 128, 1,
509 ir_type *type_long_double = new_type_primitive(mode_long_double);
511 set_type_alignment_bytes(type_long_double, 8);
512 p.type_long_double = type_long_double;
513 p.type_long_long = type_long_long;
514 p.type_unsigned_long_long = type_unsigned_long_long;
518 static ir_graph **sparc_get_backend_irg_list(const void *self,
526 static asm_constraint_flags_t sparc_parse_asm_constraint(const char **c)
529 return ASM_CONSTRAINT_FLAG_INVALID;
532 static int sparc_is_valid_clobber(const char *clobber)
538 /* fpu set architectures. */
539 static const lc_opt_enum_int_items_t sparc_fpu_items[] = {
540 { "fpu", SPARC_FPU_ARCH_FPU },
541 { "softfloat", SPARC_FPU_ARCH_SOFTFLOAT },
545 static lc_opt_enum_int_var_t arch_fpu_var = {
546 &sparc_isa_template.fpu_arch, sparc_fpu_items
549 static const lc_opt_table_entry_t sparc_options[] = {
550 LC_OPT_ENT_ENUM_INT("fpunit", "select the floating point unit", &arch_fpu_var),
554 static ir_node *sparc_new_spill(ir_node *value, ir_node *after)
556 ir_node *block = get_block(after);
557 ir_graph *irg = get_irn_irg(value);
558 ir_node *frame = get_irg_frame(irg);
559 ir_node *mem = get_irg_no_mem(irg);
560 ir_mode *mode = get_irn_mode(value);
563 if (mode_is_float(mode)) {
564 store = create_stf(NULL, block, value, frame, mem, mode, NULL, 0, true);
566 store = new_bd_sparc_St_imm(NULL, block, value, frame, mem, mode, NULL,
569 sched_add_after(after, store);
573 static ir_node *sparc_new_reload(ir_node *value, ir_node *spill,
576 ir_node *block = get_block(before);
577 ir_graph *irg = get_irn_irg(value);
578 ir_node *frame = get_irg_frame(irg);
579 ir_mode *mode = get_irn_mode(value);
583 if (mode_is_float(mode)) {
584 load = create_ldf(NULL, block, frame, spill, mode, NULL, 0, true);
586 load = new_bd_sparc_Ld_imm(NULL, block, frame, spill, mode, NULL, 0,
589 sched_add_before(before, load);
590 assert((long)pn_sparc_Ld_res == (long)pn_sparc_Ldf_res);
591 res = new_r_Proj(load, mode, pn_sparc_Ld_res);
596 const arch_isa_if_t sparc_isa_if = {
598 sparc_lower_for_target,
600 NULL, /* handle intrinsics */
601 sparc_get_reg_class_for_mode,
603 sparc_get_reg_class_alignment,
604 sparc_get_backend_params,
605 sparc_get_backend_irg_list,
606 NULL, /* mark remat */
607 sparc_parse_asm_constraint,
608 sparc_is_valid_clobber,
611 NULL, /* get_pic_base */
612 NULL, /* before_abi */
617 NULL, /* register_saved_by */
622 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_sparc)
623 void be_init_arch_sparc(void)
625 lc_opt_entry_t *be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
626 lc_opt_entry_t *sparc_grp = lc_opt_get_grp(be_grp, "sparc");
628 lc_opt_add_table(sparc_grp, sparc_options);
630 be_register_isa_if("sparc", &sparc_isa_if);
631 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.cg");
632 sparc_init_transform();
633 sparc_init_emitter();