2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The main sparc backend driver file.
28 #include "lc_opts_enum.h"
36 #include "iroptimize.h"
47 #include "../bearch.h"
48 #include "../benode.h"
49 #include "../belower.h"
50 #include "../besched.h"
52 #include "../bemachine.h"
53 #include "../bemodule.h"
55 #include "../bespillslots.h"
56 #include "../begnuas.h"
57 #include "../belistsched.h"
58 #include "../beflags.h"
60 #include "bearch_sparc_t.h"
62 #include "sparc_new_nodes.h"
63 #include "gen_sparc_regalloc_if.h"
64 #include "sparc_transform.h"
65 #include "sparc_emitter.h"
67 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
69 static arch_irn_class_t sparc_classify(const ir_node *node)
75 static ir_entity *sparc_get_frame_entity(const ir_node *node)
77 if (is_sparc_FrameAddr(node)) {
78 const sparc_attr_t *attr = get_sparc_attr_const(node);
79 return attr->immediate_value_entity;
82 if (sparc_has_load_store_attr(node)) {
83 const sparc_load_store_attr_t *load_store_attr
84 = get_sparc_load_store_attr_const(node);
85 if (load_store_attr->is_frame_entity) {
86 return load_store_attr->base.immediate_value_entity;
94 * This function is called by the generic backend to correct offsets for
95 * nodes accessing the stack.
97 static void sparc_set_frame_offset(ir_node *node, int offset)
99 sparc_attr_t *attr = get_sparc_attr(node);
100 attr->immediate_value += offset;
102 /* must be a FrameAddr or a load/store node with frame_entity */
103 assert(is_sparc_FrameAddr(node) ||
104 get_sparc_load_store_attr_const(node)->is_frame_entity);
107 static int sparc_get_sp_bias(const ir_node *node)
109 if (is_sparc_Save(node)) {
110 const sparc_save_attr_t *attr = get_sparc_save_attr_const(node);
111 /* Note we do not retport the change of the SPARC_MIN_STACKSIZE
112 * size, since we have additional magic in the emitter which
113 * calculates that! */
114 assert(attr->initial_stacksize >= SPARC_MIN_STACKSIZE);
115 return attr->initial_stacksize - SPARC_MIN_STACKSIZE;
120 /* fill register allocator interface */
122 static const arch_irn_ops_t sparc_irn_ops = {
124 sparc_get_frame_entity,
125 sparc_set_frame_offset,
127 NULL, /* get_inverse */
128 NULL, /* get_op_estimated_cost */
129 NULL, /* possible_memory_operand */
130 NULL, /* perform_memory_operand */
134 * Transforms the standard firm graph into
137 static void sparc_prepare_graph(ir_graph *irg)
139 sparc_transform_graph(irg);
142 static bool sparc_modifies_flags(const ir_node *node)
144 return arch_irn_get_flags(node) & sparc_arch_irn_flag_modifies_flags;
147 static bool sparc_modifies_fp_flags(const ir_node *node)
149 return arch_irn_get_flags(node) & sparc_arch_irn_flag_modifies_fp_flags;
152 static void sparc_before_ra(ir_graph *irg)
154 /* fixup flags register */
155 be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_flags_class],
156 NULL, sparc_modifies_flags);
157 be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_fpflags_class],
158 NULL, sparc_modifies_fp_flags);
162 * transform reload node => load
164 static void transform_Reload(ir_node *node)
166 ir_node *block = get_nodes_block(node);
167 dbg_info *dbgi = get_irn_dbg_info(node);
168 ir_node *ptr = get_irn_n(node, be_pos_Spill_frame);
169 ir_node *mem = get_irn_n(node, be_pos_Reload_mem);
170 ir_mode *mode = get_irn_mode(node);
171 ir_entity *entity = be_get_frame_entity(node);
172 const arch_register_t *reg;
176 ir_node *sched_point = sched_prev(node);
178 load = new_bd_sparc_Ld_imm(dbgi, block, ptr, mem, mode, entity, 0, true);
179 sched_add_after(sched_point, load);
182 proj = new_rd_Proj(dbgi, load, mode, pn_sparc_Ld_res);
184 reg = arch_get_irn_register(node);
185 arch_set_irn_register(proj, reg);
187 exchange(node, proj);
191 * transform spill node => store
193 static void transform_Spill(ir_node *node)
195 ir_node *block = get_nodes_block(node);
196 dbg_info *dbgi = get_irn_dbg_info(node);
197 ir_node *ptr = get_irn_n(node, be_pos_Spill_frame);
198 ir_node *mem = new_NoMem();
199 ir_node *val = get_irn_n(node, be_pos_Spill_val);
200 ir_mode *mode = get_irn_mode(val);
201 ir_entity *entity = be_get_frame_entity(node);
202 ir_node *sched_point;
205 sched_point = sched_prev(node);
206 store = new_bd_sparc_St_imm(dbgi, block, val, ptr, mem, mode, entity, 0, true);
208 sched_add_after(sched_point, store);
210 exchange(node, store);
214 * walker to transform be_Spill and be_Reload nodes
216 static void sparc_after_ra_walker(ir_node *block, void *data)
218 ir_node *node, *prev;
221 for (node = sched_last(block); !sched_is_begin(node); node = prev) {
222 prev = sched_prev(node);
224 if (be_is_Reload(node)) {
225 transform_Reload(node);
226 } else if (be_is_Spill(node)) {
227 transform_Spill(node);
232 static void sparc_collect_frame_entity_nodes(ir_node *node, void *data)
234 be_fec_env_t *env = data;
238 const sparc_load_store_attr_t *attr;
240 if (be_is_Reload(node) && be_get_frame_entity(node) == NULL) {
241 mode = get_irn_mode(node);
242 align = get_mode_size_bytes(mode);
243 be_node_needs_frame_entity(env, node, mode, align);
247 if (!is_sparc_Ld(node) && !is_sparc_Ldf(node))
250 attr = get_sparc_load_store_attr_const(node);
251 entity = attr->base.immediate_value_entity;
252 mode = attr->load_store_mode;
255 if (!attr->is_frame_entity)
257 if (arch_irn_get_flags(node) & sparc_arch_irn_flag_needs_64bit_spillslot)
259 align = get_mode_size_bytes(mode);
260 be_node_needs_frame_entity(env, node, mode, align);
263 static void sparc_set_frame_entity(ir_node *node, ir_entity *entity)
265 if (is_be_node(node)) {
266 be_node_set_frame_entity(node, entity);
268 /* we only say be_node_needs_frame_entity on nodes with load_store
269 * attributes, so this should be fine */
270 sparc_load_store_attr_t *attr = get_sparc_load_store_attr(node);
271 assert(attr->is_frame_entity);
272 assert(attr->base.immediate_value_entity == NULL);
273 attr->base.immediate_value_entity = entity;
277 static void sparc_after_ra(ir_graph *irg)
279 be_fec_env_t *fec_env = be_new_frame_entity_coalescer(irg);
281 irg_walk_graph(irg, NULL, sparc_collect_frame_entity_nodes, fec_env);
282 be_assign_entities(fec_env, sparc_set_frame_entity);
283 be_free_frame_entity_coalescer(fec_env);
285 irg_block_walk_graph(irg, NULL, sparc_after_ra_walker, NULL);
288 static void sparc_init_graph(ir_graph *irg)
293 const arch_isa_if_t sparc_isa_if;
294 static sparc_isa_t sparc_isa_template = {
296 &sparc_isa_if, /* isa interface implementation */
297 &sparc_gp_regs[REG_SP], /* stack pointer register */
298 &sparc_gp_regs[REG_FRAME_POINTER], /* base pointer register */
299 &sparc_reg_classes[CLASS_sparc_gp], /* link pointer register class */
300 -1, /* stack direction */
301 3, /* power of two stack alignment
303 NULL, /* main environment */
304 7, /* costs for a spill instruction */
305 5, /* costs for a reload instruction */
306 true, /* custom abi handling */
308 NULL, /* constants */
312 * rewrite unsigned->float conversion.
313 * Sparc has no instruction for this so instead we do the following:
315 * int signed_x = unsigned_value_x;
316 * double res = signed_x;
318 * res += 4294967296. ;
319 * return (float) res;
321 static void rewrite_unsigned_float_Conv(ir_node *node)
323 ir_graph *irg = get_irn_irg(node);
324 dbg_info *dbgi = get_irn_dbg_info(node);
325 ir_node *lower_block = get_nodes_block(node);
330 ir_node *block = get_nodes_block(node);
331 ir_node *unsigned_x = get_Conv_op(node);
332 ir_mode *mode_u = get_irn_mode(unsigned_x);
333 ir_mode *mode_s = find_signed_mode(mode_u);
334 ir_mode *mode_d = mode_D;
335 ir_node *signed_x = new_rd_Conv(dbgi, block, unsigned_x, mode_s);
336 ir_node *res = new_rd_Conv(dbgi, block, signed_x, mode_d);
337 ir_node *zero = new_r_Const(irg, get_mode_null(mode_s));
338 ir_node *cmp = new_rd_Cmp(dbgi, block, signed_x, zero);
339 ir_node *proj_lt = new_r_Proj(cmp, mode_b, pn_Cmp_Lt);
340 ir_node *cond = new_rd_Cond(dbgi, block, proj_lt);
341 ir_node *proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
342 ir_node *proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
343 ir_node *in_true[1] = { proj_true };
344 ir_node *in_false[1] = { proj_false };
345 ir_node *true_block = new_r_Block(irg, ARRAY_SIZE(in_true), in_true);
346 ir_node *false_block = new_r_Block(irg, ARRAY_SIZE(in_false),in_false);
347 ir_node *true_jmp = new_r_Jmp(true_block);
348 ir_node *false_jmp = new_r_Jmp(false_block);
349 tarval *correction = new_tarval_from_double(4294967296., mode_d);
350 ir_node *c_const = new_r_Const(irg, correction);
351 ir_node *fadd = new_rd_Add(dbgi, true_block, res, c_const,
354 ir_node *lower_in[2] = { true_jmp, false_jmp };
355 ir_node *phi_in[2] = { fadd, res };
356 ir_mode *dest_mode = get_irn_mode(node);
360 set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
361 phi = new_r_Phi(lower_block, ARRAY_SIZE(phi_in), phi_in, mode_d);
362 assert(get_Block_phis(lower_block) == NULL);
363 set_Block_phis(lower_block, phi);
364 set_Phi_next(phi, NULL);
366 res_conv = new_rd_Conv(dbgi, lower_block, phi, dest_mode);
368 exchange(node, res_conv);
372 static int sparc_rewrite_Conv(ir_node *node, void *ctx)
374 ir_mode *to_mode = get_irn_mode(node);
375 ir_node *op = get_Conv_op(node);
376 ir_mode *from_mode = get_irn_mode(op);
379 if (mode_is_float(to_mode) && mode_is_int(from_mode)
380 && get_mode_size_bits(from_mode) == 32
381 && !mode_is_signed(from_mode)) {
382 rewrite_unsigned_float_Conv(node);
389 static void sparc_handle_intrinsics(void)
391 ir_type *tp, *int_tp, *uint_tp;
393 size_t n_records = 0;
395 runtime_rt rt_iMod, rt_uMod;
397 #define ID(x) new_id_from_chars(x, sizeof(x)-1)
399 int_tp = new_type_primitive(mode_Is);
400 uint_tp = new_type_primitive(mode_Iu);
402 /* we need to rewrite some forms of int->float conversions */
404 i_instr_record *map_Conv = &records[n_records++].i_instr;
406 map_Conv->kind = INTRINSIC_INSTR;
407 map_Conv->op = op_Conv;
408 map_Conv->i_mapper = sparc_rewrite_Conv;
410 /* SPARC has no signed mod instruction ... */
412 i_instr_record *map_Mod = &records[n_records++].i_instr;
414 tp = new_type_method(2, 1);
415 set_method_param_type(tp, 0, int_tp);
416 set_method_param_type(tp, 1, int_tp);
417 set_method_res_type(tp, 0, int_tp);
419 rt_iMod.ent = new_entity(get_glob_type(), ID(".rem"), tp);
420 set_entity_ld_ident(rt_iMod.ent, ID(".rem"));
421 rt_iMod.mode = mode_T;
422 rt_iMod.res_mode = mode_Is;
423 rt_iMod.mem_proj_nr = pn_Mod_M;
424 rt_iMod.regular_proj_nr = pn_Mod_X_regular;
425 rt_iMod.exc_proj_nr = pn_Mod_X_except;
426 rt_iMod.exc_mem_proj_nr = pn_Mod_M;
427 rt_iMod.res_proj_nr = pn_Mod_res;
429 set_entity_visibility(rt_iMod.ent, ir_visibility_external);
431 map_Mod->kind = INTRINSIC_INSTR;
432 map_Mod->op = op_Mod;
433 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
434 map_Mod->ctx = &rt_iMod;
436 /* ... nor an unsigned mod. */
438 i_instr_record *map_Mod = &records[n_records++].i_instr;
440 tp = new_type_method(2, 1);
441 set_method_param_type(tp, 0, uint_tp);
442 set_method_param_type(tp, 1, uint_tp);
443 set_method_res_type(tp, 0, uint_tp);
445 rt_uMod.ent = new_entity(get_glob_type(), ID(".urem"), tp);
446 set_entity_ld_ident(rt_uMod.ent, ID(".urem"));
447 rt_uMod.mode = mode_T;
448 rt_uMod.res_mode = mode_Iu;
449 rt_uMod.mem_proj_nr = pn_Mod_M;
450 rt_uMod.regular_proj_nr = pn_Mod_X_regular;
451 rt_uMod.exc_proj_nr = pn_Mod_X_except;
452 rt_uMod.exc_mem_proj_nr = pn_Mod_M;
453 rt_uMod.res_proj_nr = pn_Mod_res;
455 set_entity_visibility(rt_uMod.ent, ir_visibility_external);
457 map_Mod->kind = INTRINSIC_INSTR;
458 map_Mod->op = op_Mod;
459 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
460 map_Mod->ctx = &rt_uMod;
463 assert(n_records < ARRAY_SIZE(records));
464 lower_intrinsics(records, n_records, /*part_block_used=*/ true);
468 * Initializes the backend ISA
470 static arch_env_t *sparc_init(FILE *outfile)
472 static int run_once = 0;
479 isa = XMALLOC(sparc_isa_t);
480 memcpy(isa, &sparc_isa_template, sizeof(*isa));
481 isa->constants = pmap_create();
483 be_emit_init(outfile);
485 sparc_register_init();
486 sparc_create_opcodes(&sparc_irn_ops);
487 sparc_handle_intrinsics();
493 * Closes the output file and frees the ISA structure.
495 static void sparc_done(void *self)
497 sparc_isa_t *isa = self;
499 /* emit now all global declarations */
500 be_gas_emit_decls(isa->base.main_env);
502 pmap_destroy(isa->constants);
507 static unsigned sparc_get_n_reg_class(void)
512 static const arch_register_class_t *sparc_get_reg_class(unsigned i)
514 assert(i < N_CLASSES);
515 return &sparc_reg_classes[i];
521 * Get the register class which shall be used to store a value of a given mode.
522 * @param self The this pointer.
523 * @param mode The mode in question.
524 * @return A register class which can hold values of the given mode.
526 static const arch_register_class_t *sparc_get_reg_class_for_mode(const ir_mode *mode)
528 if (mode_is_float(mode))
529 return &sparc_reg_classes[CLASS_sparc_fp];
531 return &sparc_reg_classes[CLASS_sparc_gp];
535 * Returns the necessary byte alignment for storing a register of given class.
537 static int sparc_get_reg_class_alignment(const arch_register_class_t *cls)
539 ir_mode *mode = arch_register_class_mode(cls);
540 return get_mode_size_bytes(mode);
543 static void sparc_lower_for_target(void)
546 int n_irgs = get_irp_n_irgs();
548 /* TODO, doubleword lowering and others */
550 for (i = 0; i < n_irgs; ++i) {
551 ir_graph *irg = get_irp_irg(i);
552 lower_switch(irg, 256, false);
556 static int sparc_is_mux_allowed(ir_node *sel, ir_node *mux_false,
566 * Returns the libFirm configuration parameter for this backend.
568 static const backend_params *sparc_get_backend_params(void)
570 static const ir_settings_arch_dep_t arch_dep = {
571 1, /* also_use_subs */
572 1, /* maximum_shifts */
573 31, /* highest_shift_amount */
574 NULL, /* evaluate_cost_func */
577 32, /* max_bits_for_mulh */
579 static backend_params p = {
580 0, /* no inline assembly */
581 0, /* no support for RotL nodes */
583 sparc_lower_for_target, /* lowering callback */
584 &arch_dep, /* will be set later */
585 sparc_is_mux_allowed, /* parameter for if conversion */
586 NULL, /* float arithmetic mode */
587 0, /* no trampoline support: size 0 */
588 0, /* no trampoline support: align 0 */
589 NULL, /* no trampoline support: no trampoline builder */
590 4 /* alignment of stack parameter: typically 4 (32bit) or 8 (64bit) */
595 static ir_graph **sparc_get_backend_irg_list(const void *self,
603 static asm_constraint_flags_t sparc_parse_asm_constraint(const char **c)
606 return ASM_CONSTRAINT_FLAG_INVALID;
609 static int sparc_is_valid_clobber(const char *clobber)
615 const arch_isa_if_t sparc_isa_if = {
618 NULL, /* handle intrinsics */
619 sparc_get_n_reg_class,
621 sparc_get_reg_class_for_mode,
623 sparc_get_reg_class_alignment,
624 sparc_get_backend_params,
625 sparc_get_backend_irg_list,
626 NULL, /* mark remat */
627 sparc_parse_asm_constraint,
628 sparc_is_valid_clobber,
631 NULL, /* get_pic_base */
632 NULL, /* before_abi */
640 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_sparc);
641 void be_init_arch_sparc(void)
643 be_register_isa_if("sparc", &sparc_isa_if);
644 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.cg");
645 sparc_init_transform();
646 sparc_init_emitter();