2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The main sparc backend driver file.
28 #include "lc_opts_enum.h"
36 #include "iroptimize.h"
47 #include "../bearch.h"
48 #include "../benode.h"
49 #include "../belower.h"
50 #include "../besched.h"
52 #include "../bemachine.h"
53 #include "../bemodule.h"
55 #include "../bespillslots.h"
56 #include "../begnuas.h"
57 #include "../belistsched.h"
58 #include "../beflags.h"
60 #include "bearch_sparc_t.h"
62 #include "sparc_new_nodes.h"
63 #include "gen_sparc_regalloc_if.h"
64 #include "sparc_transform.h"
65 #include "sparc_emitter.h"
67 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
69 static arch_irn_class_t sparc_classify(const ir_node *node)
75 static ir_entity *sparc_get_frame_entity(const ir_node *node)
77 if (is_sparc_FrameAddr(node)) {
78 const sparc_attr_t *attr = get_sparc_attr_const(node);
79 return attr->immediate_value_entity;
82 if (sparc_has_load_store_attr(node)) {
83 const sparc_load_store_attr_t *load_store_attr
84 = get_sparc_load_store_attr_const(node);
85 if (load_store_attr->is_frame_entity) {
86 return load_store_attr->base.immediate_value_entity;
94 * This function is called by the generic backend to correct offsets for
95 * nodes accessing the stack.
97 static void sparc_set_frame_offset(ir_node *node, int offset)
99 sparc_attr_t *attr = get_sparc_attr(node);
100 attr->immediate_value += offset;
102 /* must be a FrameAddr or a load/store node with frame_entity */
103 assert(is_sparc_FrameAddr(node) ||
104 get_sparc_load_store_attr_const(node)->is_frame_entity);
107 static int sparc_get_sp_bias(const ir_node *node)
109 if (is_sparc_Save(node)) {
110 const sparc_save_attr_t *attr = get_sparc_save_attr_const(node);
111 /* Note we do not retport the change of the SPARC_MIN_STACKSIZE
112 * size, since we have additional magic in the emitter which
113 * calculates that! */
114 assert(attr->initial_stacksize >= SPARC_MIN_STACKSIZE);
115 return attr->initial_stacksize - SPARC_MIN_STACKSIZE;
120 /* fill register allocator interface */
122 static const arch_irn_ops_t sparc_irn_ops = {
124 sparc_get_frame_entity,
125 sparc_set_frame_offset,
127 NULL, /* get_inverse */
128 NULL, /* get_op_estimated_cost */
129 NULL, /* possible_memory_operand */
130 NULL, /* perform_memory_operand */
134 * Transforms the standard firm graph into
137 static void sparc_prepare_graph(ir_graph *irg)
139 sparc_transform_graph(irg);
142 static bool sparc_modifies_flags(const ir_node *node)
144 return arch_irn_get_flags(node) & sparc_arch_irn_flag_modifies_flags;
147 static bool sparc_modifies_fp_flags(const ir_node *node)
149 return arch_irn_get_flags(node) & sparc_arch_irn_flag_modifies_fp_flags;
152 static void sparc_before_ra(ir_graph *irg)
154 /* fixup flags register */
155 be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_flags_class],
156 NULL, sparc_modifies_flags);
157 be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_fpflags_class],
158 NULL, sparc_modifies_fp_flags);
162 * transform reload node => load
164 static void transform_Reload(ir_node *node)
166 ir_node *block = get_nodes_block(node);
167 dbg_info *dbgi = get_irn_dbg_info(node);
168 ir_node *ptr = get_irn_n(node, be_pos_Spill_frame);
169 ir_node *mem = get_irn_n(node, be_pos_Reload_mem);
170 ir_mode *mode = get_irn_mode(node);
171 ir_entity *entity = be_get_frame_entity(node);
172 const arch_register_t *reg;
176 ir_node *sched_point = sched_prev(node);
178 load = new_bd_sparc_Ld_imm(dbgi, block, ptr, mem, mode, entity, 0, true);
179 sched_add_after(sched_point, load);
182 proj = new_rd_Proj(dbgi, load, mode, pn_sparc_Ld_res);
184 reg = arch_get_irn_register(node);
185 arch_set_irn_register(proj, reg);
187 exchange(node, proj);
191 * transform spill node => store
193 static void transform_Spill(ir_node *node)
195 ir_node *block = get_nodes_block(node);
196 dbg_info *dbgi = get_irn_dbg_info(node);
197 ir_node *ptr = get_irn_n(node, be_pos_Spill_frame);
198 ir_graph *irg = get_irn_irg(node);
199 ir_node *mem = new_r_NoMem(irg);
200 ir_node *val = get_irn_n(node, be_pos_Spill_val);
201 ir_mode *mode = get_irn_mode(val);
202 ir_entity *entity = be_get_frame_entity(node);
203 ir_node *sched_point;
206 sched_point = sched_prev(node);
207 store = new_bd_sparc_St_imm(dbgi, block, val, ptr, mem, mode, entity, 0, true);
209 sched_add_after(sched_point, store);
211 exchange(node, store);
215 * walker to transform be_Spill and be_Reload nodes
217 static void sparc_after_ra_walker(ir_node *block, void *data)
219 ir_node *node, *prev;
222 for (node = sched_last(block); !sched_is_begin(node); node = prev) {
223 prev = sched_prev(node);
225 if (be_is_Reload(node)) {
226 transform_Reload(node);
227 } else if (be_is_Spill(node)) {
228 transform_Spill(node);
233 static void sparc_collect_frame_entity_nodes(ir_node *node, void *data)
235 be_fec_env_t *env = data;
239 const sparc_load_store_attr_t *attr;
241 if (be_is_Reload(node) && be_get_frame_entity(node) == NULL) {
242 mode = get_irn_mode(node);
243 align = get_mode_size_bytes(mode);
244 be_node_needs_frame_entity(env, node, mode, align);
248 if (!is_sparc_Ld(node) && !is_sparc_Ldf(node))
251 attr = get_sparc_load_store_attr_const(node);
252 entity = attr->base.immediate_value_entity;
253 mode = attr->load_store_mode;
256 if (!attr->is_frame_entity)
258 if (arch_irn_get_flags(node) & sparc_arch_irn_flag_needs_64bit_spillslot)
260 align = get_mode_size_bytes(mode);
261 be_node_needs_frame_entity(env, node, mode, align);
264 static void sparc_set_frame_entity(ir_node *node, ir_entity *entity)
266 if (is_be_node(node)) {
267 be_node_set_frame_entity(node, entity);
269 /* we only say be_node_needs_frame_entity on nodes with load_store
270 * attributes, so this should be fine */
271 sparc_load_store_attr_t *attr = get_sparc_load_store_attr(node);
272 assert(attr->is_frame_entity);
273 assert(attr->base.immediate_value_entity == NULL);
274 attr->base.immediate_value_entity = entity;
278 static void sparc_after_ra(ir_graph *irg)
280 be_fec_env_t *fec_env = be_new_frame_entity_coalescer(irg);
282 irg_walk_graph(irg, NULL, sparc_collect_frame_entity_nodes, fec_env);
283 be_assign_entities(fec_env, sparc_set_frame_entity);
284 be_free_frame_entity_coalescer(fec_env);
286 irg_block_walk_graph(irg, NULL, sparc_after_ra_walker, NULL);
289 static void sparc_init_graph(ir_graph *irg)
294 const arch_isa_if_t sparc_isa_if;
295 static sparc_isa_t sparc_isa_template = {
297 &sparc_isa_if, /* isa interface implementation */
302 &sparc_registers[REG_SP], /* stack pointer register */
303 &sparc_registers[REG_FRAME_POINTER],/* base pointer register */
304 &sparc_reg_classes[CLASS_sparc_gp], /* link pointer register class */
305 -1, /* stack direction */
306 3, /* power of two stack alignment
308 NULL, /* main environment */
309 7, /* costs for a spill instruction */
310 5, /* costs for a reload instruction */
311 true, /* custom abi handling */
313 NULL, /* constants */
317 * rewrite unsigned->float conversion.
318 * Sparc has no instruction for this so instead we do the following:
320 * int signed_x = unsigned_value_x;
321 * double res = signed_x;
323 * res += 4294967296. ;
324 * return (float) res;
326 static void rewrite_unsigned_float_Conv(ir_node *node)
328 ir_graph *irg = get_irn_irg(node);
329 dbg_info *dbgi = get_irn_dbg_info(node);
330 ir_node *lower_block = get_nodes_block(node);
335 ir_node *block = get_nodes_block(node);
336 ir_node *unsigned_x = get_Conv_op(node);
337 ir_mode *mode_u = get_irn_mode(unsigned_x);
338 ir_mode *mode_s = find_signed_mode(mode_u);
339 ir_mode *mode_d = mode_D;
340 ir_node *signed_x = new_rd_Conv(dbgi, block, unsigned_x, mode_s);
341 ir_node *res = new_rd_Conv(dbgi, block, signed_x, mode_d);
342 ir_node *zero = new_r_Const(irg, get_mode_null(mode_s));
343 ir_node *cmp = new_rd_Cmp(dbgi, block, signed_x, zero);
344 ir_node *proj_lt = new_r_Proj(cmp, mode_b, pn_Cmp_Lt);
345 ir_node *cond = new_rd_Cond(dbgi, block, proj_lt);
346 ir_node *proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
347 ir_node *proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
348 ir_node *in_true[1] = { proj_true };
349 ir_node *in_false[1] = { proj_false };
350 ir_node *true_block = new_r_Block(irg, ARRAY_SIZE(in_true), in_true);
351 ir_node *false_block = new_r_Block(irg, ARRAY_SIZE(in_false),in_false);
352 ir_node *true_jmp = new_r_Jmp(true_block);
353 ir_node *false_jmp = new_r_Jmp(false_block);
354 tarval *correction = new_tarval_from_double(4294967296., mode_d);
355 ir_node *c_const = new_r_Const(irg, correction);
356 ir_node *fadd = new_rd_Add(dbgi, true_block, res, c_const,
359 ir_node *lower_in[2] = { true_jmp, false_jmp };
360 ir_node *phi_in[2] = { fadd, res };
361 ir_mode *dest_mode = get_irn_mode(node);
365 set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
366 phi = new_r_Phi(lower_block, ARRAY_SIZE(phi_in), phi_in, mode_d);
367 assert(get_Block_phis(lower_block) == NULL);
368 set_Block_phis(lower_block, phi);
369 set_Phi_next(phi, NULL);
371 res_conv = new_rd_Conv(dbgi, lower_block, phi, dest_mode);
373 exchange(node, res_conv);
377 static int sparc_rewrite_Conv(ir_node *node, void *ctx)
379 ir_mode *to_mode = get_irn_mode(node);
380 ir_node *op = get_Conv_op(node);
381 ir_mode *from_mode = get_irn_mode(op);
384 if (mode_is_float(to_mode) && mode_is_int(from_mode)
385 && get_mode_size_bits(from_mode) == 32
386 && !mode_is_signed(from_mode)) {
387 rewrite_unsigned_float_Conv(node);
394 static void sparc_handle_intrinsics(void)
396 ir_type *tp, *int_tp, *uint_tp;
398 size_t n_records = 0;
400 runtime_rt rt_iMod, rt_uMod;
402 #define ID(x) new_id_from_chars(x, sizeof(x)-1)
404 int_tp = new_type_primitive(mode_Is);
405 uint_tp = new_type_primitive(mode_Iu);
407 /* we need to rewrite some forms of int->float conversions */
409 i_instr_record *map_Conv = &records[n_records++].i_instr;
411 map_Conv->kind = INTRINSIC_INSTR;
412 map_Conv->op = op_Conv;
413 map_Conv->i_mapper = sparc_rewrite_Conv;
415 /* SPARC has no signed mod instruction ... */
417 i_instr_record *map_Mod = &records[n_records++].i_instr;
419 tp = new_type_method(2, 1);
420 set_method_param_type(tp, 0, int_tp);
421 set_method_param_type(tp, 1, int_tp);
422 set_method_res_type(tp, 0, int_tp);
424 rt_iMod.ent = new_entity(get_glob_type(), ID(".rem"), tp);
425 set_entity_ld_ident(rt_iMod.ent, ID(".rem"));
426 rt_iMod.mode = mode_T;
427 rt_iMod.res_mode = mode_Is;
428 rt_iMod.mem_proj_nr = pn_Mod_M;
429 rt_iMod.regular_proj_nr = pn_Mod_X_regular;
430 rt_iMod.exc_proj_nr = pn_Mod_X_except;
431 rt_iMod.exc_mem_proj_nr = pn_Mod_M;
432 rt_iMod.res_proj_nr = pn_Mod_res;
434 set_entity_visibility(rt_iMod.ent, ir_visibility_external);
436 map_Mod->kind = INTRINSIC_INSTR;
437 map_Mod->op = op_Mod;
438 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
439 map_Mod->ctx = &rt_iMod;
441 /* ... nor an unsigned mod. */
443 i_instr_record *map_Mod = &records[n_records++].i_instr;
445 tp = new_type_method(2, 1);
446 set_method_param_type(tp, 0, uint_tp);
447 set_method_param_type(tp, 1, uint_tp);
448 set_method_res_type(tp, 0, uint_tp);
450 rt_uMod.ent = new_entity(get_glob_type(), ID(".urem"), tp);
451 set_entity_ld_ident(rt_uMod.ent, ID(".urem"));
452 rt_uMod.mode = mode_T;
453 rt_uMod.res_mode = mode_Iu;
454 rt_uMod.mem_proj_nr = pn_Mod_M;
455 rt_uMod.regular_proj_nr = pn_Mod_X_regular;
456 rt_uMod.exc_proj_nr = pn_Mod_X_except;
457 rt_uMod.exc_mem_proj_nr = pn_Mod_M;
458 rt_uMod.res_proj_nr = pn_Mod_res;
460 set_entity_visibility(rt_uMod.ent, ir_visibility_external);
462 map_Mod->kind = INTRINSIC_INSTR;
463 map_Mod->op = op_Mod;
464 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
465 map_Mod->ctx = &rt_uMod;
468 assert(n_records < ARRAY_SIZE(records));
469 lower_intrinsics(records, n_records, /*part_block_used=*/ true);
473 * Initializes the backend ISA
475 static arch_env_t *sparc_init(FILE *outfile)
477 static int run_once = 0;
484 isa = XMALLOC(sparc_isa_t);
485 memcpy(isa, &sparc_isa_template, sizeof(*isa));
486 isa->constants = pmap_create();
488 be_emit_init(outfile);
490 sparc_register_init();
491 sparc_create_opcodes(&sparc_irn_ops);
492 sparc_handle_intrinsics();
498 * Closes the output file and frees the ISA structure.
500 static void sparc_done(void *self)
502 sparc_isa_t *isa = self;
504 /* emit now all global declarations */
505 be_gas_emit_decls(isa->base.main_env);
507 pmap_destroy(isa->constants);
514 * Get the register class which shall be used to store a value of a given mode.
515 * @param self The this pointer.
516 * @param mode The mode in question.
517 * @return A register class which can hold values of the given mode.
519 static const arch_register_class_t *sparc_get_reg_class_for_mode(const ir_mode *mode)
521 if (mode_is_float(mode))
522 return &sparc_reg_classes[CLASS_sparc_fp];
524 return &sparc_reg_classes[CLASS_sparc_gp];
528 * Returns the necessary byte alignment for storing a register of given class.
530 static int sparc_get_reg_class_alignment(const arch_register_class_t *cls)
532 ir_mode *mode = arch_register_class_mode(cls);
533 return get_mode_size_bytes(mode);
536 static void sparc_lower_for_target(void)
539 int n_irgs = get_irp_n_irgs();
541 /* TODO, doubleword lowering and others */
543 for (i = 0; i < n_irgs; ++i) {
544 ir_graph *irg = get_irp_irg(i);
545 lower_switch(irg, 256, false);
549 static int sparc_is_mux_allowed(ir_node *sel, ir_node *mux_false,
559 * Returns the libFirm configuration parameter for this backend.
561 static const backend_params *sparc_get_backend_params(void)
563 static const ir_settings_arch_dep_t arch_dep = {
564 1, /* also_use_subs */
565 1, /* maximum_shifts */
566 31, /* highest_shift_amount */
567 NULL, /* evaluate_cost_func */
570 32, /* max_bits_for_mulh */
572 static backend_params p = {
573 0, /* no inline assembly */
574 0, /* no support for RotL nodes */
576 sparc_lower_for_target, /* lowering callback */
577 &arch_dep, /* will be set later */
578 sparc_is_mux_allowed, /* parameter for if conversion */
579 NULL, /* float arithmetic mode */
580 0, /* no trampoline support: size 0 */
581 0, /* no trampoline support: align 0 */
582 NULL, /* no trampoline support: no trampoline builder */
583 4 /* alignment of stack parameter: typically 4 (32bit) or 8 (64bit) */
588 static ir_graph **sparc_get_backend_irg_list(const void *self,
596 static asm_constraint_flags_t sparc_parse_asm_constraint(const char **c)
599 return ASM_CONSTRAINT_FLAG_INVALID;
602 static int sparc_is_valid_clobber(const char *clobber)
608 const arch_isa_if_t sparc_isa_if = {
611 NULL, /* handle intrinsics */
612 sparc_get_reg_class_for_mode,
614 sparc_get_reg_class_alignment,
615 sparc_get_backend_params,
616 sparc_get_backend_irg_list,
617 NULL, /* mark remat */
618 sparc_parse_asm_constraint,
619 sparc_is_valid_clobber,
622 NULL, /* get_pic_base */
623 NULL, /* before_abi */
631 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_sparc);
632 void be_init_arch_sparc(void)
634 be_register_isa_if("sparc", &sparc_isa_if);
635 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.cg");
636 sparc_init_transform();
637 sparc_init_emitter();