2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The main sparc backend driver file.
28 #include "lc_opts_enum.h"
36 #include "iroptimize.h"
46 #include "../bearch.h"
47 #include "../benode.h"
48 #include "../belower.h"
49 #include "../besched.h"
51 #include "../bemachine.h"
52 #include "../beilpsched.h"
53 #include "../bemodule.h"
55 #include "../bespillslots.h"
56 #include "../begnuas.h"
57 #include "../belistsched.h"
58 #include "../beflags.h"
60 #include "bearch_sparc_t.h"
62 #include "sparc_new_nodes.h"
63 #include "gen_sparc_regalloc_if.h"
64 #include "sparc_transform.h"
65 #include "sparc_emitter.h"
67 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
69 static arch_irn_class_t sparc_classify(const ir_node *node)
75 static ir_entity *sparc_get_frame_entity(const ir_node *node)
77 if (is_sparc_FrameAddr(node)) {
78 const sparc_attr_t *attr = get_sparc_attr_const(node);
79 return attr->immediate_value_entity;
82 if (sparc_has_load_store_attr(node)) {
83 const sparc_load_store_attr_t *load_store_attr
84 = get_sparc_load_store_attr_const(node);
85 if (load_store_attr->is_frame_entity) {
86 return load_store_attr->base.immediate_value_entity;
94 * This function is called by the generic backend to correct offsets for
95 * nodes accessing the stack.
97 static void sparc_set_frame_offset(ir_node *node, int offset)
99 sparc_attr_t *attr = get_sparc_attr(node);
100 attr->immediate_value += offset;
102 /* must be a FrameAddr or a load/store node with frame_entity */
103 assert(is_sparc_FrameAddr(node) ||
104 get_sparc_load_store_attr_const(node)->is_frame_entity);
107 static int sparc_get_sp_bias(const ir_node *node)
109 if (is_sparc_Save(node)) {
110 const sparc_save_attr_t *attr = get_sparc_save_attr_const(node);
111 /* Note we do not retport the change of the SPARC_MIN_STACKSIZE
112 * size, since we have additional magic in the emitter which
113 * calculates that! */
114 assert(attr->initial_stacksize >= SPARC_MIN_STACKSIZE);
115 return attr->initial_stacksize - SPARC_MIN_STACKSIZE;
120 /* fill register allocator interface */
122 static const arch_irn_ops_t sparc_irn_ops = {
125 sparc_get_frame_entity,
126 sparc_set_frame_offset,
128 NULL, /* get_inverse */
129 NULL, /* get_op_estimated_cost */
130 NULL, /* possible_memory_operand */
131 NULL, /* perform_memory_operand */
137 * Transforms the standard firm graph into
140 static void sparc_prepare_graph(void *self)
142 sparc_code_gen_t *cg = self;
144 /* transform FIRM into SPARC asm nodes */
145 sparc_transform_graph(cg);
148 dump_ir_graph(cg->irg, "transformed");
151 static bool sparc_modifies_flags(const ir_node *node)
153 return arch_irn_get_flags(node) & sparc_arch_irn_flag_modifies_flags;
156 static bool sparc_modifies_fp_flags(const ir_node *node)
158 return arch_irn_get_flags(node) & sparc_arch_irn_flag_modifies_fp_flags;
161 static void sparc_before_ra(void *self)
163 sparc_code_gen_t *cg = self;
164 /* fixup flags register */
165 be_sched_fix_flags(cg->irg, &sparc_reg_classes[CLASS_sparc_flags_class],
166 NULL, sparc_modifies_flags);
167 be_sched_fix_flags(cg->irg, &sparc_reg_classes[CLASS_sparc_fpflags_class],
168 NULL, sparc_modifies_fp_flags);
172 * transform reload node => load
174 static void transform_Reload(ir_node *node)
176 ir_node *block = get_nodes_block(node);
177 dbg_info *dbgi = get_irn_dbg_info(node);
178 ir_node *ptr = get_irn_n(node, be_pos_Spill_frame);
179 ir_node *mem = get_irn_n(node, be_pos_Reload_mem);
180 ir_mode *mode = get_irn_mode(node);
181 ir_entity *entity = be_get_frame_entity(node);
182 const arch_register_t *reg;
186 ir_node *sched_point = sched_prev(node);
188 load = new_bd_sparc_Ld(dbgi, block, ptr, mem, mode, entity, 0, true);
189 sched_add_after(sched_point, load);
192 proj = new_rd_Proj(dbgi, load, mode, pn_sparc_Ld_res);
194 reg = arch_get_irn_register(node);
195 arch_set_irn_register(proj, reg);
197 exchange(node, proj);
201 * transform spill node => store
203 static void transform_Spill(ir_node *node)
205 ir_node *block = get_nodes_block(node);
206 dbg_info *dbgi = get_irn_dbg_info(node);
207 ir_node *ptr = get_irn_n(node, be_pos_Spill_frame);
208 ir_node *mem = new_NoMem();
209 ir_node *val = get_irn_n(node, be_pos_Spill_val);
210 ir_mode *mode = get_irn_mode(val);
211 ir_entity *entity = be_get_frame_entity(node);
212 ir_node *sched_point;
215 sched_point = sched_prev(node);
216 store = new_bd_sparc_St(dbgi, block, ptr, val, mem, mode, entity, 0, true);
218 sched_add_after(sched_point, store);
220 exchange(node, store);
224 * walker to transform be_Spill and be_Reload nodes
226 static void sparc_after_ra_walker(ir_node *block, void *data)
228 ir_node *node, *prev;
231 for (node = sched_last(block); !sched_is_begin(node); node = prev) {
232 prev = sched_prev(node);
234 if (be_is_Reload(node)) {
235 transform_Reload(node);
236 } else if (be_is_Spill(node)) {
237 transform_Spill(node);
242 static void sparc_collect_frame_entity_nodes(ir_node *node, void *data)
244 be_fec_env_t *env = data;
248 const sparc_load_store_attr_t *attr;
250 if (be_is_Reload(node) && be_get_frame_entity(node) == NULL) {
251 mode = get_irn_mode(node);
252 align = get_mode_size_bytes(mode);
253 be_node_needs_frame_entity(env, node, mode, align);
257 if (!is_sparc_Ld(node) && !is_sparc_Ldf(node))
260 attr = get_sparc_load_store_attr_const(node);
261 entity = attr->base.immediate_value_entity;
262 mode = attr->load_store_mode;
265 if (!attr->is_frame_entity)
267 if (arch_irn_get_flags(node) & sparc_arch_irn_flag_needs_64bit_spillslot)
269 align = get_mode_size_bytes(mode);
270 be_node_needs_frame_entity(env, node, mode, align);
273 static void sparc_set_frame_entity(ir_node *node, ir_entity *entity)
275 if (is_be_node(node)) {
276 be_node_set_frame_entity(node, entity);
278 /* we only say be_node_needs_frame_entity on nodes with load_store
279 * attributes, so this should be fine */
280 sparc_load_store_attr_t *attr = get_sparc_load_store_attr(node);
281 assert(attr->is_frame_entity);
282 assert(attr->base.immediate_value_entity == NULL);
283 attr->base.immediate_value_entity = entity;
288 static void sparc_after_ra(void *self)
290 sparc_code_gen_t *cg = self;
291 ir_graph *irg = cg->irg;
292 be_fec_env_t *fec_env = be_new_frame_entity_coalescer(irg);
294 irg_walk_graph(irg, NULL, sparc_collect_frame_entity_nodes, fec_env);
295 be_assign_entities(fec_env, sparc_set_frame_entity);
296 be_free_frame_entity_coalescer(fec_env);
298 irg_block_walk_graph(cg->irg, NULL, sparc_after_ra_walker, NULL);
304 * Emits the code, closes the output file and frees
305 * the code generator interface.
307 static void sparc_emit_and_done(void *self)
309 sparc_code_gen_t *cg = self;
310 ir_graph *irg = cg->irg;
312 sparc_gen_routine(cg, irg);
314 /* de-allocate code generator */
318 static void *sparc_cg_init(ir_graph *irg);
320 static const arch_code_generator_if_t sparc_code_gen_if = {
322 NULL, /* get_pic_base hook */
323 NULL, /* before abi introduce hook */
325 NULL, /* spill hook */
326 sparc_before_ra, /* before register allocation hook */
327 sparc_after_ra, /* after register allocation hook */
333 * Initializes the code generator.
335 static void *sparc_cg_init(ir_graph *irg)
337 sparc_isa_t *isa = (sparc_isa_t *) be_get_irg_arch_env(irg);
338 sparc_code_gen_t *cg = XMALLOCZ(sparc_code_gen_t);
340 cg->impl = &sparc_code_gen_if;
343 cg->dump = (be_get_irg_options(irg)->dump_flags & DUMP_BE) != 0;
344 cg->constants = pmap_create();
346 /* enter the current code generator */
349 return (arch_code_generator_t*) cg;
352 const arch_isa_if_t sparc_isa_if;
353 static sparc_isa_t sparc_isa_template = {
355 &sparc_isa_if, /* isa interface implementation */
356 &sparc_gp_regs[REG_SP], /* stack pointer register */
357 &sparc_gp_regs[REG_FRAME_POINTER], /* base pointer register */
358 &sparc_reg_classes[CLASS_sparc_gp], /* link pointer register class */
359 -1, /* stack direction */
360 3, /* power of two stack alignment
362 NULL, /* main environment */
363 7, /* costs for a spill instruction */
364 5, /* costs for a reload instruction */
365 true, /* custom abi handling */
367 NULL /* current code generator */
371 static void sparc_handle_intrinsics(void)
373 ir_type *tp, *int_tp, *uint_tp;
377 runtime_rt rt_iMod, rt_uMod;
379 #define ID(x) new_id_from_chars(x, sizeof(x)-1)
381 int_tp = new_type_primitive(mode_Is);
382 uint_tp = new_type_primitive(mode_Iu);
385 /* SPARC has no signed mod instruction ... */
387 i_instr_record *map_Mod = &records[n_records++].i_instr;
389 tp = new_type_method(2, 1);
390 set_method_param_type(tp, 0, int_tp);
391 set_method_param_type(tp, 1, int_tp);
392 set_method_res_type(tp, 0, int_tp);
394 rt_iMod.ent = new_entity(get_glob_type(), ID(".rem"), tp);
395 set_entity_ld_ident(rt_iMod.ent, ID(".rem"));
396 rt_iMod.mode = mode_T;
397 rt_iMod.res_mode = mode_Is;
398 rt_iMod.mem_proj_nr = pn_Mod_M;
399 rt_iMod.regular_proj_nr = pn_Mod_X_regular;
400 rt_iMod.exc_proj_nr = pn_Mod_X_except;
401 rt_iMod.exc_mem_proj_nr = pn_Mod_M;
402 rt_iMod.res_proj_nr = pn_Mod_res;
404 set_entity_visibility(rt_iMod.ent, ir_visibility_external);
406 map_Mod->kind = INTRINSIC_INSTR;
407 map_Mod->op = op_Mod;
408 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
409 map_Mod->ctx = &rt_iMod;
411 /* ... nor an unsigned mod. */
413 i_instr_record *map_Mod = &records[n_records++].i_instr;
415 tp = new_type_method(2, 1);
416 set_method_param_type(tp, 0, uint_tp);
417 set_method_param_type(tp, 1, uint_tp);
418 set_method_res_type(tp, 0, uint_tp);
420 rt_uMod.ent = new_entity(get_glob_type(), ID(".urem"), tp);
421 set_entity_ld_ident(rt_uMod.ent, ID(".urem"));
422 rt_uMod.mode = mode_T;
423 rt_uMod.res_mode = mode_Iu;
424 rt_uMod.mem_proj_nr = pn_Mod_M;
425 rt_uMod.regular_proj_nr = pn_Mod_X_regular;
426 rt_uMod.exc_proj_nr = pn_Mod_X_except;
427 rt_uMod.exc_mem_proj_nr = pn_Mod_M;
428 rt_uMod.res_proj_nr = pn_Mod_res;
430 set_entity_visibility(rt_uMod.ent, ir_visibility_external);
432 map_Mod->kind = INTRINSIC_INSTR;
433 map_Mod->op = op_Mod;
434 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
435 map_Mod->ctx = &rt_uMod;
439 lower_intrinsics(records, n_records, /*part_block_used=*/0);
444 * Initializes the backend ISA
446 static arch_env_t *sparc_init(FILE *outfile)
448 static int run_once = 0;
455 isa = XMALLOC(sparc_isa_t);
456 memcpy(isa, &sparc_isa_template, sizeof(*isa));
458 be_emit_init(outfile);
460 sparc_register_init();
461 sparc_create_opcodes(&sparc_irn_ops);
462 sparc_handle_intrinsics();
470 * Closes the output file and frees the ISA structure.
472 static void sparc_done(void *self)
474 sparc_isa_t *isa = self;
476 /* emit now all global declarations */
477 be_gas_emit_decls(isa->base.main_env);
484 static unsigned sparc_get_n_reg_class(void)
489 static const arch_register_class_t *sparc_get_reg_class(unsigned i)
491 assert(i < N_CLASSES);
492 return &sparc_reg_classes[i];
498 * Get the register class which shall be used to store a value of a given mode.
499 * @param self The this pointer.
500 * @param mode The mode in question.
501 * @return A register class which can hold values of the given mode.
503 static const arch_register_class_t *sparc_get_reg_class_for_mode(const ir_mode *mode)
505 if (mode_is_float(mode))
506 return &sparc_reg_classes[CLASS_sparc_fp];
508 return &sparc_reg_classes[CLASS_sparc_gp];
511 static int sparc_to_appear_in_schedule(void *block_env, const ir_node *irn)
515 if (!is_sparc_irn(irn))
522 * Initializes the code generator interface.
524 static const arch_code_generator_if_t *sparc_get_code_generator_if(
528 return &sparc_code_gen_if;
531 list_sched_selector_t sparc_sched_selector;
534 * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
536 static const list_sched_selector_t *sparc_get_list_sched_selector(
537 const void *self, list_sched_selector_t *selector)
542 sparc_sched_selector = trivial_selector;
543 sparc_sched_selector.to_appear_in_schedule = sparc_to_appear_in_schedule;
544 return &sparc_sched_selector;
547 static const ilp_sched_selector_t *sparc_get_ilp_sched_selector(
555 * Returns the necessary byte alignment for storing a register of given class.
557 static int sparc_get_reg_class_alignment(const arch_register_class_t *cls)
559 ir_mode *mode = arch_register_class_mode(cls);
560 return get_mode_size_bytes(mode);
563 static void sparc_lower_for_target(void)
565 /* TODO, doubleword lowering and others */
569 * Returns the libFirm configuration parameter for this backend.
571 static const backend_params *sparc_get_backend_params(void)
573 static backend_params p = {
574 0, /* no inline assembly */
575 0, /* no support for RotL nodes */
576 sparc_lower_for_target, /* lowering callback */
577 NULL, /* will be set later */
578 NULL, /* parameter for if conversion */
579 NULL, /* float arithmetic mode */
580 0, /* no trampoline support: size 0 */
581 0, /* no trampoline support: align 0 */
582 NULL, /* no trampoline support: no trampoline builder */
583 4 /* alignment of stack parameter: typically 4 (32bit) or 8 (64bit) */
588 static const be_execution_unit_t ***sparc_get_allowed_execution_units(
593 panic("sparc_get_allowed_execution_units not implemented yet");
596 static const be_machine_t *sparc_get_machine(const void *self)
600 panic("sparc_get_machine not implemented yet");
603 static ir_graph **sparc_get_backend_irg_list(const void *self,
611 static asm_constraint_flags_t sparc_parse_asm_constraint(const char **c)
614 return ASM_CONSTRAINT_FLAG_INVALID;
617 static int sparc_is_valid_clobber(const char *clobber)
623 const arch_isa_if_t sparc_isa_if = {
626 NULL, /* handle intrinsics */
627 sparc_get_n_reg_class,
629 sparc_get_reg_class_for_mode,
631 sparc_get_code_generator_if,
632 sparc_get_list_sched_selector,
633 sparc_get_ilp_sched_selector,
634 sparc_get_reg_class_alignment,
635 sparc_get_backend_params,
636 sparc_get_allowed_execution_units,
638 sparc_get_backend_irg_list,
639 NULL, /* mark remat */
640 sparc_parse_asm_constraint,
641 sparc_is_valid_clobber
644 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_sparc);
645 void be_init_arch_sparc(void)
647 be_register_isa_if("sparc", &sparc_isa_if);
648 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.cg");
649 sparc_init_transform();
650 sparc_init_emitter();