2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The main sparc backend driver file.
23 * @author Hannes Rapp, Matthias Braun
28 #include "lc_opts_enum.h"
36 #include "iroptimize.h"
42 #include "lower_alloc.h"
43 #include "lower_builtins.h"
44 #include "lower_calls.h"
45 #include "lower_mode_b.h"
46 #include "lower_softfloat.h"
62 #include "belistsched.h"
66 #include "bearch_sparc_t.h"
68 #include "sparc_new_nodes.h"
69 #include "gen_sparc_regalloc_if.h"
70 #include "sparc_transform.h"
71 #include "sparc_emitter.h"
72 #include "sparc_cconv.h"
74 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
76 static ir_entity *sparc_get_frame_entity(const ir_node *node)
78 if (is_sparc_FrameAddr(node)) {
79 const sparc_attr_t *attr = get_sparc_attr_const(node);
80 return attr->immediate_value_entity;
83 if (sparc_has_load_store_attr(node)) {
84 const sparc_load_store_attr_t *load_store_attr
85 = get_sparc_load_store_attr_const(node);
86 if (load_store_attr->is_frame_entity) {
87 return load_store_attr->base.immediate_value_entity;
95 * This function is called by the generic backend to correct offsets for
96 * nodes accessing the stack.
98 static void sparc_set_frame_offset(ir_node *node, int offset)
100 sparc_attr_t *attr = get_sparc_attr(node);
101 attr->immediate_value += offset;
103 /* must be a FrameAddr or a load/store node with frame_entity */
104 assert(is_sparc_FrameAddr(node) ||
105 get_sparc_load_store_attr_const(node)->is_frame_entity);
108 static int sparc_get_sp_bias(const ir_node *node)
110 if (is_sparc_Save(node)) {
111 const sparc_attr_t *attr = get_sparc_attr_const(node);
112 if (get_irn_arity(node) == 3)
113 panic("no support for _reg variant yet");
115 return -attr->immediate_value;
116 } else if (is_sparc_RestoreZero(node)) {
117 return SP_BIAS_RESET;
122 /* fill register allocator interface */
124 const arch_irn_ops_t sparc_irn_ops = {
125 sparc_get_frame_entity,
126 sparc_set_frame_offset,
128 NULL, /* get_op_estimated_cost */
129 NULL, /* possible_memory_operand */
130 NULL, /* perform_memory_operand */
134 * Transforms the standard firm graph into
137 static void sparc_prepare_graph(ir_graph *irg)
139 sparc_transform_graph(irg);
142 static bool sparc_modifies_flags(const ir_node *node)
144 unsigned n_outs = arch_get_irn_n_outs(node);
145 for (unsigned o = 0; o < n_outs; ++o) {
146 const arch_register_req_t *req = arch_get_irn_register_req_out(node, o);
147 if (req->cls == &sparc_reg_classes[CLASS_sparc_flags_class])
153 static bool sparc_modifies_fp_flags(const ir_node *node)
155 unsigned n_outs = arch_get_irn_n_outs(node);
156 for (unsigned o = 0; o < n_outs; ++o) {
157 const arch_register_req_t *req = arch_get_irn_register_req_out(node, o);
158 if (req->cls == &sparc_reg_classes[CLASS_sparc_fpflags_class])
164 static void sparc_before_ra(ir_graph *irg)
166 /* fixup flags register */
167 be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_flags_class],
168 NULL, sparc_modifies_flags);
169 be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_fpflags_class],
170 NULL, sparc_modifies_fp_flags);
173 extern const arch_isa_if_t sparc_isa_if;
174 static sparc_isa_t sparc_isa_template = {
176 &sparc_isa_if, /* isa interface implementation */
181 &sparc_registers[REG_SP], /* stack pointer register */
182 &sparc_registers[REG_FRAME_POINTER], /* base pointer register */
183 3, /* power of two stack alignment
185 NULL, /* main environment */
186 7, /* costs for a spill instruction */
187 5, /* costs for a reload instruction */
188 true, /* custom abi handling */
190 NULL, /* constants */
191 SPARC_FPU_ARCH_FPU, /* FPU architecture */
195 * rewrite unsigned->float conversion.
196 * Sparc has no instruction for this so instead we do the following:
198 * int signed_x = unsigned_value_x;
199 * double res = signed_x;
201 * res += 4294967296. ;
202 * return (float) res;
204 static void rewrite_unsigned_float_Conv(ir_node *node)
206 ir_graph *irg = get_irn_irg(node);
207 dbg_info *dbgi = get_irn_dbg_info(node);
208 ir_node *lower_block = get_nodes_block(node);
213 ir_node *block = get_nodes_block(node);
214 ir_node *unsigned_x = get_Conv_op(node);
215 ir_mode *mode_u = get_irn_mode(unsigned_x);
216 ir_mode *mode_s = find_signed_mode(mode_u);
217 ir_mode *mode_d = mode_D;
218 ir_node *signed_x = new_rd_Conv(dbgi, block, unsigned_x, mode_s);
219 ir_node *res = new_rd_Conv(dbgi, block, signed_x, mode_d);
220 ir_node *zero = new_r_Const(irg, get_mode_null(mode_s));
221 ir_node *cmp = new_rd_Cmp(dbgi, block, signed_x, zero,
223 ir_node *cond = new_rd_Cond(dbgi, block, cmp);
224 ir_node *proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
225 ir_node *proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
226 ir_node *in_true[1] = { proj_true };
227 ir_node *in_false[1] = { proj_false };
228 ir_node *true_block = new_r_Block(irg, ARRAY_SIZE(in_true), in_true);
229 ir_node *false_block = new_r_Block(irg, ARRAY_SIZE(in_false),in_false);
230 ir_node *true_jmp = new_r_Jmp(true_block);
231 ir_node *false_jmp = new_r_Jmp(false_block);
232 ir_tarval *correction = new_tarval_from_double(4294967296., mode_d);
233 ir_node *c_const = new_r_Const(irg, correction);
234 ir_node *fadd = new_rd_Add(dbgi, true_block, res, c_const,
237 ir_node *lower_in[2] = { true_jmp, false_jmp };
238 ir_node *phi_in[2] = { fadd, res };
239 ir_mode *dest_mode = get_irn_mode(node);
243 set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
244 phi = new_r_Phi(lower_block, ARRAY_SIZE(phi_in), phi_in, mode_d);
245 assert(get_Block_phis(lower_block) == NULL);
246 set_Block_phis(lower_block, phi);
247 set_Phi_next(phi, NULL);
249 res_conv = new_rd_Conv(dbgi, lower_block, phi, dest_mode);
251 exchange(node, res_conv);
256 * rewrite float->unsigned conversions.
257 * Sparc has no instruction for this so instead we do the following:
259 * if (x >= 2147483648.) {
260 * converted ^= (int)(x-2147483648.) ^ 0x80000000;
262 * converted = (int)x;
264 * return (unsigned)converted;
266 static void rewrite_float_unsigned_Conv(ir_node *node)
268 ir_graph *irg = get_irn_irg(node);
269 dbg_info *dbgi = get_irn_dbg_info(node);
270 ir_node *lower_block = get_nodes_block(node);
275 ir_node *block = get_nodes_block(node);
276 ir_node *float_x = get_Conv_op(node);
277 ir_mode *mode_u = get_irn_mode(node);
278 ir_mode *mode_s = find_signed_mode(mode_u);
279 ir_mode *mode_f = get_irn_mode(float_x);
280 ir_tarval *limit = new_tarval_from_double(2147483648., mode_f);
281 ir_node *limitc = new_r_Const(irg, limit);
282 ir_node *cmp = new_rd_Cmp(dbgi, block, float_x, limitc,
283 ir_relation_greater_equal);
284 ir_node *cond = new_rd_Cond(dbgi, block, cmp);
285 ir_node *proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
286 ir_node *proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
287 ir_node *in_true[1] = { proj_true };
288 ir_node *in_false[1] = { proj_false };
289 ir_node *true_block = new_r_Block(irg, ARRAY_SIZE(in_true), in_true);
290 ir_node *false_block = new_r_Block(irg, ARRAY_SIZE(in_false),in_false);
291 ir_node *true_jmp = new_r_Jmp(true_block);
292 ir_node *false_jmp = new_r_Jmp(false_block);
294 ir_tarval *correction = new_tarval_from_long(0x80000000l, mode_s);
295 ir_node *c_const = new_r_Const(irg, correction);
296 ir_node *sub = new_rd_Sub(dbgi, true_block, float_x, limitc,
298 ir_node *sub_conv = new_rd_Conv(dbgi, true_block, sub, mode_s);
299 ir_node *xorn = new_rd_Eor(dbgi, true_block, sub_conv, c_const,
302 ir_node *converted = new_rd_Conv(dbgi, false_block, float_x,mode_s);
304 ir_node *lower_in[2] = { true_jmp, false_jmp };
305 ir_node *phi_in[2] = { xorn, converted };
309 set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
310 phi = new_r_Phi(lower_block, ARRAY_SIZE(phi_in), phi_in, mode_s);
311 assert(get_Block_phis(lower_block) == NULL);
312 set_Block_phis(lower_block, phi);
313 set_Phi_next(phi, NULL);
315 res_conv = new_rd_Conv(dbgi, lower_block, phi, mode_u);
316 exchange(node, res_conv);
320 static int sparc_rewrite_Conv(ir_node *node, void *ctx)
322 ir_mode *to_mode = get_irn_mode(node);
323 ir_node *op = get_Conv_op(node);
324 ir_mode *from_mode = get_irn_mode(op);
327 if (mode_is_float(to_mode) && mode_is_int(from_mode)
328 && get_mode_size_bits(from_mode) == 32
329 && !mode_is_signed(from_mode)) {
330 rewrite_unsigned_float_Conv(node);
333 if (mode_is_float(from_mode) && mode_is_int(to_mode)
334 && get_mode_size_bits(to_mode) <= 32
335 && !mode_is_signed(to_mode)) {
336 rewrite_float_unsigned_Conv(node);
343 static void sparc_handle_intrinsics(void)
345 ir_type *tp, *int_tp, *uint_tp;
347 size_t n_records = 0;
349 runtime_rt rt_iMod, rt_uMod;
351 #define ID(x) new_id_from_chars(x, sizeof(x)-1)
353 int_tp = new_type_primitive(mode_Is);
354 uint_tp = new_type_primitive(mode_Iu);
356 /* we need to rewrite some forms of int->float conversions */
358 i_instr_record *map_Conv = &records[n_records++].i_instr;
360 map_Conv->kind = INTRINSIC_INSTR;
361 map_Conv->op = op_Conv;
362 map_Conv->i_mapper = sparc_rewrite_Conv;
364 /* SPARC has no signed mod instruction ... */
366 i_instr_record *map_Mod = &records[n_records++].i_instr;
368 tp = new_type_method(2, 1);
369 set_method_param_type(tp, 0, int_tp);
370 set_method_param_type(tp, 1, int_tp);
371 set_method_res_type(tp, 0, int_tp);
373 rt_iMod.ent = new_entity(get_glob_type(), ID(".rem"), tp);
374 set_entity_ld_ident(rt_iMod.ent, ID(".rem"));
375 rt_iMod.mode = mode_T;
376 rt_iMod.res_mode = mode_Is;
377 rt_iMod.mem_proj_nr = pn_Mod_M;
378 rt_iMod.regular_proj_nr = pn_Mod_X_regular;
379 rt_iMod.exc_proj_nr = pn_Mod_X_except;
380 rt_iMod.res_proj_nr = pn_Mod_res;
382 set_entity_visibility(rt_iMod.ent, ir_visibility_external);
384 map_Mod->kind = INTRINSIC_INSTR;
385 map_Mod->op = op_Mod;
386 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
387 map_Mod->ctx = &rt_iMod;
389 /* ... nor an unsigned mod. */
391 i_instr_record *map_Mod = &records[n_records++].i_instr;
393 tp = new_type_method(2, 1);
394 set_method_param_type(tp, 0, uint_tp);
395 set_method_param_type(tp, 1, uint_tp);
396 set_method_res_type(tp, 0, uint_tp);
398 rt_uMod.ent = new_entity(get_glob_type(), ID(".urem"), tp);
399 set_entity_ld_ident(rt_uMod.ent, ID(".urem"));
400 rt_uMod.mode = mode_T;
401 rt_uMod.res_mode = mode_Iu;
402 rt_uMod.mem_proj_nr = pn_Mod_M;
403 rt_uMod.regular_proj_nr = pn_Mod_X_regular;
404 rt_uMod.exc_proj_nr = pn_Mod_X_except;
405 rt_uMod.res_proj_nr = pn_Mod_res;
407 set_entity_visibility(rt_uMod.ent, ir_visibility_external);
409 map_Mod->kind = INTRINSIC_INSTR;
410 map_Mod->op = op_Mod;
411 map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
412 map_Mod->ctx = &rt_uMod;
415 assert(n_records < ARRAY_SIZE(records));
416 lower_intrinsics(records, n_records, /*part_block_used=*/ true);
419 static void sparc_init(void)
421 sparc_register_init();
422 sparc_create_opcodes(&sparc_irn_ops);
426 static void sparc_finish(void)
428 sparc_free_opcodes();
431 static arch_env_t *sparc_begin_codegeneration(const be_main_env_t *env)
433 sparc_isa_t *isa = XMALLOC(sparc_isa_t);
434 *isa = sparc_isa_template;
435 isa->constants = pmap_create();
437 be_gas_elf_type_char = '#';
438 be_gas_object_file_format = OBJECT_FILE_FORMAT_ELF;
439 be_gas_elf_variant = ELF_VARIANT_SPARC;
441 be_emit_init(env->file_handle);
442 be_gas_begin_compilation_unit(env);
448 * Closes the output file and frees the ISA structure.
450 static void sparc_end_codegeneration(void *self)
452 sparc_isa_t *isa = (sparc_isa_t*)self;
454 /* emit now all global declarations */
455 be_gas_end_compilation_unit(isa->base.main_env);
457 pmap_destroy(isa->constants);
462 static void sparc_lower_for_target(void)
464 ir_mode *mode_gp = sparc_reg_classes[CLASS_sparc_gp].mode;
465 size_t i, n_irgs = get_irp_n_irgs();
467 lower_calls_with_compounds(LF_RETURN_HIDDEN);
469 for (i = 0; i < n_irgs; ++i) {
470 ir_graph *irg = get_irp_irg(i);
471 /* Turn all small CopyBs into loads/stores and all bigger CopyBs into
473 lower_CopyB(irg, 31, 32, false);
476 if (sparc_isa_template.fpu_arch == SPARC_FPU_ARCH_SOFTFLOAT)
477 lower_floating_point();
479 lower_builtins(0, NULL);
483 for (i = 0; i < n_irgs; ++i) {
484 ir_graph *irg = get_irp_irg(i);
485 ir_lower_mode_b(irg, mode_Iu);
486 lower_switch(irg, 4, 256, mode_gp);
487 /* TODO: Pass SPARC_MIN_STACKSIZE as addr_delta as soon as
488 * Alloc nodes are implemented more efficiently. */
489 lower_alloc(irg, SPARC_STACK_ALIGNMENT, true, 0);
493 static int sparc_is_mux_allowed(ir_node *sel, ir_node *mux_false,
496 return ir_is_optimizable_mux(sel, mux_false, mux_true);
500 * Returns the libFirm configuration parameter for this backend.
502 static const backend_params *sparc_get_backend_params(void)
504 static const ir_settings_arch_dep_t arch_dep = {
505 1, /* also_use_subs */
506 1, /* maximum_shifts */
507 31, /* highest_shift_amount */
508 NULL, /* evaluate_cost_func */
511 32, /* max_bits_for_mulh */
513 static backend_params p = {
514 0, /* no inline assembly */
515 0, /* no support for RotL nodes */
517 1, /* modulo shift efficient */
518 0, /* non-modulo shift not efficient */
519 &arch_dep, /* will be set later */
520 sparc_is_mux_allowed, /* parameter for if conversion */
521 32, /* machine size */
522 NULL, /* float arithmetic mode */
523 NULL, /* long long type */
524 NULL, /* usigned long long type */
525 NULL, /* long double type */
526 0, /* no trampoline support: size 0 */
527 0, /* no trampoline support: align 0 */
528 NULL, /* no trampoline support: no trampoline builder */
529 4 /* alignment of stack parameter: typically 4 (32bit) or 8 (64bit) */
532 ir_mode *mode_long_long
533 = new_int_mode("long long", irma_twos_complement, 64, 1, 64);
534 ir_type *type_long_long = new_type_primitive(mode_long_long);
535 ir_mode *mode_unsigned_long_long
536 = new_int_mode("unsigned long long", irma_twos_complement, 64, 0, 64);
537 ir_type *type_unsigned_long_long
538 = new_type_primitive(mode_unsigned_long_long);
540 p.type_long_long = type_long_long;
541 p.type_unsigned_long_long = type_unsigned_long_long;
543 ir_type *type_long_double = new_type_primitive(mode_Q);
545 set_type_alignment_bytes(type_long_double, 8);
546 set_type_size_bytes(type_long_double, 16);
547 p.type_long_double = type_long_double;
551 static asm_constraint_flags_t sparc_parse_asm_constraint(const char **c)
554 return ASM_CONSTRAINT_FLAG_INVALID;
557 static int sparc_is_valid_clobber(const char *clobber)
563 /* fpu set architectures. */
564 static const lc_opt_enum_int_items_t sparc_fpu_items[] = {
565 { "fpu", SPARC_FPU_ARCH_FPU },
566 { "softfloat", SPARC_FPU_ARCH_SOFTFLOAT },
570 static lc_opt_enum_int_var_t arch_fpu_var = {
571 &sparc_isa_template.fpu_arch, sparc_fpu_items
574 static const lc_opt_table_entry_t sparc_options[] = {
575 LC_OPT_ENT_ENUM_INT("fpunit", "select the floating point unit", &arch_fpu_var),
579 static ir_node *sparc_new_spill(ir_node *value, ir_node *after)
581 ir_node *block = get_block(after);
582 ir_graph *irg = get_irn_irg(value);
583 ir_node *frame = get_irg_frame(irg);
584 ir_node *mem = get_irg_no_mem(irg);
585 ir_mode *mode = get_irn_mode(value);
588 if (mode_is_float(mode)) {
589 store = create_stf(NULL, block, value, frame, mem, mode, NULL, 0, true);
591 store = new_bd_sparc_St_imm(NULL, block, value, frame, mem, mode, NULL,
594 sched_add_after(after, store);
598 static ir_node *sparc_new_reload(ir_node *value, ir_node *spill,
601 ir_node *block = get_block(before);
602 ir_graph *irg = get_irn_irg(value);
603 ir_node *frame = get_irg_frame(irg);
604 ir_mode *mode = get_irn_mode(value);
608 if (mode_is_float(mode)) {
609 load = create_ldf(NULL, block, frame, spill, mode, NULL, 0, true);
611 load = new_bd_sparc_Ld_imm(NULL, block, frame, spill, mode, NULL, 0,
614 sched_add_before(before, load);
615 assert((long)pn_sparc_Ld_res == (long)pn_sparc_Ldf_res);
616 res = new_r_Proj(load, mode, pn_sparc_Ld_res);
621 const arch_isa_if_t sparc_isa_if = {
624 sparc_get_backend_params,
625 sparc_lower_for_target,
626 sparc_parse_asm_constraint,
627 sparc_is_valid_clobber,
629 sparc_begin_codegeneration,
630 sparc_end_codegeneration,
632 NULL, /* get call abi */
633 NULL, /* mark remat */
634 NULL, /* get_pic_base */
637 NULL, /* register_saved_by */
639 sparc_handle_intrinsics,
640 NULL, /* before_abi */
647 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_sparc)
648 void be_init_arch_sparc(void)
650 lc_opt_entry_t *be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
651 lc_opt_entry_t *sparc_grp = lc_opt_get_grp(be_grp, "sparc");
653 lc_opt_add_table(sparc_grp, sparc_options);
655 be_register_isa_if("sparc", &sparc_isa_if);
656 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.cg");
657 sparc_init_transform();
658 sparc_init_emitter();