4 # the cpu architecture (ia32, ia64, mips, sparc, ppc32, ...)
10 # 1 - caller save (register must be saved by the caller of a function)
11 # 2 - callee save (register must be saved by the called function)
12 # 4 - ignore (do not assign this register)
13 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
16 { "name" => "r0", "type" => 1 },
17 { "name" => "r2", "type" => 1 },
18 { "name" => "r3", "type" => 1 },
19 { "name" => "r4", "type" => 1 },
20 { "name" => "r5", "type" => 1 },
21 { "name" => "r6", "type" => 1 },
22 { "name" => "r7", "type" => 1 },
23 { "name" => "r8", "type" => 1 },
24 { "name" => "r9", "type" => 1 },
25 { "name" => "r10", "type" => 1 },
26 # { "name" => "r11", "type" => 1 },
27 # { "name" => "r12", "type" => 1 },
28 { "name" => "r13", "type" => 2 },
29 { "name" => "r14", "type" => 2 },
30 { "name" => "r15", "type" => 2 },
31 # { "name" => "r16", "type" => 2 },
32 # { "name" => "r17", "type" => 2 },
33 # { "name" => "r18", "type" => 2 },
34 # { "name" => "r19", "type" => 2 },
35 # { "name" => "r20", "type" => 2 },
36 # { "name" => "r21", "type" => 2 },
37 # { "name" => "r22", "type" => 2 },
38 # { "name" => "r23", "type" => 2 },
39 # { "name" => "r24", "type" => 2 },
40 # { "name" => "r25", "type" => 2 },
41 # { "name" => "r26", "type" => 2 },
42 # { "name" => "r27", "type" => 2 },
43 # { "name" => "r28", "type" => 2 },
44 # { "name" => "r29", "type" => 2 },
45 # { "name" => "r30", "type" => 2 },
46 { "name" => "r31", "type" => 2 },
47 { "name" => "r1", "type" => 6 }, # this is our stackpointer
48 { "mode" => "mode_P" }
51 # { "name" => "f0", "type" => 1 }, # => reserved for FP Perm
52 { "name" => "f1", "type" => 1 },
53 { "name" => "f2", "type" => 1 },
54 { "name" => "f3", "type" => 1 },
55 { "name" => "f4", "type" => 1 },
56 { "name" => "f5", "type" => 1 },
57 { "name" => "f6", "type" => 1 },
58 { "name" => "f7", "type" => 1 },
59 { "name" => "f8", "type" => 1 },
60 { "name" => "f9", "type" => 1 },
61 { "name" => "f10", "type" => 1 },
62 { "name" => "f11", "type" => 1 },
63 { "name" => "f12", "type" => 1 },
64 { "name" => "f13", "type" => 1 },
65 { "name" => "f14", "type" => 2 },
66 { "name" => "f15", "type" => 2 },
67 { "name" => "f16", "type" => 2 },
68 # { "name" => "f17", "type" => 2 },
69 # { "name" => "f18", "type" => 2 },
70 # { "name" => "f19", "type" => 2 },
71 # { "name" => "f20", "type" => 2 },
72 # { "name" => "f21", "type" => 2 },
73 # { "name" => "f22", "type" => 2 },
74 # { "name" => "f23", "type" => 2 },
75 # { "name" => "f24", "type" => 2 },
76 # { "name" => "f25", "type" => 2 },
77 # { "name" => "f26", "type" => 2 },
78 # { "name" => "f27", "type" => 2 },
79 # { "name" => "f28", "type" => 2 },
80 # { "name" => "f29", "type" => 2 },
81 # { "name" => "f30", "type" => 2 },
82 # { "name" => "f31", "type" => 2 },
83 { "mode" => "mode_D" }
86 { "name" => "cr0", "type" => 1 },
87 { "name" => "cr1", "type" => 1 },
88 { "name" => "cr2", "type" => 2 },
89 { "name" => "cr3", "type" => 2 },
90 { "name" => "cr4", "type" => 2 },
91 { "name" => "cr5", "type" => 1 },
92 { "name" => "cr6", "type" => 1 },
93 # { "name" => "cr7", "type" => 1 }, # => reserved for Condition Perm
94 { "mode" => "mode_P" } # real mode is 4 bit, but doesn't matter ...
97 { "name" => "lr", "type" => 4 }, # 3
98 { "mode" => "mode_P" }
101 { "name" => "ctr", "type" => 1 },
102 { "mode" => "mode_P" }
107 S0 => "${arch}_emit_source_register(node, 0);",
108 S1 => "${arch}_emit_source_register(node, 1);",
109 S2 => "${arch}_emit_source_register(node, 2);",
110 D0 => "${arch}_emit_dest_register(node, 0);",
111 D1 => "${arch}_emit_dest_register(node, 1);",
112 D2 => "${arch}_emit_dest_register(node, 2);",
113 O => "${arch}_emit_offset(node);",
114 C => "${arch}_emit_immediate(node);",
115 RLWIMI => "${arch}_emit_rlwimi_helper(node);",
118 $default_cmp_attr = "NULL";
120 #--------------------------------------------------#
123 # _ __ _____ __ _ _ __ ___ _ __ ___ #
124 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
125 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
126 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
129 #--------------------------------------------------#
133 #-----------------------------------------------------------------#
136 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
137 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
138 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
139 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
142 #-----------------------------------------------------------------#
144 # commutative operations
149 "comment" => "construct Add: Add(a, b) = Add(b, a) = a + b",
150 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
151 "emit" => '. add %D0, %S0, %S1',
156 "comment" => "construct Add: Addi(a, const) = Addi(const, a) = a + const",
157 "reg_req" => { "in" => [ "!r0" ], "out" => [ "gp" ] },
158 # "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
159 "emit" => '. addi %D0, %S0, %C',
162 return (attr_a->data.constant_tarval != attr_b->data.constant_tarval);
170 "comment" => "construct Mul: Mullw(a, b) = Mullw(b, a) = lo32(a * b)",
171 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
172 "emit" => '. mullw %D0, %S0, %S1',
178 "comment" => "construct Mul: Mulhw(a, b) = Mulhw(b, a) = hi32(a * b)",
179 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
180 "emit" => '. mulhw %D0, %S0, %S1',
186 "comment" => "construct Mul: Mulhwu(a, b) = Mulhwu(b, a) = hi32(a * b)",
187 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
188 "emit" => '. mulhwu %D0, %S0, %S1',
192 # "irn_flags" => "R",
193 # "comment" => "construct Mul: Mul(a, const) = Mul(const, a) = a * const",
194 # "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
195 # "emit" => '. mul %S0, %C, %D0',
201 "comment" => "construct And: And(a, b) = And(b, a) = a AND b",
202 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
203 "emit" => '. and %D0, %S0, %S1',
207 # "irn_flags" => "R",
208 # "comment" => "construct And: And(a, const) = And(const, a) = a AND const",
209 # "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
210 # "emit" => '. and %S0, %C, %D0',
216 "comment" => "construct Or: Or(a, b) = Or(b, a) = a OR b",
217 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
218 "emit" => '. or %D0, %S0, %S1',
223 # "irn_flags" => "R",
224 # "comment" => "construct Or: Or(a, const) = Or(const, a) = a OR const",
225 # "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
226 # "emit" => '. or %S0, %C, %D0',
232 "comment" => "construct Xor: Xor(a, b) = Xor(b, a) = a XOR b",
233 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
234 "emit" => '. xor %D0, %S0, %S1',
238 # "irn_flags" => "R",
239 # "comment" => "construct Xor: Xor(a, const) = Xor(const, a) = a EOR const",
240 # "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
241 # "emit" => '. xor %S0, %C, %D0',
244 # not commutative operations
248 "comment" => "construct Sub: Sub(a, b) = a - b",
249 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
250 "emit" => '. sub %D0, %S0, %S1',
254 # "irn_flags" => "R",
255 # "comment" => "construct Sub: Sub(a, const) = a - const",
256 # "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
257 # "emit" => '. subl %S0, %C, %D0',
262 "comment" => "construct Shl: Shl(a, b) = a << b",
263 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
264 "emit" => '. slw %D0, %S0, %S1',
268 # "irn_flags" => "R",
269 # "comment" => "construct Shl: Shl(a, const) = a << const",
270 # "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
271 # "emit" => '. shl %S0, %C, %D0',
276 "comment" => "construct Shr: Srw(a, b): c = a >> b",
277 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
278 "emit" => '. srw %D0, %S0, %S1',
282 # "irn_flags" => "R",
283 # "comment" => "construct Shr: Shr(a, const) = a >> const",
284 # "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
285 # "emit" => '. shr %S0, %C, %D0',
290 "comment" => "construct Shrs: Sraw(a, b): c = a >> b",
291 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
292 "emit" => '. sraw %D0, %S0, %S1',
297 "comment" => "construct Shrs: Srawi(a, const): c = a >> const",
298 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
299 "emit" => '. sraw %D0, %S0, %C',
302 return (attr_a->data.constant_tarval != attr_b->data.constant_tarval);
309 "comment" => "construct ???: Rlwnm(a, b): c = a ROTL b",
310 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
311 "emit" => '. rlwnm %D0, %S0, %S1',
316 "comment" => "construct ???: Rlwinm(a, b_const, c_const, d_const): (m = MASK(c, d)) e = (a ROTL b) & m",
317 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
318 "emit" => '. rlwinm %D0, %S0, %RLWIMI',
321 return (attr_a->data.constant_tarval != attr_b->data.constant_tarval);
328 "comment" => "construct Minus: Neg(a) = -a",
329 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
330 "emit" => '. neg %D0, %S0',
335 "comment" => "construct Not: Not(a) = !a",
336 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
337 "emit" => '. nor %D0, %S0, %S0',
342 "comment" => "construct Sign extension of byte: Extsb(char a) = (int) a",
343 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
344 "emit" => '. extsb %D0, %S0',
349 "comment" => "construct Sign extension of halfword: Extsh(char a) = (short) a",
350 "reg_req" => { "in" => [ "gp" ], "out" => [ "gp" ] },
351 "emit" => '. extsh %D0, %S0',
356 "comment" => "construct Div (signed): Div(a, b) = a div b",
357 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
358 "emit" => '. divw %D0, %S0, %S1',
363 "comment" => "construct Div (unsigned): Div(a, b) = a div b",
364 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
365 "emit" => '. divwu %D0, %S0, %S1',
370 "comment" => "construct Mtctr: Ctr = a",
371 "reg_req" => { "in" => [ "gp" ], "out" => [ "count" ] },
372 "emit" => '. mtctr %S0',
381 "comment" => "Const (high-level node)",
382 "reg_req" => { "out" => [ "gp" ] },
385 return attr_a->data.constant_tarval != attr_b->data.constant_tarval;
392 "comment" => "float Const (high-level node)",
393 "reg_req" => { "out" => [ "fp" ] },
396 return attr_a->data.constant_tarval != attr_b->data.constant_tarval;
403 "comment" => "SymConst (high-level node)",
404 "reg_req" => { "out" => [ "gp" ] },
407 return attr_a->data.constant_tarval != attr_b->data.constant_tarval;
414 "comment" => "construct unknown register",
415 "reg_req" => { "out" => [ "gp" ] },
416 "emit" => '. \t\t /* use %D0 as uninitialized value */',
426 "comment" => "construct unknown float register",
427 "reg_req" => { "out" => [ "fp" ] },
428 "emit" => '. \t\t /* use %D0 as uninitialized value */',
438 "comment" => "construct unknown condition register",
439 "reg_req" => { "out" => [ "condition" ] },
440 "emit" => '. \t\t /* use %D0 as uninitialized value */',
450 "comment" => "load constant (16bit with sign extension)",
451 "reg_req" => { "out" => [ "gp" ] },
452 "emit" => '. addi %D0, 0, %C',
455 return (attr_a->data.constant_tarval != attr_b->data.constant_tarval);
460 "op_flags" => "L|X|Y",
461 "comment" => "branch somewhere",
462 "reg_req" => { "in" => [ "condition" ], "out" => [ "none", "none" ] },
465 return (attr_a->data.constant_tarval != attr_b->data.constant_tarval);
471 "comment" => "construct LoopCopy(src, dest, count, mem): Copy count words from src to dest",
472 "reg_req" => { "in" => [ "gp", "gp", "count", "none" ], "out" => [ "none", "in_r1", "in_r2", "in_r3", "gp" ] },
476 "op_flags" => "L|X|Y",
477 "comment" => "construct Switch(selector): Jump to whatever",
478 "reg_req" => { "in" => [ "gp", "gp", "condition" ], "out" => [ "none" ] },
481 return (attr_a->data.constant_tarval != attr_b->data.constant_tarval);
488 "comment" => "load the constant to higher 16 bit of register",
489 "reg_req" => { "out" => [ "gp" ] },
490 "emit" => '. addis %D0, 0, %C',
491 "attr" => "ppc32_attr_offset_mode om, tarval *tv, ident *id",
494 attr->offset_mode = om;
496 attr->content_type = ppc32_ac_Const;
497 attr->data.constant_tarval = tv;
500 attr->content_type = ppc32_ac_SymConst;
501 attr->data.symconst_ident = id;
506 return (attr_a->data.constant_tarval != attr_b->data.constant_tarval);
512 "comment" => "ors constant with register",
513 "reg_req" => { "in" => [ "gp"], "out" => [ "gp" ] },
514 "emit" => '. ori %D0, %S0, %C',
517 return (attr_a->data.constant_tarval != attr_b->data.constant_tarval);
523 "comment" => "ands constant with register with cr0 update",
524 "reg_req" => { "in" => [ "gp"], "out" => [ "gp", "cr0" ] },
525 "emit" => '. andi. %D0, %S0,%C',
528 return (attr_a->data.constant_tarval != attr_b->data.constant_tarval);
534 "comment" => "construct Cmp: Cmp(a, b) = Flags in crX",
535 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "condition" ] },
536 "emit" => '. cmp %D0, 0, %S0, %S1',
541 "comment" => "construct Cmp immediate: Cmpi(a, const) = Flags in crX",
542 "reg_req" => { "in" => [ "gp" ], "out" => [ "condition" ] },
543 "emit" => '. cmpi %D0, 0, %S0, %C',
546 return (attr_a->data.constant_tarval != attr_b->data.constant_tarval);
553 "comment" => "construct Cmp logical: Cmpl(a, b) = Flags in crX",
554 "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "condition" ] },
555 "emit" => '. cmpl %D0, 0, %S0, %S1',
560 "comment" => "construct Cmp logical immediate: Cmpli(a, const) = Flags in crX",
561 "reg_req" => { "in" => [ "gp" ], "out" => [ "condition" ] },
562 "emit" => '. cmpli %D0, 0, %S0, %C',
565 return (attr_a->data.constant_tarval != attr_b->data.constant_tarval);
575 "state" => "exc_pinned",
576 "comment" => "construct Load (byte unsigned): Load(ptr, mem) = LD ptr -> reg",
577 "reg_req" => { "in" => [ "!r0", "none" ], "out" => [ "gp", "none" ] },
578 "emit" => '. lbz %D0, %O(%S0)',
581 return (attr_a->data.constant_tarval != attr_b->data.constant_tarval);
583 "outs" => [ "res", "M" ],
589 "state" => "exc_pinned",
590 "comment" => "construct Load (halfword unsigned): Load(ptr, mem) = LD ptr -> reg",
591 "reg_req" => { "in" => [ "!r0", "none" ], "out" => [ "gp", "none" ] },
592 "emit" => '. lhz %D0, %O(%S0)',
595 return (attr_a->data.constant_tarval != attr_b->data.constant_tarval);
597 "outs" => [ "res", "M" ],
603 "state" => "exc_pinned",
604 "comment" => "construct Load (halfword signed): Load(ptr, mem) = LD ptr -> reg",
605 "reg_req" => { "in" => [ "!r0", "none" ], "out" => [ "gp", "none" ] },
606 "emit" => '. lha %D0, %O(%S0)',
609 return (attr_a->data.constant_tarval != attr_b->data.constant_tarval);
611 "outs" => [ "res", "M" ],
617 "state" => "exc_pinned",
618 "comment" => "construct Load (word): Load(ptr, mem) = LD ptr -> reg",
619 "reg_req" => { "in" => [ "!r0", "none" ], "out" => [ "gp", "none" ] },
620 "emit" => '. lwz %D0, %O(%S0)',
623 return (attr_a->data.constant_tarval != attr_b->data.constant_tarval);
625 "outs" => [ "res", "M" ],
631 "state" => "exc_pinned",
632 "comment" => "construct Load with update (word): Load(ptr, mem) = LD ptr -> reg",
633 "reg_req" => { "in" => [ "!r0", "none" ], "out" => [ "gp", "in_r1", "none"] },
634 "emit" => '. lwzu %D0, %O(%S0)',
637 return (attr_a->data.constant_tarval != attr_b->data.constant_tarval);
639 "outs" => [ "res", "ptr", "M" ],
644 "state" => "exc_pinned",
645 "comment" => "construct Store: Store (byte) (ptr, val, mem) = ST ptr,val",
646 "reg_req" => { "in" => [ "!r0", "gp", "none" ], "out" => [ "none" ] },
647 "emit" => '. stb %S1, %O(%S0)',
650 return (attr_a->data.constant_tarval != attr_b->data.constant_tarval);
657 "state" => "exc_pinned",
658 "comment" => "construct Store: Store (halfword) (ptr, val, mem) = ST ptr,val",
659 "reg_req" => { "in" => [ "!r0", "gp", "none" ], "out" => [ "none" ] },
660 "emit" => '. sth %S1, %O(%S0)',
663 return (attr_a->data.constant_tarval != attr_b->data.constant_tarval);
670 "state" => "exc_pinned",
671 "comment" => "construct Store: Store (word) (ptr, val, mem) = ST ptr,val",
672 "reg_req" => { "in" => [ "!r0", "gp", "none" ], "out" => [ "none" ] },
673 "emit" => '. stw %S1, %O(%S0)',
676 return (attr_a->data.constant_tarval != attr_b->data.constant_tarval);
681 #--------------------------------------------------------#
684 # | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
685 # | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
686 # | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
687 # |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
688 #--------------------------------------------------------#
690 # commutative operations
695 "comment" => "construct FP Add: Add(a, b) = Add(b, a) = a + b",
696 "reg_req" => { "in" => [ "fp", "fp" ], "out" => [ "fp" ] },
697 "emit" => '. fadd %D0, %S0, %S1',
703 "comment" => "construct FP Add (single): Add(a, b) = Add(b, a) = a + b",
704 "reg_req" => { "in" => [ "fp", "fp" ], "out" => [ "fp" ] },
705 "emit" => '. fadds %D0, %S0, %S1',
710 "comment" => "construct FP Mul: Mul(a, b) = Mul(b, a) = a * b",
711 "reg_req" => { "in" => [ "fp", "fp" ], "out" => [ "fp" ] },
712 "emit" => '. fmul %D0, %S0, %S1',
717 "comment" => "construct FP Mul (single): Mul(a, b) = Mul(b, a) = a * b",
718 "reg_req" => { "in" => [ "fp", "fp" ], "out" => [ "fp" ] },
719 "emit" => '. fmuls %D0, %S0, %S1',
723 "comment" => "construct FP Negation: fNeg(a) = -a",
724 "reg_req" => { "in" => [ "fp" ], "out" => [ "fp" ] },
725 "emit" => '. fneg %D0, %S0',
732 "comment" => "construct FP Max: Max(a, b) = Max(b, a) = a > b ? a : b",
733 "reg_req" => { "in" => [ "fp", "fp" ], "out" => [ "fp" ] },
734 "emit" => '. fmax %S0, %S1, %D0',
740 "comment" => "construct FP Min: Min(a, b) = Min(b, a) = a < b ? a : b",
741 "reg_req" => { "in" => [ "fp", "fp" ], "out" => [ "fp" ] },
742 "emit" => '. fmin %S0, %S1, %D0',
745 # not commutative operations
749 "comment" => "construct FP Sub: Sub(a, b) = a - b",
750 "reg_req" => { "in" => [ "fp", "fp" ], "out" => [ "fp" ] },
751 "emit" => '. fsub %D0, %S0, %S1',
756 "comment" => "construct FP Sub (single): Sub(a, b) = a - b",
757 "reg_req" => { "in" => [ "fp", "fp" ], "out" => [ "fp" ] },
758 "emit" => '. fsubs %D0, %S0, %S1',
762 "comment" => "construct FP Div: Div(a, b) = a / b",
763 "reg_req" => { "in" => [ "fp", "fp" ], "out" => [ "fp" ] },
764 "emit" => '. fdiv %D0, %S0, %S1',
768 "comment" => "construct FP Div (single): Div(a, b) = a / b",
769 "reg_req" => { "in" => [ "fp", "fp" ], "out" => [ "fp" ] },
770 "emit" => '. fdivs %D0, %S0, %S1',
775 "comment" => "construct FP Minus: fMinus(a) = -a",
776 "reg_req" => { "in" => [ "fp" ], "out" => [ "fp" ] },
777 "emit" => '. fneg %D0, %S0',
782 "comment" => "construct FP Convert to integer word: fCtiw(a) = (int) a",
783 "reg_req" => { "in" => [ "fp" ], "out" => [ "fp" ] },
784 "emit" => '. fctiw %D0, %S0',
789 "comment" => "construct FP Round to single: fRsp(a) = (float) a",
790 "reg_req" => { "in" => [ "fp" ], "out" => [ "fp" ] },
791 "emit" => '. frsp %D0, %S0',
796 "comment" => "construct FP Abs: fAbs(a) = |a|",
797 "reg_req" => { "in" => [ "fp" ], "out" => [ "fp" ] },
798 "emit" => '. fabs %D0, %S0',
803 "comment" => "construct FP Cmp unordered: fCmpu(a, b) = a ? b",
804 "reg_req" => { "in" => [ "fp", "fp" ], "out" => [ "condition" ] },
805 "emit" => '. fcmpu %D0, %S0, %S1',
812 # "irn_flags" => "R",
813 # "comment" => "represents a FP constant",
814 # "reg_req" => { "out" => [ "fp" ] },
815 # "emit" => '. fmov %C, %D0',
818 # /* TODO: compare fConst attributes */
826 "comment" => "construct unknown floating point register",
827 "reg_req" => { "out" => [ "fp" ] },
828 "emit" => '. \t\t /* use %D0 as uninitialized value */',
840 "state" => "exc_pinned",
841 "comment" => "construct FP Load (double): Load(ptr, mem) = LD ptr",
842 "reg_req" => { "in" => [ "!r0", "none" ], "out" => [ "fp", "none" ] },
843 "emit" => '. lfd %D0, %O(%S0)',
846 return (attr_a->data.constant_tarval != attr_b->data.constant_tarval);
848 "outs" => [ "res", "M" ],
854 "state" => "exc_pinned",
855 "comment" => "construct FP Load (single): Load(ptr, mem) = LD ptr",
856 "reg_req" => { "in" => [ "!r0", "none" ], "out" => [ "fp","none" ] },
857 "emit" => '. lfs %D0, %O(%S0)',
860 return (attr_a->data.constant_tarval != attr_b->data.constant_tarval);
862 "outs" => [ "res", "M" ],
867 "state" => "exc_pinned",
868 "comment" => "construct Store (double): Store(ptr, val, mem) = ST ptr,val",
869 "reg_req" => { "in" => [ "!r0", "fp", "none" ], "out" => [ "none" ] },
870 "emit" => '. stfd %S1, %O(%S0)',
873 return (attr_a->data.constant_tarval != attr_b->data.constant_tarval);
880 "state" => "exc_pinned",
881 "comment" => "construct Store (single): Store(ptr, val, mem) = ST ptr,val",
882 "reg_req" => { "in" => [ "!r0", "fp", "none" ], "out" => [ "none" ] },
883 "emit" => '. stfs %S1, %O(%S0)',
886 return (attr_a->data.constant_tarval != attr_b->data.constant_tarval);