2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The main ppc backend driver file.
23 * @author Moritz Kroll, Jens Mueller
28 #include "pseudo_irg.h"
40 #include "../bearch.h" /* the general register allocator interface */
41 #include "../benode_t.h"
42 #include "../belower.h"
43 #include "../besched.h"
46 #include "../bemachine.h"
47 #include "../bemodule.h"
48 #include "../bespillslots.h"
49 #include "../beblocksched.h"
51 #include "../begnuas.h"
52 #include "../belistsched.h"
56 #include "bearch_ppc32_t.h"
58 #include "ppc32_new_nodes.h" /* ppc nodes interface */
59 #include "gen_ppc32_regalloc_if.h" /* the generated interface (register type and class defenitions) */
60 #include "ppc32_transform.h"
61 #include "ppc32_transform_conv.h"
62 #include "ppc32_emitter.h"
63 #include "ppc32_map_regs.h"
65 #define DEBUG_MODULE "firm.be.ppc.isa"
69 /* TODO: ugly, but we need it to get access to the registers assigned to Phi nodes */
70 static set *cur_reg_set = NULL;
72 /**************************************************
75 * _ __ ___ __ _ __ _| | | ___ ___ _| |_
76 * | '__/ _ \/ _` | / _` | | |/ _ \ / __| | | _|
77 * | | | __/ (_| | | (_| | | | (_) | (__ | | |
78 * |_| \___|\__, | \__,_|_|_|\___/ \___| |_|_|
81 **************************************************/
84 * Return register requirements for a ppc node.
85 * If the node returns a tuple (mode_T) then the proj's
86 * will be asked for this information.
88 static const arch_register_req_t *ppc32_get_irn_reg_req(const ir_node *irn,
91 long node_pos = pos == -1 ? 0 : pos;
92 ir_mode *mode = get_irn_mode(irn);
93 FIRM_DBG_REGISTER(firm_dbg_module_t *mod, DEBUG_MODULE);
95 if (is_Block(irn) || mode == mode_X || mode == mode_M) {
96 DBG((mod, LEVEL_1, "ignoring block, mode_X or mode_M node %+F\n", irn));
97 return arch_no_register_req;
100 if (mode == mode_T && pos < 0) {
101 DBG((mod, LEVEL_1, "ignoring request for OUT requirements at %+F", irn));
102 return arch_no_register_req;
105 DBG((mod, LEVEL_1, "get requirements at pos %d for %+F ... ", pos, irn));
108 /* in case of a proj, we need to get the correct OUT slot */
109 /* of the node corresponding to the proj number */
111 node_pos = ppc32_translate_proj_pos(irn);
116 irn = skip_Proj_const(irn);
118 DB((mod, LEVEL_1, "skipping Proj, going to %+F at pos %d ... ", irn, node_pos));
121 /* get requirements for our own nodes */
122 if (is_ppc32_irn(irn)) {
123 const arch_register_req_t *req;
125 req = get_ppc32_in_req(irn, pos);
127 req = get_ppc32_out_req(irn, node_pos);
130 DB((mod, LEVEL_1, "returning reqs for %+F at pos %d\n", irn, pos));
134 /* unknowns should be transformed by now */
135 assert(!is_Unknown(irn));
137 DB((mod, LEVEL_1, "returning NULL for %+F (node not supported)\n", irn));
138 return arch_no_register_req;
141 static arch_irn_class_t ppc32_classify(const ir_node *irn)
143 irn = skip_Proj_const(irn);
146 return arch_irn_class_branch;
152 static ir_entity *ppc32_get_frame_entity(const ir_node *irn)
154 if(!is_ppc32_irn(irn)) return NULL;
155 if(get_ppc32_type(irn)!=ppc32_ac_FrameEntity) return NULL;
156 return get_ppc32_frame_entity(irn);
159 static void ppc32_set_frame_entity(ir_node *irn, ir_entity *ent)
161 if (! is_ppc32_irn(irn) || get_ppc32_type(irn) != ppc32_ac_FrameEntity)
163 set_ppc32_frame_entity(irn, ent);
167 * This function is called by the generic backend to correct offsets for
168 * nodes accessing the stack.
170 static void ppc32_set_stack_bias(ir_node *irn, int bias)
172 set_ppc32_offset(irn, bias);
175 static int ppc32_get_sp_bias(const ir_node *irn)
183 const be_abi_call_t *call;
188 * Initialize the callback object.
189 * @param call The call object.
190 * @param aenv The architecture environment.
191 * @param irg The graph with the method.
192 * @return Some pointer. This pointer is passed to all other callback functions as self object.
194 static void *ppc32_abi_init(const be_abi_call_t *call, const arch_env_t *aenv, ir_graph *irg)
196 ppc32_abi_env *env = XMALLOC(ppc32_abi_env);
205 * Destroy the callback object.
206 * @param self The callback object.
208 static void ppc32_abi_done(void *self)
214 * Get the between type for that call.
215 * @param self The callback object.
216 * @return The between type of for that call.
218 static ir_type *ppc32_abi_get_between_type(void *self)
220 static ir_type *between_type = NULL;
221 static ir_entity *old_bp_ent = NULL;
225 ir_entity *ret_addr_ent;
226 ir_type *ret_addr_type = new_type_primitive(new_id_from_str("return_addr"), mode_P);
227 ir_type *old_bp_type = new_type_primitive(new_id_from_str("bp"), mode_P);
229 between_type = new_type_class(new_id_from_str("ppc32_between_type"));
230 old_bp_ent = new_entity(between_type, new_id_from_str("old_bp"), old_bp_type);
231 ret_addr_ent = new_entity(between_type, new_id_from_str("old_bp"), ret_addr_type);
233 set_entity_offset(old_bp_ent, 0);
234 set_entity_offset(ret_addr_ent, get_type_size_bytes(old_bp_type));
235 set_type_size_bytes(between_type, get_type_size_bytes(old_bp_type) + get_type_size_bytes(ret_addr_type));
242 * Generate the prologue.
243 * @param self The callback object.
244 * @param mem A pointer to the mem node. Update this if you define new memory.
245 * @param reg_map A mapping mapping all callee_save/ignore/parameter registers to their defining nodes.
246 * @param stack_bias Points to the current stack bias, can be modified if needed.
248 * @return The register which shall be used as a stack frame base.
250 * All nodes which define registers in @p reg_map must keep @p reg_map current.
252 static const arch_register_t *ppc32_abi_prologue(void *self, ir_node **mem, pmap *reg_map, int *stack_bias)
254 ppc32_abi_env *env = (ppc32_abi_env *) self;
255 be_abi_call_flags_t flags = be_abi_call_get_flags(env->call);
259 isleaf = flags.bits.irg_is_leaf;
261 if (flags.bits.try_omit_fp)
262 return &ppc32_gp_regs[REG_R1];
264 return &ppc32_gp_regs[REG_R31];
268 * Generate the epilogue.
269 * @param self The callback object.
270 * @param mem Memory one can attach to.
271 * @param reg_map A mapping mapping all callee_save/ignore/return registers to their defining nodes.
273 * All nodes which define registers in @p reg_map must keep @p reg_map current.
274 * Also, the @p mem variable must be updated, if memory producing nodes are inserted.
276 static void ppc32_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_map)
284 static const be_abi_callbacks_t ppc32_abi_callbacks = {
287 ppc32_abi_get_between_type,
292 /* fill register allocator interface */
294 static const arch_irn_ops_t ppc32_irn_ops = {
295 ppc32_get_irn_reg_req,
297 ppc32_get_frame_entity,
298 ppc32_set_frame_entity,
299 ppc32_set_stack_bias,
301 NULL, /* get_inverse */
302 NULL, /* get_op_estimated_cost */
303 NULL, /* possible_memory_operand */
304 NULL, /* perform_memory_operand */
307 /**************************************************
310 * ___ ___ __| | ___ __ _ ___ _ __ _| |_
311 * / __/ _ \ / _` |/ _ \/ _` |/ _ \ '_ \ | | _|
312 * | (_| (_) | (_| | __/ (_| | __/ | | | | | |
313 * \___\___/ \__,_|\___|\__, |\___|_| |_| |_|_|
316 **************************************************/
318 static void ppc32_before_abi(void *self) {
319 ppc32_code_gen_t *cg = self;
320 ir_type *frame_type = get_irg_frame_type(cg->irg);
322 frame_alloc_area(frame_type, 24, 4, 1);
324 ppc32_init_conv_walk();
325 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_conv_walk, cg);
328 if(cg->area_size < 32) cg->area_size = 32;
329 cg->area = frame_alloc_area(get_irg_frame_type(cg->irg), cg->area_size+24, 16, 1);
333 static void ppc32_search_start_successor(ir_node *block, void *env) {
334 ppc32_code_gen_t *cg = env;
335 int n = get_Block_n_cfgpreds(block);
336 ir_node *startblock = get_irg_start_block(cg->irg);
337 if(block == startblock) return;
339 for (n--; n >= 0; n--) {
340 ir_node *predblock = get_irn_n(get_Block_cfgpred(block, n), -1);
341 if(predblock == startblock)
343 cg->start_succ_block = block;
350 * Transforms the standard firm graph into
353 static void ppc32_prepare_graph(void *self) {
354 ppc32_code_gen_t *cg = self;
356 irg_block_walk_graph(cg->irg, NULL, ppc32_search_start_successor, cg);
357 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_pretransform_walk, cg);
358 be_dump(cg->irg, "-pretransformed", dump_ir_block_graph);
360 ppc32_register_transformers();
361 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_transform_node, cg);
362 be_dump(cg->irg, "-transformed", dump_ir_block_graph);
363 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_transform_const, cg);
369 * Called immediatly before emit phase.
371 static void ppc32_finish_irg(void *self) {
373 /* TODO: - fix offsets for nodes accessing stack
380 * Called before the register allocator.
381 * Calculate a block schedule here. We need it for the x87
382 * simulator and the emitter.
384 static void ppc32_before_ra(void *self) {
385 ppc32_code_gen_t *cg = self;
386 cg->blk_sched = be_create_block_schedule(cg->irg, cg->birg->exec_freq);
389 static void ppc32_transform_spill(ir_node *node, void *env)
393 if(be_is_Spill(node))
395 ir_node *store, *proj;
396 dbg_info *dbg = get_irn_dbg_info(node);
397 ir_node *block = get_nodes_block(node);
399 const arch_register_class_t *regclass = arch_get_irn_reg_class(node, 1);
401 if (regclass == &ppc32_reg_classes[CLASS_ppc32_gp])
403 store = new_bd_ppc32_Stw(dbg, block,
404 get_irn_n(node, 0), get_irn_n(node, 1), new_NoMem());
406 else if (regclass == &ppc32_reg_classes[CLASS_ppc32_fp])
408 store = new_bd_ppc32_Stfd(dbg, block,
409 get_irn_n(node, 0), get_irn_n(node, 1), new_NoMem());
411 else panic("Spill for register class not supported yet!");
413 set_ppc32_frame_entity(store, be_get_frame_entity(node));
415 proj = new_rd_Proj(dbg, block, store, mode_M, pn_Store_M);
417 if (sched_is_scheduled(node)) {
418 sched_add_after(sched_prev(node), store);
419 sched_add_after(store, proj);
424 exchange(node, proj);
427 if(be_is_Reload(node))
429 ir_node *load, *proj;
430 const arch_register_t *reg;
431 dbg_info *dbg = get_irn_dbg_info(node);
432 ir_node *block = get_nodes_block(node);
433 ir_mode *mode = get_irn_mode(node);
435 const arch_register_class_t *regclass = arch_get_irn_reg_class_out(node);
437 if (regclass == &ppc32_reg_classes[CLASS_ppc32_gp])
439 load = new_bd_ppc32_Lwz(dbg, block, get_irn_n(node, 0), get_irn_n(node, 1));
441 else if (regclass == &ppc32_reg_classes[CLASS_ppc32_fp])
443 load = new_bd_ppc32_Lfd(dbg, block, get_irn_n(node, 0), get_irn_n(node, 1));
445 else panic("Reload for register class not supported yet!");
447 set_ppc32_frame_entity(load, be_get_frame_entity(node));
449 proj = new_rd_Proj(dbg, block, load, mode, pn_Load_res);
451 if (sched_is_scheduled(node)) {
452 sched_add_after(sched_prev(node), load);
453 sched_add_after(load, proj);
458 /* copy the register from the old node to the new Load */
459 reg = arch_get_irn_register(node);
460 arch_set_irn_register(load, reg);
462 exchange(node, proj);
467 * Some stuff to do immediately after register allocation
469 static void ppc32_after_ra(void *self) {
470 ppc32_code_gen_t *cg = self;
471 be_coalesce_spillslots(cg->birg);
472 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_transform_spill, NULL);
476 * Emits the code, closes the output file and frees
477 * the code generator interface.
479 static void ppc32_emit_and_done(void *self) {
480 ppc32_code_gen_t *cg = self;
481 ir_graph *irg = cg->irg;
483 dump_ir_block_graph_sched(irg, "-ppc-finished");
484 ppc32_gen_routine(cg, irg);
488 /* de-allocate code generator */
489 del_set(cg->reg_set);
493 int is_direct_entity(ir_entity *ent);
495 static void *ppc32_cg_init(be_irg_t *birg);
497 static const arch_code_generator_if_t ppc32_code_gen_if = {
499 NULL, /* get_pic_base */
503 ppc32_before_ra, /* before register allocation hook */
510 * Initializes the code generator.
512 static void *ppc32_cg_init(be_irg_t *birg) {
513 ppc32_isa_t *isa = (ppc32_isa_t *)birg->main_env->arch_env;
514 ppc32_code_gen_t *cg = XMALLOC(ppc32_code_gen_t);
516 cg->impl = &ppc32_code_gen_if;
518 cg->reg_set = new_set(ppc32_cmp_irn_reg_assoc, 1024);
523 cg->start_succ_block = NULL;
524 cg->blk_sched = NULL;
525 FIRM_DBG_REGISTER(cg->mod, "firm.be.ppc.cg");
527 cur_reg_set = cg->reg_set;
529 return (arch_code_generator_t *)cg;
534 /*****************************************************************
535 * ____ _ _ _____ _____
536 * | _ \ | | | | |_ _|/ ____| /\
537 * | |_) | __ _ ___| | _____ _ __ __| | | | | (___ / \
538 * | _ < / _` |/ __| |/ / _ \ '_ \ / _` | | | \___ \ / /\ \
539 * | |_) | (_| | (__| < __/ | | | (_| | _| |_ ____) / ____ \
540 * |____/ \__,_|\___|_|\_\___|_| |_|\__,_| |_____|_____/_/ \_\
542 *****************************************************************/
544 static ppc32_isa_t ppc32_isa_template = {
546 &ppc32_isa_if, /* isa interface */
547 &ppc32_gp_regs[REG_R1], /* stack pointer */
548 &ppc32_gp_regs[REG_R31], /* base pointer */
549 &ppc32_reg_classes[CLASS_ppc32_gp], /* static link pointer class */
550 -1, /* stack is decreasing */
551 2, /* power of two stack alignment for calls, 2^2 == 4 */
552 NULL, /* main environment */
554 5, /* reload costs */
556 NULL /* symbol set */
560 * Collects all SymConsts which need to be accessed "indirectly"
562 * @param node the firm node
563 * @param env the symbol set
565 static void ppc32_collect_symconsts_walk(ir_node *node, void *env) {
566 pset *symbol_set = env;
568 if (is_SymConst(node)) {
569 ir_entity *ent = get_SymConst_entity(node);
570 set_entity_backend_marked(ent, 1);
571 if (! is_direct_entity(ent))
572 pset_insert_ptr(symbol_set, ent);
577 * Initializes the backend ISA and opens the output file.
579 static arch_env_t *ppc32_init(FILE *file_handle) {
580 static int inited = 0;
587 isa = XMALLOC(ppc32_isa_t);
588 memcpy(isa, &ppc32_isa_template, sizeof(*isa));
590 be_emit_init(file_handle);
592 ppc32_register_init();
593 ppc32_create_opcodes(&ppc32_irn_ops);
597 isa->symbol_set = pset_new_ptr(8);
598 for (i = 0; i < get_irp_n_irgs(); ++i) {
599 ir_graph *irg = get_irp_irg(i);
600 irg_walk_blkwise_graph(irg, NULL, ppc32_collect_symconsts_walk, isa->symbol_set);
603 /* we mark referenced global entities, so we can only emit those which
604 * are actually referenced. (Note: you mustn't use the type visited flag
605 * elsewhere in the backend)
607 inc_master_type_visited();
609 return &isa->arch_env;
612 static void ppc32_dump_indirect_symbols(ppc32_isa_t *isa) {
615 foreach_pset(isa->symbol_set, ent) {
616 const char *ld_name = get_entity_ld_name(ent);
617 be_emit_irprintf(".non_lazy_symbol_pointer\n%s:\n\t.indirect_symbol _%s\n\t.long 0\n\n", ld_name, ld_name);
618 be_emit_write_line();
623 * Closes the output file and frees the ISA structure.
625 static void ppc32_done(void *self) {
626 ppc32_isa_t *isa = self;
628 be_gas_emit_decls(isa->arch_env.main_env, 1);
629 be_gas_emit_switch_section(GAS_SECTION_DATA);
630 ppc32_dump_indirect_symbols(isa);
633 del_pset(isa->symbol_set);
640 static unsigned ppc32_get_n_reg_class(const void *self) {
645 static const arch_register_class_t *ppc32_get_reg_class(const void *self,
648 assert(i < N_CLASSES && "Invalid ppc register class requested.");
649 return &ppc32_reg_classes[i];
655 * Get the register class which shall be used to store a value of a given mode.
656 * @param self The this pointer.
657 * @param mode The mode in question.
658 * @return A register class which can hold values of the given mode.
660 const arch_register_class_t *ppc32_get_reg_class_for_mode(const void *self, const ir_mode *mode) {
662 if (mode_is_float(mode))
663 return &ppc32_reg_classes[CLASS_ppc32_fp];
665 return &ppc32_reg_classes[CLASS_ppc32_gp];
670 * Get the ABI restrictions for procedure calls.
671 * @param self The this pointer.
672 * @param method_type The type of the method (procedure) in question.
673 * @param abi The abi object to be modified
675 static void ppc32_get_call_abi(const void *self, ir_type *method_type, be_abi_call_t *abi) {
678 int i, n = get_method_n_params(method_type);
679 int stackoffs = 0, lastoffs = 0, stackparamsize;
684 const arch_register_t *reg;
685 be_abi_call_flags_t call_flags = { { 0, 0, 1, 0, 0, 0, 1 } };
688 if(get_type_visibility(method_type)!=visibility_external_allocated)
689 call_flags.bits.call_has_imm = 1;
691 /* set stack parameter passing style */
692 be_abi_call_set_flags(abi, call_flags, &ppc32_abi_callbacks);
694 for (i = 0; i < n; i++) {
695 tp = get_method_param_type(method_type, i);
696 mode = get_type_mode(tp);
697 if(is_atomic_type(tp))
699 if(mode_is_float(mode))
701 if(fpregi <= REG_F13)
703 if(get_mode_size_bits(mode) == 32) gpregi++, stackparamsize=4;
704 else gpregi += 2, stackparamsize=8; // mode == irm_D
705 reg = &ppc32_fp_regs[fpregi++];
709 if(get_mode_size_bits(mode) == 32) stackparamsize=4;
710 else stackparamsize=8; // mode == irm_D
716 if(gpregi <= REG_R10)
717 reg = &ppc32_gp_regs[gpregi++];
724 be_abi_call_param_reg(abi, i, reg);
727 be_abi_call_param_stack(abi, i, mode, 4, stackoffs - lastoffs, 0);
728 lastoffs = stackoffs+stackparamsize;
730 stackoffs += stackparamsize;
734 be_abi_call_param_stack(abi, i, mode, 4, stackoffs - lastoffs, 0);
735 stackoffs += (get_type_size_bytes(tp)+3) & -4;
736 lastoffs = stackoffs;
740 /* explain where result can be found if any */
741 if (get_method_n_ress(method_type) > 0) {
742 tp = get_method_res_type(method_type, 0);
743 mode = get_type_mode(tp);
745 be_abi_call_res_reg(abi, 0,
746 mode_is_float(mode) ? &ppc32_fp_regs[REG_F1] : &ppc32_gp_regs[REG_R3]);
750 int ppc32_to_appear_in_schedule(void *block_env, const ir_node *irn) {
752 if(!is_ppc32_irn(irn))
759 * Initializes the code generator interface.
761 static const arch_code_generator_if_t *ppc32_get_code_generator_if(void *self) {
763 return &ppc32_code_gen_if;
766 list_sched_selector_t ppc32_sched_selector;
769 * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
771 static const list_sched_selector_t *ppc32_get_list_sched_selector(const void *self, list_sched_selector_t *selector) {
774 ppc32_sched_selector = trivial_selector;
775 ppc32_sched_selector.to_appear_in_schedule = ppc32_to_appear_in_schedule;
776 return &ppc32_sched_selector;
779 static const ilp_sched_selector_t *ppc32_get_ilp_sched_selector(const void *self) {
785 * Returns the necessary byte alignment for storing a register of given class.
787 static int ppc32_get_reg_class_alignment(const void *self, const arch_register_class_t *cls) {
788 ir_mode *mode = arch_register_class_mode(cls);
791 return get_mode_size_bytes(mode);
794 static const be_execution_unit_t ***ppc32_get_allowed_execution_units(const void *self, const ir_node *irn) {
798 panic("Unimplemented ppc32_get_allowed_execution_units()");
802 static const be_machine_t *ppc32_get_machine(const void *self) {
805 panic("Unimplemented ppc32_get_machine()");
810 * Return irp irgs in the desired order.
812 static ir_graph **ppc32_get_irg_list(const void *self, ir_graph ***irg_list) {
819 * Returns the libFirm configuration parameter for this backend.
821 static const backend_params *ppc32_get_libfirm_params(void) {
822 static backend_params p = {
823 1, /* need dword lowering */
824 0, /* don't support inline assembler yet */
825 NULL, /* will be set later */
826 NULL, /* but yet no creator function */
827 NULL, /* context for create_intrinsic_fkt */
828 NULL, /* no if conversion settings */
829 NULL, /* no float arithmetic mode (TODO) */
830 0, /* no trampoline support: size 0 */
831 0, /* no trampoline support: align 0 */
832 NULL, /* no trampoline support: no trampoline builder */
833 4 /* alignment of stack parameter */
839 static asm_constraint_flags_t ppc32_parse_asm_constraint(const void *self, const char **c)
841 /* no asm support yet */
844 return ASM_CONSTRAINT_FLAG_INVALID;
847 static int ppc32_is_valid_clobber(const void *self, const char *clobber)
849 /* no asm support yet */
855 const arch_isa_if_t ppc32_isa_if = {
858 NULL, /* handle intrinsics */
859 ppc32_get_n_reg_class,
861 ppc32_get_reg_class_for_mode,
863 ppc32_get_code_generator_if,
864 ppc32_get_list_sched_selector,
865 ppc32_get_ilp_sched_selector,
866 ppc32_get_reg_class_alignment,
867 ppc32_get_libfirm_params,
868 ppc32_get_allowed_execution_units,
871 NULL, /* mark remat */
872 ppc32_parse_asm_constraint,
873 ppc32_is_valid_clobber
876 void be_init_arch_ppc32(void)
878 be_register_isa_if("ppc32", &ppc32_isa_if);
881 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_ppc32);