1 /* The main ppc backend driver file. */
8 #include "pseudo_irg.h"
19 #include "../bearch.h" /* the general register allocator interface */
20 #include "../benode_t.h"
21 #include "../belower.h"
22 #include "../besched_t.h"
28 #include "bearch_ppc32_t.h"
30 #include "ppc32_new_nodes.h" /* ppc nodes interface */
31 #include "gen_ppc32_regalloc_if.h" /* the generated interface (register type and class defenitions) */
32 #include "ppc32_gen_decls.h" /* interface declaration emitter */
33 #include "ppc32_transform.h"
34 #include "ppc32_transform_conv.h"
35 #include "ppc32_emitter.h"
36 #include "ppc32_map_regs.h"
38 #define DEBUG_MODULE "firm.be.ppc.isa"
41 pset *symbol_pset = NULL;
43 /* TODO: ugly, but we need it to get access to the registers assigned to Phi nodes */
44 static set *cur_reg_set = NULL;
46 /**************************************************
49 * _ __ ___ __ _ __ _| | | ___ ___ _| |_
50 * | '__/ _ \/ _` | / _` | | |/ _ \ / __| | | _|
51 * | | | __/ (_| | | (_| | | | (_) | (__ | | |
52 * |_| \___|\__, | \__,_|_|_|\___/ \___| |_|_|
55 **************************************************/
57 static ir_node *my_skip_proj(const ir_node *n) {
64 * Return register requirements for a ppc node.
65 * If the node returns a tuple (mode_T) then the proj's
66 * will be asked for this information.
68 static const arch_register_req_t *ppc32_get_irn_reg_req(const void *self, arch_register_req_t *req, const ir_node *irn, int pos) {
69 const ppc32_register_req_t *irn_req;
70 long node_pos = pos == -1 ? 0 : pos;
71 ir_mode *mode = get_irn_mode(irn);
72 FIRM_DBG_REGISTER(firm_dbg_module_t *mod, DEBUG_MODULE);
74 if (is_Block(irn) || mode == mode_X || mode == mode_M) {
75 DBG((mod, LEVEL_1, "ignoring block, mode_X or mode_M node %+F\n", irn));
79 if (mode == mode_T && pos < 0) {
80 DBG((mod, LEVEL_1, "ignoring request for OUT requirements at %+F", irn));
84 DBG((mod, LEVEL_1, "get requirements at pos %d for %+F ... ", pos, irn));
87 /* in case of a proj, we need to get the correct OUT slot */
88 /* of the node corresponding to the proj number */
90 node_pos = ppc32_translate_proj_pos(irn);
96 irn = my_skip_proj(irn);
98 DB((mod, LEVEL_1, "skipping Proj, going to %+F at pos %d ... ", irn, node_pos));
101 /* get requirements for our own nodes */
102 if (is_ppc32_irn(irn)) {
104 irn_req = get_ppc32_in_req(irn, pos);
107 irn_req = get_ppc32_out_req(irn, node_pos);
110 DB((mod, LEVEL_1, "returning reqs for %+F at pos %d\n", irn, pos));
112 memcpy(req, &(irn_req->req), sizeof(*req));
114 if (arch_register_req_is(&(irn_req->req), should_be_same)) {
115 assert(irn_req->same_pos >= 0 && "should be same constraint for in -> out NYI");
116 req->other_same = get_irn_n(irn, irn_req->same_pos);
119 if (arch_register_req_is(&(irn_req->req), should_be_different)) {
120 assert(irn_req->different_pos >= 0 && "should be different constraint for in -> out NYI");
121 req->other_different = get_irn_n(irn, irn_req->different_pos);
124 /* get requirements for FIRM nodes */
126 /* treat Phi like Const with default requirements */
128 DB((mod, LEVEL_1, "returning standard reqs for %+F\n", irn));
130 if (mode_is_float(mode)) {
131 memcpy(req, &(ppc32_default_req_ppc32_fp.req), sizeof(*req));
133 else if (mode_is_int(mode) || mode_is_reference(mode)) {
134 memcpy(req, &(ppc32_default_req_ppc32_gp.req), sizeof(*req));
136 else if (mode == mode_T || mode == mode_M) {
137 DBG((mod, LEVEL_1, "ignoring Phi node %+F\n", irn));
141 assert(0 && "unsupported Phi-Mode");
145 DB((mod, LEVEL_1, "returning NULL for %+F (node not supported)\n", irn));
153 static void ppc32_set_irn_reg(const void *self, ir_node *irn, const arch_register_t *reg) {
158 if (get_irn_mode(irn) == mode_X) {
162 pos = ppc32_translate_proj_pos(irn);
163 irn = my_skip_proj(irn);
166 if (is_ppc32_irn(irn)) {
167 const arch_register_t **slots;
169 slots = get_ppc32_slots(irn);
173 /* here we set the registers for the Phi nodes */
174 ppc32_set_firm_reg(irn, reg, cur_reg_set);
178 static const arch_register_t *ppc32_get_irn_reg(const void *self, const ir_node *irn) {
180 const arch_register_t *reg = NULL;
184 if (get_irn_mode(irn) == mode_X) {
188 pos = ppc32_translate_proj_pos(irn);
189 irn = my_skip_proj(irn);
192 if (is_ppc32_irn(irn)) {
193 const arch_register_t **slots;
194 slots = get_ppc32_slots(irn);
198 reg = ppc32_get_firm_reg(irn, cur_reg_set);
204 static arch_irn_class_t ppc32_classify(const void *self, const ir_node *irn) {
205 irn = my_skip_proj(irn);
208 return arch_irn_class_branch;
210 else if (is_ppc32_irn(irn)) {
211 return arch_irn_class_normal;
217 static arch_irn_flags_t ppc32_get_flags(const void *self, const ir_node *irn) {
218 irn = my_skip_proj(irn);
220 if (is_ppc32_irn(irn)) {
221 return get_ppc32_flags(irn);
223 else if (is_Unknown(irn)) {
224 return arch_irn_flags_ignore;
230 static entity *ppc32_get_frame_entity(const void *self, const ir_node *irn) {
231 if(!is_ppc32_irn(irn)) return NULL;
232 if(get_ppc32_type(irn)!=ppc32_ac_FrameEntity) return NULL;
233 return get_ppc32_frame_entity(irn);
237 * This function is called by the generic backend to correct offsets for
238 * nodes accessing the stack.
240 static void ppc32_set_stack_bias(const void *self, ir_node *irn, int bias) {
241 set_ppc32_offset(irn, bias);
246 const be_abi_call_t *call;
251 * Initialize the callback object.
252 * @param call The call object.
253 * @param aenv The architecture environment.
254 * @param irg The graph with the method.
255 * @return Some pointer. This pointer is passed to all other callback functions as self object.
257 static void *ppc32_abi_init(const be_abi_call_t *call, const arch_env_t *aenv, ir_graph *irg)
259 ppc32_abi_env *env = xmalloc(sizeof(ppc32_abi_env));
266 * Destroy the callback object.
267 * @param self The callback object.
269 static void ppc32_abi_done(void *self)
275 * Get the between type for that call.
276 * @param self The callback object.
277 * @return The between type of for that call.
279 static ir_type *ppc32_abi_get_between_type(void *self)
281 static ir_type *between_type = NULL;
282 static entity *old_bp_ent = NULL;
285 entity *ret_addr_ent;
286 ir_type *ret_addr_type = new_type_primitive(new_id_from_str("return_addr"), mode_P);
287 ir_type *old_bp_type = new_type_primitive(new_id_from_str("bp"), mode_P);
289 between_type = new_type_class(new_id_from_str("ppc32_between_type"));
290 old_bp_ent = new_entity(between_type, new_id_from_str("old_bp"), old_bp_type);
291 ret_addr_ent = new_entity(between_type, new_id_from_str("old_bp"), ret_addr_type);
293 set_entity_offset_bytes(old_bp_ent, 0);
294 set_entity_offset_bytes(ret_addr_ent, get_type_size_bytes(old_bp_type));
295 set_type_size_bytes(between_type, get_type_size_bytes(old_bp_type) + get_type_size_bytes(ret_addr_type));
302 * Put all registers which are saved by the prologue/epilogue in a set.
303 * @param self The callback object.
306 static void ppc32_abi_regs_saved_by_me(void *self, pset *regs)
311 * Generate the prologue.
312 * @param self The callback object.
313 * @param mem A pointer to the mem node. Update this if you define new memory.
314 * @param reg_map A mapping mapping all callee_save/ignore/parameter registers to their defining nodes.
315 * @return The register which shall be used as a stack frame base.
317 * All nodes which define registers in @p reg_map must keep @p reg_map current.
319 static const arch_register_t *ppc32_abi_prologue(void *self, ir_node **mem, pmap *reg_map)
321 ppc32_abi_env *env = (ppc32_abi_env *) self;
322 be_abi_call_flags_t flags = be_abi_call_get_flags(env->call);
323 isleaf = flags.bits.irg_is_leaf;
325 if(flags.bits.try_omit_fp)
326 return &ppc32_gp_regs[REG_R1];
328 return &ppc32_gp_regs[REG_R31];
332 * Generate the epilogue.
333 * @param self The callback object.
334 * @param mem Memory one can attach to.
335 * @param reg_map A mapping mapping all callee_save/ignore/return registers to their defining nodes.
337 * All nodes which define registers in @p reg_map must keep @p reg_map current.
338 * Also, the @p mem variable must be updated, if memory producing nodes are inserted.
340 static void ppc32_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_map)
344 static const be_abi_callbacks_t ppc32_abi_callbacks = {
347 ppc32_abi_get_between_type,
348 ppc32_abi_regs_saved_by_me,
353 /* fill register allocator interface */
355 static const arch_irn_ops_if_t ppc32_irn_ops_if = {
356 ppc32_get_irn_reg_req,
361 ppc32_get_frame_entity,
365 ppc32_irn_ops_t ppc32_irn_ops = {
372 /**************************************************
375 * ___ ___ __| | ___ __ _ ___ _ __ _| |_
376 * / __/ _ \ / _` |/ _ \/ _` |/ _ \ '_ \ | | _|
377 * | (_| (_) | (_| | __/ (_| | __/ | | | | | |
378 * \___\___/ \__,_|\___|\__, |\___|_| |_| |_|_|
381 **************************************************/
383 static void ppc32_before_abi(void *self) {
384 ppc32_code_gen_t *cg = self;
385 ir_type *frame_type = get_irg_frame_type(cg->irg);
387 frame_alloc_area(frame_type, 24, 4, 1);
389 ppc32_init_conv_walk();
390 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_conv_walk, cg);
393 if(cg->area_size < 32) cg->area_size = 32;
394 cg->area = frame_alloc_area(get_irg_frame_type(cg->irg), cg->area_size+24, 16, 1);
398 static void ppc32_search_start_successor(ir_node *block, void *env) {
399 ppc32_code_gen_t *cg = env;
400 int n = get_Block_n_cfgpreds(block);
401 ir_node *startblock = get_irg_start_block(cg->irg);
402 if(block == startblock) return;
404 for (n--; n >= 0; n--) {
405 ir_node *predblock = get_irn_n(get_Block_cfgpred(block, n), -1);
406 if(predblock == startblock)
408 cg->start_succ_block = block;
415 * Transforms the standard firm graph into
418 static void ppc32_prepare_graph(void *self) {
419 ppc32_code_gen_t *cg = self;
421 irg_block_walk_graph(cg->irg, NULL, ppc32_search_start_successor, cg);
422 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_pretransform_walk, cg);
423 be_dump(cg->irg, "-pretransformed", dump_ir_block_graph);
425 ppc32_register_transformers();
426 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_transform_node, cg);
427 be_dump(cg->irg, "-transformed", dump_ir_block_graph);
428 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_transform_const, cg);
434 * Called immediatly before emit phase.
436 static void ppc32_finish_irg(ir_graph *irg, ppc32_code_gen_t *cg) {
437 /* TODO: - fix offsets for nodes accessing stack
444 * These are some hooks which must be filled but are probably not needed.
446 static void ppc32_before_sched(void *self) {
447 /* Some stuff you need to do after scheduling but before register allocation */
451 * Called before the register allocator.
452 * Calculate a block schedule here. We need it for the x87
453 * simulator and the emitter.
455 static void ppc32_before_ra(void *self) {
456 ppc32_code_gen_t *cg = self;
457 cg->blk_sched = sched_create_block_schedule(cg->irg);
460 static void ppc32_transform_spill(ir_node *node, void *env)
462 ppc32_code_gen_t *cgenv = (ppc32_code_gen_t *)env;
464 if(be_is_Spill(node))
466 ir_node *store, *proj;
467 dbg_info *dbg = get_irn_dbg_info(node);
468 ir_node *block = get_nodes_block(node);
470 const arch_register_class_t *regclass = arch_get_irn_reg_class(cgenv->arch_env, node, 1);
472 if (regclass == &ppc32_reg_classes[CLASS_ppc32_gp])
474 store = new_rd_ppc32_Stw(dbg, current_ir_graph, block,
475 get_irn_n(node, 0), get_irn_n(node, 1), new_rd_NoMem(current_ir_graph));
477 else if (regclass == &ppc32_reg_classes[CLASS_ppc32_fp])
479 store = new_rd_ppc32_Stfd(dbg, current_ir_graph, block,
480 get_irn_n(node, 0), get_irn_n(node, 1), new_rd_NoMem(current_ir_graph));
482 else assert(0 && "Spill for register class not supported yet!");
484 set_ppc32_frame_entity(store, be_get_frame_entity(node));
486 proj = new_rd_Proj(dbg, current_ir_graph, block, store, mode_M, pn_Store_M);
488 if (sched_is_scheduled(node)) {
489 sched_add_after(sched_prev(node), store);
490 sched_add_after(store, proj);
495 exchange(node, proj);
498 if(be_is_Reload(node))
500 ir_node *load, *proj;
501 const arch_register_t *reg;
502 dbg_info *dbg = get_irn_dbg_info(node);
503 ir_node *block = get_nodes_block(node);
504 ir_mode *mode = get_irn_mode(node);
506 const arch_register_class_t *regclass = arch_get_irn_reg_class(cgenv->arch_env, node, -1);
508 if (regclass == &ppc32_reg_classes[CLASS_ppc32_gp])
510 load = new_rd_ppc32_Lwz(dbg, current_ir_graph, block, get_irn_n(node, 0), get_irn_n(node, 1));
512 else if (regclass == &ppc32_reg_classes[CLASS_ppc32_fp])
514 load = new_rd_ppc32_Lfd(dbg, current_ir_graph, block, get_irn_n(node, 0), get_irn_n(node, 1));
516 else assert(0 && "Reload for register class not supported yet!");
518 set_ppc32_frame_entity(load, be_get_frame_entity(node));
520 proj = new_rd_Proj(dbg, current_ir_graph, block, load, mode, pn_Load_res);
522 if (sched_is_scheduled(node)) {
523 sched_add_after(sched_prev(node), load);
524 sched_add_after(load, proj);
529 /* copy the register from the old node to the new Load */
530 reg = arch_get_irn_register(cgenv->arch_env, node);
531 arch_set_irn_register(cgenv->arch_env, load, reg);
533 exchange(node, proj);
538 * Some stuff to do immediately after register allocation
540 static void ppc32_after_ra(void *self) {
541 ppc32_code_gen_t *cg = self;
542 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_transform_spill, cg);
546 * Emits the code, closes the output file and frees
547 * the code generator interface.
549 static void ppc32_emit_and_done(void *self) {
550 ppc32_code_gen_t *cg = self;
551 ir_graph *irg = cg->irg;
552 FILE *out = cg->isa->out;
554 if (cg->emit_decls) {
555 ppc32_gen_decls(out);
559 ppc32_finish_irg(irg, cg);
560 dump_ir_block_graph_sched(irg, "-ppc-finished");
561 ppc32_gen_routine(out, irg, cg);
565 /* de-allocate code generator */
566 del_set(cg->reg_set);
571 del_pset(symbol_pset);
576 int is_direct_entity(entity *ent);
579 * Collects all SymConsts which need to be accessed "indirectly"
581 * @param node the firm node
582 * @param env the debug module
584 void ppc32_collect_symconsts_walk(ir_node *node, void *env) {
585 if(get_irn_op(node) == op_SymConst)
587 entity *ent = get_SymConst_entity(node);
588 if(!is_direct_entity(ent))
589 pset_insert_ptr(symbol_pset, ent);
593 static void *ppc32_cg_init(const be_irg_t *birg);
595 static const arch_code_generator_if_t ppc32_code_gen_if = {
599 ppc32_before_sched, /* before scheduling hook */
600 ppc32_before_ra, /* before register allocation hook */
606 * Initializes the code generator.
608 static void *ppc32_cg_init(const be_irg_t *birg) {
609 ppc32_isa_t *isa = (ppc32_isa_t *)birg->main_env->arch_env->isa;
610 ppc32_code_gen_t *cg = xmalloc(sizeof(*cg));
612 cg->impl = &ppc32_code_gen_if;
614 cg->reg_set = new_set(ppc32_cmp_irn_reg_assoc, 1024);
615 cg->arch_env = birg->main_env->arch_env;
620 cg->start_succ_block = NULL;
621 cg->blk_sched = NULL;
622 FIRM_DBG_REGISTER(cg->mod, "firm.be.ppc.cg");
626 if (isa->num_codegens > 1)
632 symbol_pset = pset_new_ptr(8);
633 for(i=0; i<get_irp_n_irgs(); i++)
635 cg->irg = get_irp_irg(i);
636 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_collect_symconsts_walk, cg);
641 cur_reg_set = cg->reg_set;
643 ppc32_irn_ops.cg = cg;
645 return (arch_code_generator_t *)cg;
650 /*****************************************************************
651 * ____ _ _ _____ _____
652 * | _ \ | | | | |_ _|/ ____| /\
653 * | |_) | __ _ ___| | _____ _ __ __| | | | | (___ / \
654 * | _ < / _` |/ __| |/ / _ \ '_ \ / _` | | | \___ \ / /\ \
655 * | |_) | (_| | (__| < __/ | | | (_| | _| |_ ____) / ____ \
656 * |____/ \__,_|\___|_|\_\___|_| |_|\__,_| |_____|_____/_/ \_\
658 *****************************************************************/
660 static ppc32_isa_t ppc32_isa_template = {
662 &ppc32_gp_regs[REG_R1], // stack pointer
663 &ppc32_gp_regs[REG_R31], // base pointer
664 -1, // stack is decreasing
665 0, // num codegens... ??
670 * Initializes the backend ISA and opens the output file.
672 static void *ppc32_init(FILE *file_handle) {
673 static int inited = 0;
679 isa = xmalloc(sizeof(*isa));
680 memcpy(isa, &ppc32_isa_template, sizeof(*isa));
682 isa->out = file_handle;
684 ppc32_register_init(isa);
685 ppc32_create_opcodes();
695 * Closes the output file and frees the ISA structure.
697 static void ppc32_done(void *self) {
703 static int ppc32_get_n_reg_class(const void *self) {
707 static const arch_register_class_t *ppc32_get_reg_class(const void *self, int i) {
708 assert(i >= 0 && i < N_CLASSES && "Invalid ppc register class requested.");
709 return &ppc32_reg_classes[i];
715 * Get the register class which shall be used to store a value of a given mode.
716 * @param self The this pointer.
717 * @param mode The mode in question.
718 * @return A register class which can hold values of the given mode.
720 const arch_register_class_t *ppc32_get_reg_class_for_mode(const void *self, const ir_mode *mode) {
721 if (mode_is_float(mode))
722 return &ppc32_reg_classes[CLASS_ppc32_fp];
724 return &ppc32_reg_classes[CLASS_ppc32_gp];
729 * Get the ABI restrictions for procedure calls.
730 * @param self The this pointer.
731 * @param method_type The type of the method (procedure) in question.
732 * @param abi The abi object to be modified
734 static void ppc32_get_call_abi(const void *self, ir_type *method_type, be_abi_call_t *abi) {
737 int i, n = get_method_n_params(method_type);
738 int stackoffs = 0, lastoffs = 0, stackparamsize;
743 const arch_register_t *reg;
744 be_abi_call_flags_t call_flags = { { 0, 0, 1, 0, 0, 0, 1 } };
746 if(get_type_visibility(method_type)!=visibility_external_allocated)
747 call_flags.bits.call_has_imm = 1;
749 /* set stack parameter passing style */
750 be_abi_call_set_flags(abi, call_flags, &ppc32_abi_callbacks);
752 for (i = 0; i < n; i++) {
753 tp = get_method_param_type(method_type, i);
754 if(is_atomic_type(tp))
756 mode = get_type_mode(tp);
758 if(mode_is_float(mode))
760 if(fpregi <= REG_F13)
762 if(get_mode_size_bits(mode) == 32) gpregi++, stackparamsize=4;
763 else gpregi += 2, stackparamsize=8; // mode == irm_D
764 reg = &ppc32_fp_regs[fpregi++];
768 if(get_mode_size_bits(mode) == 32) stackparamsize=4;
769 else stackparamsize=8; // mode == irm_D
775 if(gpregi <= REG_R10)
776 reg = &ppc32_gp_regs[gpregi++];
783 be_abi_call_param_reg(abi, i, reg);
786 be_abi_call_param_stack(abi, i, 4, stackoffs-lastoffs, 0);
787 lastoffs = stackoffs+stackparamsize;
789 stackoffs += stackparamsize;
793 be_abi_call_param_stack(abi, i, 4, stackoffs-lastoffs, 0);
794 stackoffs += (get_type_size_bytes(tp)+3) & -4;
795 lastoffs = stackoffs;
799 /* explain where result can be found if any */
800 if (get_method_n_ress(method_type) > 0) {
801 tp = get_method_res_type(method_type, 0);
802 mode = get_type_mode(tp);
804 be_abi_call_res_reg(abi, 0,
805 mode_is_float(mode) ? &ppc32_fp_regs[REG_F1] : &ppc32_gp_regs[REG_R3]);
809 static const void *ppc32_get_irn_ops(const arch_irn_handler_t *self, const ir_node *irn) {
810 return &ppc32_irn_ops;
813 const arch_irn_handler_t ppc32_irn_handler = {
817 const arch_irn_handler_t *ppc32_get_irn_handler(const void *self) {
818 return &ppc32_irn_handler;
821 int ppc32_to_appear_in_schedule(void *block_env, const ir_node *irn) {
822 return is_ppc32_irn(irn);
826 * Initializes the code generator interface.
828 static const arch_code_generator_if_t *ppc32_get_code_generator_if(void *self) {
829 return &ppc32_code_gen_if;
832 list_sched_selector_t ppc32_sched_selector;
835 * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
837 static const list_sched_selector_t *ppc32_get_list_sched_selector(const void *self) {
838 memcpy(&ppc32_sched_selector, trivial_selector, sizeof(list_sched_selector_t));
839 ppc32_sched_selector.to_appear_in_schedule = ppc32_to_appear_in_schedule;
840 return &ppc32_sched_selector;
844 * Returns the necessary byte alignment for storing a register of given class.
846 static int ppc32_get_reg_class_alignment(const void *self, const arch_register_class_t *cls) {
847 ir_mode *mode = arch_register_class_mode(cls);
848 return get_mode_size_bytes(mode);
852 static void ppc32_register_options(lc_opt_entry_t *ent)
855 #endif /* WITH_LIBCORE */
857 const arch_isa_if_t ppc32_isa_if = {
860 ppc32_get_n_reg_class,
862 ppc32_get_reg_class_for_mode,
864 ppc32_get_irn_handler,
865 ppc32_get_code_generator_if,
866 ppc32_get_list_sched_selector,
867 ppc32_get_reg_class_alignment,
869 ppc32_register_options