2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The main ppc backend driver file.
23 * @author Moritz Kroll, Jens Mueller
28 #include "pseudo_irg.h"
40 #include "../bearch.h"
41 #include "../benode.h"
42 #include "../belower.h"
43 #include "../besched.h"
46 #include "../bemachine.h"
47 #include "../bemodule.h"
48 #include "../bespillslots.h"
49 #include "../beblocksched.h"
51 #include "../begnuas.h"
52 #include "../belistsched.h"
56 #include "bearch_ppc32_t.h"
58 #include "ppc32_new_nodes.h"
59 #include "gen_ppc32_regalloc_if.h"
60 #include "ppc32_transform.h"
61 #include "ppc32_transform_conv.h"
62 #include "ppc32_emitter.h"
63 #include "ppc32_map_regs.h"
65 #define DEBUG_MODULE "firm.be.ppc.isa"
69 /* TODO: ugly, but we need it to get access to the registers assigned to Phi nodes */
70 static set *cur_reg_set = NULL;
72 /**************************************************
75 * _ __ ___ __ _ __ _| | | ___ ___ _| |_
76 * | '__/ _ \/ _` | / _` | | |/ _ \ / __| | | _|
77 * | | | __/ (_| | | (_| | | | (_) | (__ | | |
78 * |_| \___|\__, | \__,_|_|_|\___/ \___| |_|_|
81 **************************************************/
83 static arch_irn_class_t ppc32_classify(const ir_node *irn)
89 static ir_entity *ppc32_get_frame_entity(const ir_node *irn)
91 if(!is_ppc32_irn(irn)) return NULL;
92 if(get_ppc32_type(irn)!=ppc32_ac_FrameEntity) return NULL;
93 return get_ppc32_frame_entity(irn);
96 static void ppc32_set_frame_entity(ir_node *irn, ir_entity *ent)
98 if (! is_ppc32_irn(irn) || get_ppc32_type(irn) != ppc32_ac_FrameEntity)
100 set_ppc32_frame_entity(irn, ent);
104 * This function is called by the generic backend to correct offsets for
105 * nodes accessing the stack.
107 static void ppc32_set_stack_bias(ir_node *irn, int bias)
109 set_ppc32_offset(irn, bias);
112 static int ppc32_get_sp_bias(const ir_node *irn)
120 const be_abi_call_t *call;
125 * Initialize the callback object.
126 * @param call The call object.
127 * @param aenv The architecture environment.
128 * @param irg The graph with the method.
129 * @return Some pointer. This pointer is passed to all other callback functions as self object.
131 static void *ppc32_abi_init(const be_abi_call_t *call, const arch_env_t *aenv, ir_graph *irg)
133 ppc32_abi_env *env = XMALLOC(ppc32_abi_env);
142 * Destroy the callback object.
143 * @param self The callback object.
145 static void ppc32_abi_done(void *self)
151 * Get the between type for that call.
152 * @param self The callback object.
153 * @return The between type of for that call.
155 static ir_type *ppc32_abi_get_between_type(void *self)
157 static ir_type *between_type = NULL;
158 static ir_entity *old_bp_ent = NULL;
162 ir_entity *ret_addr_ent;
163 ir_type *ret_addr_type = new_type_primitive(new_id_from_str("return_addr"), mode_P);
164 ir_type *old_bp_type = new_type_primitive(new_id_from_str("bp"), mode_P);
166 between_type = new_type_class(new_id_from_str("ppc32_between_type"));
167 old_bp_ent = new_entity(between_type, new_id_from_str("old_bp"), old_bp_type);
168 ret_addr_ent = new_entity(between_type, new_id_from_str("old_bp"), ret_addr_type);
170 set_entity_offset(old_bp_ent, 0);
171 set_entity_offset(ret_addr_ent, get_type_size_bytes(old_bp_type));
172 set_type_size_bytes(between_type, get_type_size_bytes(old_bp_type) + get_type_size_bytes(ret_addr_type));
179 * Generate the prologue.
180 * @param self The callback object.
181 * @param mem A pointer to the mem node. Update this if you define new memory.
182 * @param reg_map A mapping mapping all callee_save/ignore/parameter registers to their defining nodes.
183 * @param stack_bias Points to the current stack bias, can be modified if needed.
185 * @return The register which shall be used as a stack frame base.
187 * All nodes which define registers in @p reg_map must keep @p reg_map current.
189 static const arch_register_t *ppc32_abi_prologue(void *self, ir_node **mem, pmap *reg_map, int *stack_bias)
191 ppc32_abi_env *env = (ppc32_abi_env *) self;
192 be_abi_call_flags_t flags = be_abi_call_get_flags(env->call);
196 isleaf = flags.bits.irg_is_leaf;
198 if (flags.bits.try_omit_fp)
199 return &ppc32_gp_regs[REG_R1];
201 return &ppc32_gp_regs[REG_R31];
205 * Generate the epilogue.
206 * @param self The callback object.
207 * @param mem Memory one can attach to.
208 * @param reg_map A mapping mapping all callee_save/ignore/return registers to their defining nodes.
210 * All nodes which define registers in @p reg_map must keep @p reg_map current.
211 * Also, the @p mem variable must be updated, if memory producing nodes are inserted.
213 static void ppc32_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_map)
221 static const be_abi_callbacks_t ppc32_abi_callbacks = {
224 ppc32_abi_get_between_type,
229 /* fill register allocator interface */
231 static const arch_irn_ops_t ppc32_irn_ops = {
234 ppc32_get_frame_entity,
235 ppc32_set_frame_entity,
236 ppc32_set_stack_bias,
238 NULL, /* get_inverse */
239 NULL, /* get_op_estimated_cost */
240 NULL, /* possible_memory_operand */
241 NULL, /* perform_memory_operand */
244 /**************************************************
247 * ___ ___ __| | ___ __ _ ___ _ __ _| |_
248 * / __/ _ \ / _` |/ _ \/ _` |/ _ \ '_ \ | | _|
249 * | (_| (_) | (_| | __/ (_| | __/ | | | | | |
250 * \___\___/ \__,_|\___|\__, |\___|_| |_| |_|_|
253 **************************************************/
255 static void ppc32_before_abi(void *self) {
256 ppc32_code_gen_t *cg = self;
257 ir_type *frame_type = get_irg_frame_type(cg->irg);
259 frame_alloc_area(frame_type, 24, 4, 1);
261 ppc32_init_conv_walk();
262 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_conv_walk, cg);
265 if(cg->area_size < 32) cg->area_size = 32;
266 cg->area = frame_alloc_area(get_irg_frame_type(cg->irg), cg->area_size+24, 16, 1);
270 static void ppc32_search_start_successor(ir_node *block, void *env) {
271 ppc32_code_gen_t *cg = env;
272 int n = get_Block_n_cfgpreds(block);
273 ir_node *startblock = get_irg_start_block(cg->irg);
274 if(block == startblock) return;
276 for (n--; n >= 0; n--) {
277 ir_node *predblock = get_irn_n(get_Block_cfgpred(block, n), -1);
278 if(predblock == startblock)
280 cg->start_succ_block = block;
287 * Transforms the standard firm graph into
290 static void ppc32_prepare_graph(void *self) {
291 ppc32_code_gen_t *cg = self;
293 irg_block_walk_graph(cg->irg, NULL, ppc32_search_start_successor, cg);
294 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_pretransform_walk, cg);
295 be_dump(cg->irg, "-pretransformed", dump_ir_block_graph);
297 ppc32_register_transformers();
298 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_transform_node, cg);
299 be_dump(cg->irg, "-transformed", dump_ir_block_graph);
300 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_transform_const, cg);
306 * Called immediatly before emit phase.
308 static void ppc32_finish_irg(void *self) {
310 /* TODO: - fix offsets for nodes accessing stack
317 * Called before the register allocator.
318 * Calculate a block schedule here. We need it for the x87
319 * simulator and the emitter.
321 static void ppc32_before_ra(void *self) {
322 ppc32_code_gen_t *cg = self;
323 cg->blk_sched = be_create_block_schedule(cg->irg, cg->birg->exec_freq);
326 static void ppc32_transform_spill(ir_node *node, void *env)
330 if(be_is_Spill(node))
332 ir_node *store, *proj;
333 dbg_info *dbg = get_irn_dbg_info(node);
334 ir_node *block = get_nodes_block(node);
336 const arch_register_class_t *regclass = arch_get_irn_reg_class(node, 1);
338 if (regclass == &ppc32_reg_classes[CLASS_ppc32_gp])
340 store = new_bd_ppc32_Stw(dbg, block,
341 get_irn_n(node, 0), get_irn_n(node, 1), new_NoMem());
343 else if (regclass == &ppc32_reg_classes[CLASS_ppc32_fp])
345 store = new_bd_ppc32_Stfd(dbg, block,
346 get_irn_n(node, 0), get_irn_n(node, 1), new_NoMem());
348 else panic("Spill for register class not supported yet!");
350 set_ppc32_frame_entity(store, be_get_frame_entity(node));
352 proj = new_rd_Proj(dbg, block, store, mode_M, pn_Store_M);
354 if (sched_is_scheduled(node)) {
355 sched_add_after(sched_prev(node), store);
356 sched_add_after(store, proj);
361 exchange(node, proj);
364 if(be_is_Reload(node))
366 ir_node *load, *proj;
367 const arch_register_t *reg;
368 dbg_info *dbg = get_irn_dbg_info(node);
369 ir_node *block = get_nodes_block(node);
370 ir_mode *mode = get_irn_mode(node);
372 const arch_register_class_t *regclass = arch_get_irn_reg_class_out(node);
374 if (regclass == &ppc32_reg_classes[CLASS_ppc32_gp])
376 load = new_bd_ppc32_Lwz(dbg, block, get_irn_n(node, 0), get_irn_n(node, 1));
378 else if (regclass == &ppc32_reg_classes[CLASS_ppc32_fp])
380 load = new_bd_ppc32_Lfd(dbg, block, get_irn_n(node, 0), get_irn_n(node, 1));
382 else panic("Reload for register class not supported yet!");
384 set_ppc32_frame_entity(load, be_get_frame_entity(node));
386 proj = new_rd_Proj(dbg, block, load, mode, pn_Load_res);
388 if (sched_is_scheduled(node)) {
389 sched_add_after(sched_prev(node), load);
390 sched_add_after(load, proj);
395 /* copy the register from the old node to the new Load */
396 reg = arch_get_irn_register(node);
397 arch_set_irn_register(load, reg);
399 exchange(node, proj);
404 * Some stuff to do immediately after register allocation
406 static void ppc32_after_ra(void *self) {
407 ppc32_code_gen_t *cg = self;
408 be_coalesce_spillslots(cg->birg);
409 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_transform_spill, NULL);
413 * Emits the code, closes the output file and frees
414 * the code generator interface.
416 static void ppc32_emit_and_done(void *self) {
417 ppc32_code_gen_t *cg = self;
418 ir_graph *irg = cg->irg;
420 dump_ir_block_graph_sched(irg, "-ppc-finished");
421 ppc32_gen_routine(cg, irg);
425 /* de-allocate code generator */
426 del_set(cg->reg_set);
430 int is_direct_entity(ir_entity *ent);
432 static void *ppc32_cg_init(be_irg_t *birg);
434 static const arch_code_generator_if_t ppc32_code_gen_if = {
436 NULL, /* get_pic_base */
440 ppc32_before_ra, /* before register allocation hook */
447 * Initializes the code generator.
449 static void *ppc32_cg_init(be_irg_t *birg) {
450 ppc32_isa_t *isa = (ppc32_isa_t *)birg->main_env->arch_env;
451 ppc32_code_gen_t *cg = XMALLOC(ppc32_code_gen_t);
453 cg->impl = &ppc32_code_gen_if;
455 cg->reg_set = new_set(ppc32_cmp_irn_reg_assoc, 1024);
460 cg->start_succ_block = NULL;
461 cg->blk_sched = NULL;
462 FIRM_DBG_REGISTER(cg->mod, "firm.be.ppc.cg");
464 cur_reg_set = cg->reg_set;
466 return (arch_code_generator_t *)cg;
471 /*****************************************************************
472 * ____ _ _ _____ _____
473 * | _ \ | | | | |_ _|/ ____| /\
474 * | |_) | __ _ ___| | _____ _ __ __| | | | | (___ / \
475 * | _ < / _` |/ __| |/ / _ \ '_ \ / _` | | | \___ \ / /\ \
476 * | |_) | (_| | (__| < __/ | | | (_| | _| |_ ____) / ____ \
477 * |____/ \__,_|\___|_|\_\___|_| |_|\__,_| |_____|_____/_/ \_\
479 *****************************************************************/
481 static ppc32_isa_t ppc32_isa_template = {
483 &ppc32_isa_if, /* isa interface */
484 &ppc32_gp_regs[REG_R1], /* stack pointer */
485 &ppc32_gp_regs[REG_R31], /* base pointer */
486 &ppc32_reg_classes[CLASS_ppc32_gp], /* static link pointer class */
487 -1, /* stack is decreasing */
488 2, /* power of two stack alignment for calls, 2^2 == 4 */
489 NULL, /* main environment */
491 5, /* reload costs */
493 NULL /* symbol set */
497 * Collects all SymConsts which need to be accessed "indirectly"
499 * @param node the firm node
500 * @param env the symbol set
502 static void ppc32_collect_symconsts_walk(ir_node *node, void *env) {
503 pset *symbol_set = env;
505 if (is_SymConst(node)) {
506 ir_entity *ent = get_SymConst_entity(node);
507 set_entity_backend_marked(ent, 1);
508 if (! is_direct_entity(ent))
509 pset_insert_ptr(symbol_set, ent);
514 * Initializes the backend ISA and opens the output file.
516 static arch_env_t *ppc32_init(FILE *file_handle) {
517 static int inited = 0;
524 isa = XMALLOC(ppc32_isa_t);
525 memcpy(isa, &ppc32_isa_template, sizeof(*isa));
527 be_emit_init(file_handle);
529 ppc32_register_init();
530 ppc32_create_opcodes(&ppc32_irn_ops);
534 isa->symbol_set = pset_new_ptr(8);
535 for (i = 0; i < get_irp_n_irgs(); ++i) {
536 ir_graph *irg = get_irp_irg(i);
537 irg_walk_blkwise_graph(irg, NULL, ppc32_collect_symconsts_walk, isa->symbol_set);
540 /* we mark referenced global entities, so we can only emit those which
541 * are actually referenced. (Note: you mustn't use the type visited flag
542 * elsewhere in the backend)
544 inc_master_type_visited();
546 return &isa->arch_env;
549 static void ppc32_dump_indirect_symbols(ppc32_isa_t *isa) {
552 foreach_pset(isa->symbol_set, ent) {
553 const char *ld_name = get_entity_ld_name(ent);
554 be_emit_irprintf(".non_lazy_symbol_pointer\n%s:\n\t.indirect_symbol _%s\n\t.long 0\n\n", ld_name, ld_name);
555 be_emit_write_line();
560 * Closes the output file and frees the ISA structure.
562 static void ppc32_done(void *self) {
563 ppc32_isa_t *isa = self;
565 be_gas_emit_decls(isa->arch_env.main_env, 1);
566 be_gas_emit_switch_section(GAS_SECTION_DATA);
567 ppc32_dump_indirect_symbols(isa);
570 del_pset(isa->symbol_set);
577 static unsigned ppc32_get_n_reg_class(void)
582 static const arch_register_class_t *ppc32_get_reg_class(unsigned i)
584 assert(i < N_CLASSES && "Invalid ppc register class requested.");
585 return &ppc32_reg_classes[i];
591 * Get the register class which shall be used to store a value of a given mode.
592 * @param self The this pointer.
593 * @param mode The mode in question.
594 * @return A register class which can hold values of the given mode.
596 const arch_register_class_t *ppc32_get_reg_class_for_mode(const ir_mode *mode)
598 if (mode_is_float(mode))
599 return &ppc32_reg_classes[CLASS_ppc32_fp];
601 return &ppc32_reg_classes[CLASS_ppc32_gp];
606 * Get the ABI restrictions for procedure calls.
607 * @param self The this pointer.
608 * @param method_type The type of the method (procedure) in question.
609 * @param abi The abi object to be modified
611 static void ppc32_get_call_abi(const void *self, ir_type *method_type, be_abi_call_t *abi) {
614 int i, n = get_method_n_params(method_type);
615 int stackoffs = 0, lastoffs = 0, stackparamsize;
620 const arch_register_t *reg;
621 be_abi_call_flags_t call_flags = { { 0, 0, 1, 0, 0, 0, 1 } };
624 if(get_type_visibility(method_type)!=visibility_external_allocated)
625 call_flags.bits.call_has_imm = 1;
627 /* set stack parameter passing style */
628 be_abi_call_set_flags(abi, call_flags, &ppc32_abi_callbacks);
630 for (i = 0; i < n; i++) {
631 tp = get_method_param_type(method_type, i);
632 mode = get_type_mode(tp);
633 if(is_atomic_type(tp))
635 if(mode_is_float(mode))
637 if(fpregi <= REG_F13)
639 if(get_mode_size_bits(mode) == 32) gpregi++, stackparamsize=4;
640 else gpregi += 2, stackparamsize=8; // mode == irm_D
641 reg = &ppc32_fp_regs[fpregi++];
645 if(get_mode_size_bits(mode) == 32) stackparamsize=4;
646 else stackparamsize=8; // mode == irm_D
652 if(gpregi <= REG_R10)
653 reg = &ppc32_gp_regs[gpregi++];
660 be_abi_call_param_reg(abi, i, reg);
663 be_abi_call_param_stack(abi, i, mode, 4, stackoffs - lastoffs, 0);
664 lastoffs = stackoffs+stackparamsize;
666 stackoffs += stackparamsize;
670 be_abi_call_param_stack(abi, i, mode, 4, stackoffs - lastoffs, 0);
671 stackoffs += (get_type_size_bytes(tp)+3) & -4;
672 lastoffs = stackoffs;
676 /* explain where result can be found if any */
677 if (get_method_n_ress(method_type) > 0) {
678 tp = get_method_res_type(method_type, 0);
679 mode = get_type_mode(tp);
681 be_abi_call_res_reg(abi, 0,
682 mode_is_float(mode) ? &ppc32_fp_regs[REG_F1] : &ppc32_gp_regs[REG_R3]);
686 int ppc32_to_appear_in_schedule(void *block_env, const ir_node *irn) {
688 if(!is_ppc32_irn(irn))
695 * Initializes the code generator interface.
697 static const arch_code_generator_if_t *ppc32_get_code_generator_if(void *self) {
699 return &ppc32_code_gen_if;
702 list_sched_selector_t ppc32_sched_selector;
705 * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
707 static const list_sched_selector_t *ppc32_get_list_sched_selector(const void *self, list_sched_selector_t *selector) {
710 ppc32_sched_selector = trivial_selector;
711 ppc32_sched_selector.to_appear_in_schedule = ppc32_to_appear_in_schedule;
712 return &ppc32_sched_selector;
715 static const ilp_sched_selector_t *ppc32_get_ilp_sched_selector(const void *self) {
721 * Returns the necessary byte alignment for storing a register of given class.
723 static int ppc32_get_reg_class_alignment(const arch_register_class_t *cls)
725 ir_mode *mode = arch_register_class_mode(cls);
726 return get_mode_size_bytes(mode);
729 static const be_execution_unit_t ***ppc32_get_allowed_execution_units(const ir_node *irn) {
732 panic("Unimplemented ppc32_get_allowed_execution_units()");
736 static const be_machine_t *ppc32_get_machine(const void *self) {
739 panic("Unimplemented ppc32_get_machine()");
744 * Return irp irgs in the desired order.
746 static ir_graph **ppc32_get_irg_list(const void *self, ir_graph ***irg_list) {
753 * Returns the libFirm configuration parameter for this backend.
755 static const backend_params *ppc32_get_libfirm_params(void) {
756 static backend_params p = {
757 1, /* need dword lowering */
758 0, /* don't support inline assembler yet */
759 NULL, /* will be set later */
760 NULL, /* but yet no creator function */
761 NULL, /* context for create_intrinsic_fkt */
762 NULL, /* no if conversion settings */
763 NULL, /* no float arithmetic mode (TODO) */
764 0, /* no trampoline support: size 0 */
765 0, /* no trampoline support: align 0 */
766 NULL, /* no trampoline support: no trampoline builder */
767 4 /* alignment of stack parameter */
773 static asm_constraint_flags_t ppc32_parse_asm_constraint(const char **c)
775 /* no asm support yet */
777 return ASM_CONSTRAINT_FLAG_INVALID;
780 static int ppc32_is_valid_clobber(const char *clobber)
782 /* no asm support yet */
787 const arch_isa_if_t ppc32_isa_if = {
790 NULL, /* handle intrinsics */
791 ppc32_get_n_reg_class,
793 ppc32_get_reg_class_for_mode,
795 ppc32_get_code_generator_if,
796 ppc32_get_list_sched_selector,
797 ppc32_get_ilp_sched_selector,
798 ppc32_get_reg_class_alignment,
799 ppc32_get_libfirm_params,
800 ppc32_get_allowed_execution_units,
803 NULL, /* mark remat */
804 ppc32_parse_asm_constraint,
805 ppc32_is_valid_clobber
808 void be_init_arch_ppc32(void)
810 be_register_isa_if("ppc32", &ppc32_isa_if);
813 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_ppc32);