1 /* The main ppc backend driver file. */
7 #include "pseudo_irg.h"
18 #include "../bearch.h" /* the general register allocator interface */
19 #include "../benode_t.h"
20 #include "../belower.h"
21 #include "../besched_t.h"
24 #include "../bemachine.h"
25 #include "../bemodule.h"
26 #include "../beblocksched.h"
30 #include "bearch_ppc32_t.h"
32 #include "ppc32_new_nodes.h" /* ppc nodes interface */
33 #include "gen_ppc32_regalloc_if.h" /* the generated interface (register type and class defenitions) */
34 #include "ppc32_gen_decls.h" /* interface declaration emitter */
35 #include "ppc32_transform.h"
36 #include "ppc32_transform_conv.h"
37 #include "ppc32_emitter.h"
38 #include "ppc32_map_regs.h"
40 #define DEBUG_MODULE "firm.be.ppc.isa"
43 pset *symbol_pset = NULL;
45 /* TODO: ugly, but we need it to get access to the registers assigned to Phi nodes */
46 static set *cur_reg_set = NULL;
48 /**************************************************
51 * _ __ ___ __ _ __ _| | | ___ ___ _| |_
52 * | '__/ _ \/ _` | / _` | | |/ _ \ / __| | | _|
53 * | | | __/ (_| | | (_| | | | (_) | (__ | | |
54 * |_| \___|\__, | \__,_|_|_|\___/ \___| |_|_|
57 **************************************************/
60 * Return register requirements for a ppc node.
61 * If the node returns a tuple (mode_T) then the proj's
62 * will be asked for this information.
65 arch_register_req_t *ppc32_get_irn_reg_req(const void *self,
66 const ir_node *irn, int pos) {
67 long node_pos = pos == -1 ? 0 : pos;
68 ir_mode *mode = get_irn_mode(irn);
69 FIRM_DBG_REGISTER(firm_dbg_module_t *mod, DEBUG_MODULE);
71 if (is_Block(irn) || mode == mode_X || mode == mode_M) {
72 DBG((mod, LEVEL_1, "ignoring block, mode_X or mode_M node %+F\n", irn));
73 return arch_no_register_req;
76 if (mode == mode_T && pos < 0) {
77 DBG((mod, LEVEL_1, "ignoring request for OUT requirements at %+F", irn));
78 return arch_no_register_req;
81 DBG((mod, LEVEL_1, "get requirements at pos %d for %+F ... ", pos, irn));
84 /* in case of a proj, we need to get the correct OUT slot */
85 /* of the node corresponding to the proj number */
87 node_pos = ppc32_translate_proj_pos(irn);
92 irn = skip_Proj_const(irn);
94 DB((mod, LEVEL_1, "skipping Proj, going to %+F at pos %d ... ", irn, node_pos));
97 /* get requirements for our own nodes */
98 if (is_ppc32_irn(irn)) {
99 const arch_register_req_t *req;
101 req = get_ppc32_in_req(irn, pos);
103 req = get_ppc32_out_req(irn, node_pos);
106 DB((mod, LEVEL_1, "returning reqs for %+F at pos %d\n", irn, pos));
110 /* unknowns should be transformed by now */
111 assert(!is_Unknown(irn));
113 DB((mod, LEVEL_1, "returning NULL for %+F (node not supported)\n", irn));
114 return arch_no_register_req;
117 static void ppc32_set_irn_reg(const void *self, ir_node *irn, const arch_register_t *reg) {
122 if (get_irn_mode(irn) == mode_X) {
126 pos = ppc32_translate_proj_pos(irn);
127 irn = skip_Proj(irn);
130 if (is_ppc32_irn(irn)) {
131 const arch_register_t **slots;
133 slots = get_ppc32_slots(irn);
137 /* here we set the registers for the Phi nodes */
138 ppc32_set_firm_reg(irn, reg, cur_reg_set);
142 static const arch_register_t *ppc32_get_irn_reg(const void *self, const ir_node *irn) {
144 const arch_register_t *reg = NULL;
148 if (get_irn_mode(irn) == mode_X) {
152 pos = ppc32_translate_proj_pos(irn);
153 irn = skip_Proj_const(irn);
156 if (is_ppc32_irn(irn)) {
157 const arch_register_t **slots;
158 slots = get_ppc32_slots(irn);
162 reg = ppc32_get_firm_reg(irn, cur_reg_set);
168 static arch_irn_class_t ppc32_classify(const void *self, const ir_node *irn) {
169 irn = skip_Proj_const(irn);
172 return arch_irn_class_branch;
174 else if (is_ppc32_irn(irn)) {
175 return arch_irn_class_normal;
181 static arch_irn_flags_t ppc32_get_flags(const void *self, const ir_node *irn) {
182 irn = skip_Proj_const(irn);
184 if (is_ppc32_irn(irn)) {
185 return get_ppc32_flags(irn);
187 else if (is_Unknown(irn)) {
188 return arch_irn_flags_ignore;
194 static ir_entity *ppc32_get_frame_entity(const void *self, const ir_node *irn) {
195 if(!is_ppc32_irn(irn)) return NULL;
196 if(get_ppc32_type(irn)!=ppc32_ac_FrameEntity) return NULL;
197 return get_ppc32_frame_entity(irn);
200 static void ppc32_set_frame_entity(const void *self, ir_node *irn, ir_entity *ent) {
201 if (! is_ppc32_irn(irn) || get_ppc32_type(irn) != ppc32_ac_FrameEntity)
203 set_ppc32_frame_entity(irn, ent);
207 * This function is called by the generic backend to correct offsets for
208 * nodes accessing the stack.
210 static void ppc32_set_stack_bias(const void *self, ir_node *irn, int bias) {
211 set_ppc32_offset(irn, bias);
214 static int ppc32_get_sp_bias(const void *self, const ir_node *irn) {
220 const be_abi_call_t *call;
225 * Initialize the callback object.
226 * @param call The call object.
227 * @param aenv The architecture environment.
228 * @param irg The graph with the method.
229 * @return Some pointer. This pointer is passed to all other callback functions as self object.
231 static void *ppc32_abi_init(const be_abi_call_t *call, const arch_env_t *aenv, ir_graph *irg)
233 ppc32_abi_env *env = xmalloc(sizeof(ppc32_abi_env));
240 * Destroy the callback object.
241 * @param self The callback object.
243 static void ppc32_abi_done(void *self)
249 * Get the between type for that call.
250 * @param self The callback object.
251 * @return The between type of for that call.
253 static ir_type *ppc32_abi_get_between_type(void *self)
255 static ir_type *between_type = NULL;
256 static ir_entity *old_bp_ent = NULL;
259 ir_entity *ret_addr_ent;
260 ir_type *ret_addr_type = new_type_primitive(new_id_from_str("return_addr"), mode_P);
261 ir_type *old_bp_type = new_type_primitive(new_id_from_str("bp"), mode_P);
263 between_type = new_type_class(new_id_from_str("ppc32_between_type"));
264 old_bp_ent = new_entity(between_type, new_id_from_str("old_bp"), old_bp_type);
265 ret_addr_ent = new_entity(between_type, new_id_from_str("old_bp"), ret_addr_type);
267 set_entity_offset(old_bp_ent, 0);
268 set_entity_offset(ret_addr_ent, get_type_size_bytes(old_bp_type));
269 set_type_size_bytes(between_type, get_type_size_bytes(old_bp_type) + get_type_size_bytes(ret_addr_type));
276 * Put all registers which are saved by the prologue/epilogue in a set.
277 * @param self The callback object.
280 static void ppc32_abi_regs_saved_by_me(void *self, pset *regs)
285 * Generate the prologue.
286 * @param self The callback object.
287 * @param mem A pointer to the mem node. Update this if you define new memory.
288 * @param reg_map A mapping mapping all callee_save/ignore/parameter registers to their defining nodes.
289 * @return The register which shall be used as a stack frame base.
291 * All nodes which define registers in @p reg_map must keep @p reg_map current.
293 static const arch_register_t *ppc32_abi_prologue(void *self, ir_node **mem, pmap *reg_map)
295 ppc32_abi_env *env = (ppc32_abi_env *) self;
296 be_abi_call_flags_t flags = be_abi_call_get_flags(env->call);
297 isleaf = flags.bits.irg_is_leaf;
299 if(flags.bits.try_omit_fp)
300 return &ppc32_gp_regs[REG_R1];
302 return &ppc32_gp_regs[REG_R31];
306 * Generate the epilogue.
307 * @param self The callback object.
308 * @param mem Memory one can attach to.
309 * @param reg_map A mapping mapping all callee_save/ignore/return registers to their defining nodes.
311 * All nodes which define registers in @p reg_map must keep @p reg_map current.
312 * Also, the @p mem variable must be updated, if memory producing nodes are inserted.
314 static void ppc32_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_map)
318 static const be_abi_callbacks_t ppc32_abi_callbacks = {
321 ppc32_abi_get_between_type,
322 ppc32_abi_regs_saved_by_me,
327 /* fill register allocator interface */
329 static const arch_irn_ops_if_t ppc32_irn_ops_if = {
330 ppc32_get_irn_reg_req,
335 ppc32_get_frame_entity,
336 ppc32_set_frame_entity,
337 ppc32_set_stack_bias,
339 NULL, /* get_inverse */
340 NULL, /* get_op_estimated_cost */
341 NULL, /* possible_memory_operand */
342 NULL, /* perform_memory_operand */
345 ppc32_irn_ops_t ppc32_irn_ops = {
352 /**************************************************
355 * ___ ___ __| | ___ __ _ ___ _ __ _| |_
356 * / __/ _ \ / _` |/ _ \/ _` |/ _ \ '_ \ | | _|
357 * | (_| (_) | (_| | __/ (_| | __/ | | | | | |
358 * \___\___/ \__,_|\___|\__, |\___|_| |_| |_|_|
361 **************************************************/
363 static void ppc32_before_abi(void *self) {
364 ppc32_code_gen_t *cg = self;
365 ir_type *frame_type = get_irg_frame_type(cg->irg);
367 frame_alloc_area(frame_type, 24, 4, 1);
369 ppc32_init_conv_walk();
370 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_conv_walk, cg);
373 if(cg->area_size < 32) cg->area_size = 32;
374 cg->area = frame_alloc_area(get_irg_frame_type(cg->irg), cg->area_size+24, 16, 1);
378 static void ppc32_search_start_successor(ir_node *block, void *env) {
379 ppc32_code_gen_t *cg = env;
380 int n = get_Block_n_cfgpreds(block);
381 ir_node *startblock = get_irg_start_block(cg->irg);
382 if(block == startblock) return;
384 for (n--; n >= 0; n--) {
385 ir_node *predblock = get_irn_n(get_Block_cfgpred(block, n), -1);
386 if(predblock == startblock)
388 cg->start_succ_block = block;
395 * Transforms the standard firm graph into
398 static void ppc32_prepare_graph(void *self) {
399 ppc32_code_gen_t *cg = self;
401 irg_block_walk_graph(cg->irg, NULL, ppc32_search_start_successor, cg);
402 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_pretransform_walk, cg);
403 be_dump(cg->irg, "-pretransformed", dump_ir_block_graph);
405 ppc32_register_transformers();
406 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_transform_node, cg);
407 be_dump(cg->irg, "-transformed", dump_ir_block_graph);
408 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_transform_const, cg);
414 * Called immediatly before emit phase.
416 static void ppc32_finish_irg(void *self) {
417 /* TODO: - fix offsets for nodes accessing stack
424 * These are some hooks which must be filled but are probably not needed.
426 static void ppc32_before_sched(void *self) {
427 /* Some stuff you need to do after scheduling but before register allocation */
431 * Called before the register allocator.
432 * Calculate a block schedule here. We need it for the x87
433 * simulator and the emitter.
435 static void ppc32_before_ra(void *self) {
436 ppc32_code_gen_t *cg = self;
437 cg->blk_sched = be_create_block_schedule(cg->irg, cg->birg->exec_freq);
440 static void ppc32_transform_spill(ir_node *node, void *env)
442 ppc32_code_gen_t *cgenv = (ppc32_code_gen_t *)env;
444 if(be_is_Spill(node))
446 ir_node *store, *proj;
447 dbg_info *dbg = get_irn_dbg_info(node);
448 ir_node *block = get_nodes_block(node);
450 const arch_register_class_t *regclass = arch_get_irn_reg_class(cgenv->arch_env, node, 1);
452 if (regclass == &ppc32_reg_classes[CLASS_ppc32_gp])
454 store = new_rd_ppc32_Stw(dbg, current_ir_graph, block,
455 get_irn_n(node, 0), get_irn_n(node, 1), new_rd_NoMem(current_ir_graph));
457 else if (regclass == &ppc32_reg_classes[CLASS_ppc32_fp])
459 store = new_rd_ppc32_Stfd(dbg, current_ir_graph, block,
460 get_irn_n(node, 0), get_irn_n(node, 1), new_rd_NoMem(current_ir_graph));
462 else assert(0 && "Spill for register class not supported yet!");
464 set_ppc32_frame_entity(store, be_get_frame_entity(node));
466 proj = new_rd_Proj(dbg, current_ir_graph, block, store, mode_M, pn_Store_M);
468 if (sched_is_scheduled(node)) {
469 sched_add_after(sched_prev(node), store);
470 sched_add_after(store, proj);
475 exchange(node, proj);
478 if(be_is_Reload(node))
480 ir_node *load, *proj;
481 const arch_register_t *reg;
482 dbg_info *dbg = get_irn_dbg_info(node);
483 ir_node *block = get_nodes_block(node);
484 ir_mode *mode = get_irn_mode(node);
486 const arch_register_class_t *regclass = arch_get_irn_reg_class(cgenv->arch_env, node, -1);
488 if (regclass == &ppc32_reg_classes[CLASS_ppc32_gp])
490 load = new_rd_ppc32_Lwz(dbg, current_ir_graph, block, get_irn_n(node, 0), get_irn_n(node, 1));
492 else if (regclass == &ppc32_reg_classes[CLASS_ppc32_fp])
494 load = new_rd_ppc32_Lfd(dbg, current_ir_graph, block, get_irn_n(node, 0), get_irn_n(node, 1));
496 else assert(0 && "Reload for register class not supported yet!");
498 set_ppc32_frame_entity(load, be_get_frame_entity(node));
500 proj = new_rd_Proj(dbg, current_ir_graph, block, load, mode, pn_Load_res);
502 if (sched_is_scheduled(node)) {
503 sched_add_after(sched_prev(node), load);
504 sched_add_after(load, proj);
509 /* copy the register from the old node to the new Load */
510 reg = arch_get_irn_register(cgenv->arch_env, node);
511 arch_set_irn_register(cgenv->arch_env, load, reg);
513 exchange(node, proj);
518 * Some stuff to do immediately after register allocation
520 static void ppc32_after_ra(void *self) {
521 ppc32_code_gen_t *cg = self;
522 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_transform_spill, cg);
526 * Emits the code, closes the output file and frees
527 * the code generator interface.
529 static void ppc32_emit_and_done(void *self) {
530 ppc32_code_gen_t *cg = self;
531 ir_graph *irg = cg->irg;
532 FILE *out = cg->isa->out;
534 if (cg->emit_decls) {
535 ppc32_gen_decls(out);
539 dump_ir_block_graph_sched(irg, "-ppc-finished");
540 ppc32_gen_routine(out, irg, cg);
544 /* de-allocate code generator */
545 del_set(cg->reg_set);
550 del_pset(symbol_pset);
555 int is_direct_entity(ir_entity *ent);
558 * Collects all SymConsts which need to be accessed "indirectly"
560 * @param node the firm node
561 * @param env the debug module
563 void ppc32_collect_symconsts_walk(ir_node *node, void *env) {
564 if(get_irn_op(node) == op_SymConst)
566 ir_entity *ent = get_SymConst_entity(node);
567 if(!is_direct_entity(ent))
568 pset_insert_ptr(symbol_pset, ent);
572 static void *ppc32_cg_init(be_irg_t *birg);
574 static const arch_code_generator_if_t ppc32_code_gen_if = {
579 ppc32_before_sched, /* before scheduling hook */
580 ppc32_before_ra, /* before register allocation hook */
587 * Initializes the code generator.
589 static void *ppc32_cg_init(be_irg_t *birg) {
590 ppc32_isa_t *isa = (ppc32_isa_t *)birg->main_env->arch_env->isa;
591 ppc32_code_gen_t *cg = xmalloc(sizeof(*cg));
593 cg->impl = &ppc32_code_gen_if;
595 cg->reg_set = new_set(ppc32_cmp_irn_reg_assoc, 1024);
596 cg->arch_env = birg->main_env->arch_env;
601 cg->start_succ_block = NULL;
602 cg->blk_sched = NULL;
603 FIRM_DBG_REGISTER(cg->mod, "firm.be.ppc.cg");
607 if (isa->num_codegens > 1)
613 symbol_pset = pset_new_ptr(8);
614 for(i=0; i<get_irp_n_irgs(); i++)
616 cg->irg = get_irp_irg(i);
617 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_collect_symconsts_walk, cg);
622 cur_reg_set = cg->reg_set;
624 ppc32_irn_ops.cg = cg;
626 return (arch_code_generator_t *)cg;
631 /*****************************************************************
632 * ____ _ _ _____ _____
633 * | _ \ | | | | |_ _|/ ____| /\
634 * | |_) | __ _ ___| | _____ _ __ __| | | | | (___ / \
635 * | _ < / _` |/ __| |/ / _ \ '_ \ / _` | | | \___ \ / /\ \
636 * | |_) | (_| | (__| < __/ | | | (_| | _| |_ ____) / ____ \
637 * |____/ \__,_|\___|_|\_\___|_| |_|\__,_| |_____|_____/_/ \_\
639 *****************************************************************/
641 static ppc32_isa_t ppc32_isa_template = {
643 &ppc32_gp_regs[REG_R1], // stack pointer
644 &ppc32_gp_regs[REG_R31], // base pointer
645 -1, // stack is decreasing
646 0, // num codegens... ??
651 * Initializes the backend ISA and opens the output file.
653 static void *ppc32_init(FILE *file_handle) {
654 static int inited = 0;
660 isa = xmalloc(sizeof(*isa));
661 memcpy(isa, &ppc32_isa_template, sizeof(*isa));
663 isa->out = file_handle;
665 ppc32_register_init(isa);
666 ppc32_create_opcodes();
676 * Closes the output file and frees the ISA structure.
678 static void ppc32_done(void *self) {
684 static int ppc32_get_n_reg_class(const void *self) {
688 static const arch_register_class_t *ppc32_get_reg_class(const void *self, int i) {
689 assert(i >= 0 && i < N_CLASSES && "Invalid ppc register class requested.");
690 return &ppc32_reg_classes[i];
696 * Get the register class which shall be used to store a value of a given mode.
697 * @param self The this pointer.
698 * @param mode The mode in question.
699 * @return A register class which can hold values of the given mode.
701 const arch_register_class_t *ppc32_get_reg_class_for_mode(const void *self, const ir_mode *mode) {
702 if (mode_is_float(mode))
703 return &ppc32_reg_classes[CLASS_ppc32_fp];
705 return &ppc32_reg_classes[CLASS_ppc32_gp];
710 * Get the ABI restrictions for procedure calls.
711 * @param self The this pointer.
712 * @param method_type The type of the method (procedure) in question.
713 * @param abi The abi object to be modified
715 static void ppc32_get_call_abi(const void *self, ir_type *method_type, be_abi_call_t *abi) {
718 int i, n = get_method_n_params(method_type);
719 int stackoffs = 0, lastoffs = 0, stackparamsize;
724 const arch_register_t *reg;
725 be_abi_call_flags_t call_flags = { { 0, 0, 1, 0, 0, 0, 1 } };
727 if(get_type_visibility(method_type)!=visibility_external_allocated)
728 call_flags.bits.call_has_imm = 1;
730 /* set stack parameter passing style */
731 be_abi_call_set_flags(abi, call_flags, &ppc32_abi_callbacks);
733 for (i = 0; i < n; i++) {
734 tp = get_method_param_type(method_type, i);
735 if(is_atomic_type(tp))
737 mode = get_type_mode(tp);
739 if(mode_is_float(mode))
741 if(fpregi <= REG_F13)
743 if(get_mode_size_bits(mode) == 32) gpregi++, stackparamsize=4;
744 else gpregi += 2, stackparamsize=8; // mode == irm_D
745 reg = &ppc32_fp_regs[fpregi++];
749 if(get_mode_size_bits(mode) == 32) stackparamsize=4;
750 else stackparamsize=8; // mode == irm_D
756 if(gpregi <= REG_R10)
757 reg = &ppc32_gp_regs[gpregi++];
764 be_abi_call_param_reg(abi, i, reg);
767 be_abi_call_param_stack(abi, i, 4, stackoffs-lastoffs, 0);
768 lastoffs = stackoffs+stackparamsize;
770 stackoffs += stackparamsize;
774 be_abi_call_param_stack(abi, i, 4, stackoffs-lastoffs, 0);
775 stackoffs += (get_type_size_bytes(tp)+3) & -4;
776 lastoffs = stackoffs;
780 /* explain where result can be found if any */
781 if (get_method_n_ress(method_type) > 0) {
782 tp = get_method_res_type(method_type, 0);
783 mode = get_type_mode(tp);
785 be_abi_call_res_reg(abi, 0,
786 mode_is_float(mode) ? &ppc32_fp_regs[REG_F1] : &ppc32_gp_regs[REG_R3]);
790 static const void *ppc32_get_irn_ops(const arch_irn_handler_t *self, const ir_node *irn) {
791 return &ppc32_irn_ops;
794 const arch_irn_handler_t ppc32_irn_handler = {
798 const arch_irn_handler_t *ppc32_get_irn_handler(const void *self) {
799 return &ppc32_irn_handler;
802 int ppc32_to_appear_in_schedule(void *block_env, const ir_node *irn) {
803 return is_ppc32_irn(irn);
807 * Initializes the code generator interface.
809 static const arch_code_generator_if_t *ppc32_get_code_generator_if(void *self) {
810 return &ppc32_code_gen_if;
813 list_sched_selector_t ppc32_sched_selector;
816 * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
818 static const list_sched_selector_t *ppc32_get_list_sched_selector(const void *self, list_sched_selector_t *selector) {
819 memcpy(&ppc32_sched_selector, trivial_selector, sizeof(list_sched_selector_t));
820 ppc32_sched_selector.to_appear_in_schedule = ppc32_to_appear_in_schedule;
821 return &ppc32_sched_selector;
824 static const ilp_sched_selector_t *ppc32_get_ilp_sched_selector(const void *self) {
829 * Returns the necessary byte alignment for storing a register of given class.
831 static int ppc32_get_reg_class_alignment(const void *self, const arch_register_class_t *cls) {
832 ir_mode *mode = arch_register_class_mode(cls);
833 return get_mode_size_bytes(mode);
836 static const be_execution_unit_t ***ppc32_get_allowed_execution_units(const void *self, const ir_node *irn) {
842 static const be_machine_t *ppc32_get_machine(const void *self) {
849 * Return irp irgs in the desired order.
851 static ir_graph **ppc32_get_irg_list(const void *self, ir_graph ***irg_list) {
856 * Returns the libFirm configuration parameter for this backend.
858 static const backend_params *ppc32_get_libfirm_params(void) {
859 static arch_dep_params_t ad = {
861 0, /* Muls are fast enough on ARM */
862 31, /* shift would be ok */
863 0, /* SMUL is needed, only in Arch M*/
864 0, /* UMUL is needed, only in Arch M */
865 32, /* SMUL & UMUL available for 32 bit */
867 static backend_params p = {
868 NULL, /* no additional opcodes */
869 NULL, /* will be set later */
870 1, /* need dword lowering */
871 NULL, /* but yet no creator function */
872 NULL, /* context for create_intrinsic_fkt */
879 const arch_isa_if_t ppc32_isa_if = {
882 ppc32_get_n_reg_class,
884 ppc32_get_reg_class_for_mode,
886 ppc32_get_irn_handler,
887 ppc32_get_code_generator_if,
888 ppc32_get_list_sched_selector,
889 ppc32_get_ilp_sched_selector,
890 ppc32_get_reg_class_alignment,
891 ppc32_get_libfirm_params,
892 ppc32_get_allowed_execution_units,
897 void be_init_arch_ppc32(void)
899 be_register_isa_if("ppc32", &ppc32_isa_if);
902 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_ppc32);