2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The main ppc backend driver file.
23 * @author Moritz Kroll, Jens Mueller
30 #include "pseudo_irg.h"
42 #include "../bearch_t.h" /* the general register allocator interface */
43 #include "../benode_t.h"
44 #include "../belower.h"
45 #include "../besched_t.h"
48 #include "../bemachine.h"
49 #include "../bemodule.h"
50 #include "../bespillslots.h"
51 #include "../beblocksched.h"
52 #include "../beirg_t.h"
53 #include "../begnuas.h"
57 #include "bearch_ppc32_t.h"
59 #include "ppc32_new_nodes.h" /* ppc nodes interface */
60 #include "gen_ppc32_regalloc_if.h" /* the generated interface (register type and class defenitions) */
61 #include "ppc32_transform.h"
62 #include "ppc32_transform_conv.h"
63 #include "ppc32_emitter.h"
64 #include "ppc32_map_regs.h"
66 #define DEBUG_MODULE "firm.be.ppc.isa"
70 /* TODO: ugly, but we need it to get access to the registers assigned to Phi nodes */
71 static set *cur_reg_set = NULL;
73 /**************************************************
76 * _ __ ___ __ _ __ _| | | ___ ___ _| |_
77 * | '__/ _ \/ _` | / _` | | |/ _ \ / __| | | _|
78 * | | | __/ (_| | | (_| | | | (_) | (__ | | |
79 * |_| \___|\__, | \__,_|_|_|\___/ \___| |_|_|
82 **************************************************/
85 * Return register requirements for a ppc node.
86 * If the node returns a tuple (mode_T) then the proj's
87 * will be asked for this information.
89 static const arch_register_req_t *ppc32_get_irn_reg_req(const ir_node *irn,
92 long node_pos = pos == -1 ? 0 : pos;
93 ir_mode *mode = get_irn_mode(irn);
94 FIRM_DBG_REGISTER(firm_dbg_module_t *mod, DEBUG_MODULE);
96 if (is_Block(irn) || mode == mode_X || mode == mode_M) {
97 DBG((mod, LEVEL_1, "ignoring block, mode_X or mode_M node %+F\n", irn));
98 return arch_no_register_req;
101 if (mode == mode_T && pos < 0) {
102 DBG((mod, LEVEL_1, "ignoring request for OUT requirements at %+F", irn));
103 return arch_no_register_req;
106 DBG((mod, LEVEL_1, "get requirements at pos %d for %+F ... ", pos, irn));
109 /* in case of a proj, we need to get the correct OUT slot */
110 /* of the node corresponding to the proj number */
112 node_pos = ppc32_translate_proj_pos(irn);
117 irn = skip_Proj_const(irn);
119 DB((mod, LEVEL_1, "skipping Proj, going to %+F at pos %d ... ", irn, node_pos));
122 /* get requirements for our own nodes */
123 if (is_ppc32_irn(irn)) {
124 const arch_register_req_t *req;
126 req = get_ppc32_in_req(irn, pos);
128 req = get_ppc32_out_req(irn, node_pos);
131 DB((mod, LEVEL_1, "returning reqs for %+F at pos %d\n", irn, pos));
135 /* unknowns should be transformed by now */
136 assert(!is_Unknown(irn));
138 DB((mod, LEVEL_1, "returning NULL for %+F (node not supported)\n", irn));
139 return arch_no_register_req;
142 static void ppc32_set_irn_reg(ir_node *irn, const arch_register_t *reg)
148 if (get_irn_mode(irn) == mode_X) {
152 pos = ppc32_translate_proj_pos(irn);
153 irn = skip_Proj(irn);
156 if (is_ppc32_irn(irn)) {
157 const arch_register_t **slots;
159 slots = get_ppc32_slots(irn);
163 /* here we set the registers for the Phi nodes */
164 ppc32_set_firm_reg(irn, reg, cur_reg_set);
168 static const arch_register_t *ppc32_get_irn_reg(const ir_node *irn)
171 const arch_register_t *reg = NULL;
175 if (get_irn_mode(irn) == mode_X) {
179 pos = ppc32_translate_proj_pos(irn);
180 irn = skip_Proj_const(irn);
183 if (is_ppc32_irn(irn)) {
184 const arch_register_t **slots;
185 slots = get_ppc32_slots(irn);
189 reg = ppc32_get_firm_reg(irn, cur_reg_set);
195 static arch_irn_class_t ppc32_classify(const ir_node *irn)
197 irn = skip_Proj_const(irn);
200 return arch_irn_class_branch;
202 else if (is_ppc32_irn(irn)) {
203 return arch_irn_class_normal;
209 static arch_irn_flags_t ppc32_get_flags(const ir_node *irn)
211 irn = skip_Proj_const(irn);
213 if (is_ppc32_irn(irn)) {
214 return get_ppc32_flags(irn);
216 else if (is_Unknown(irn)) {
217 return arch_irn_flags_ignore;
223 static ir_entity *ppc32_get_frame_entity(const ir_node *irn)
225 if(!is_ppc32_irn(irn)) return NULL;
226 if(get_ppc32_type(irn)!=ppc32_ac_FrameEntity) return NULL;
227 return get_ppc32_frame_entity(irn);
230 static void ppc32_set_frame_entity(ir_node *irn, ir_entity *ent)
232 if (! is_ppc32_irn(irn) || get_ppc32_type(irn) != ppc32_ac_FrameEntity)
234 set_ppc32_frame_entity(irn, ent);
238 * This function is called by the generic backend to correct offsets for
239 * nodes accessing the stack.
241 static void ppc32_set_stack_bias(ir_node *irn, int bias)
243 set_ppc32_offset(irn, bias);
246 static int ppc32_get_sp_bias(const ir_node *irn)
254 const be_abi_call_t *call;
259 * Initialize the callback object.
260 * @param call The call object.
261 * @param aenv The architecture environment.
262 * @param irg The graph with the method.
263 * @return Some pointer. This pointer is passed to all other callback functions as self object.
265 static void *ppc32_abi_init(const be_abi_call_t *call, const arch_env_t *aenv, ir_graph *irg)
267 ppc32_abi_env *env = XMALLOC(ppc32_abi_env);
276 * Destroy the callback object.
277 * @param self The callback object.
279 static void ppc32_abi_done(void *self)
285 * Get the between type for that call.
286 * @param self The callback object.
287 * @return The between type of for that call.
289 static ir_type *ppc32_abi_get_between_type(void *self)
291 static ir_type *between_type = NULL;
292 static ir_entity *old_bp_ent = NULL;
296 ir_entity *ret_addr_ent;
297 ir_type *ret_addr_type = new_type_primitive(new_id_from_str("return_addr"), mode_P);
298 ir_type *old_bp_type = new_type_primitive(new_id_from_str("bp"), mode_P);
300 between_type = new_type_class(new_id_from_str("ppc32_between_type"));
301 old_bp_ent = new_entity(between_type, new_id_from_str("old_bp"), old_bp_type);
302 ret_addr_ent = new_entity(between_type, new_id_from_str("old_bp"), ret_addr_type);
304 set_entity_offset(old_bp_ent, 0);
305 set_entity_offset(ret_addr_ent, get_type_size_bytes(old_bp_type));
306 set_type_size_bytes(between_type, get_type_size_bytes(old_bp_type) + get_type_size_bytes(ret_addr_type));
313 * Put all registers which are saved by the prologue/epilogue in a set.
314 * @param self The callback object.
317 static void ppc32_abi_regs_saved_by_me(void *self, pset *regs)
324 * Generate the prologue.
325 * @param self The callback object.
326 * @param mem A pointer to the mem node. Update this if you define new memory.
327 * @param reg_map A mapping mapping all callee_save/ignore/parameter registers to their defining nodes.
328 * @param stack_bias Points to the current stack bias, can be modified if needed.
330 * @return The register which shall be used as a stack frame base.
332 * All nodes which define registers in @p reg_map must keep @p reg_map current.
334 static const arch_register_t *ppc32_abi_prologue(void *self, ir_node **mem, pmap *reg_map, int *stack_bias)
336 ppc32_abi_env *env = (ppc32_abi_env *) self;
337 be_abi_call_flags_t flags = be_abi_call_get_flags(env->call);
341 isleaf = flags.bits.irg_is_leaf;
343 if (flags.bits.try_omit_fp)
344 return &ppc32_gp_regs[REG_R1];
346 return &ppc32_gp_regs[REG_R31];
350 * Generate the epilogue.
351 * @param self The callback object.
352 * @param mem Memory one can attach to.
353 * @param reg_map A mapping mapping all callee_save/ignore/return registers to their defining nodes.
355 * All nodes which define registers in @p reg_map must keep @p reg_map current.
356 * Also, the @p mem variable must be updated, if memory producing nodes are inserted.
358 static void ppc32_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_map)
366 static const be_abi_callbacks_t ppc32_abi_callbacks = {
369 ppc32_abi_get_between_type,
370 ppc32_abi_regs_saved_by_me,
375 /* fill register allocator interface */
377 static const arch_irn_ops_t ppc32_irn_ops = {
378 ppc32_get_irn_reg_req,
383 ppc32_get_frame_entity,
384 ppc32_set_frame_entity,
385 ppc32_set_stack_bias,
387 NULL, /* get_inverse */
388 NULL, /* get_op_estimated_cost */
389 NULL, /* possible_memory_operand */
390 NULL, /* perform_memory_operand */
393 /**************************************************
396 * ___ ___ __| | ___ __ _ ___ _ __ _| |_
397 * / __/ _ \ / _` |/ _ \/ _` |/ _ \ '_ \ | | _|
398 * | (_| (_) | (_| | __/ (_| | __/ | | | | | |
399 * \___\___/ \__,_|\___|\__, |\___|_| |_| |_|_|
402 **************************************************/
404 static void ppc32_before_abi(void *self) {
405 ppc32_code_gen_t *cg = self;
406 ir_type *frame_type = get_irg_frame_type(cg->irg);
408 frame_alloc_area(frame_type, 24, 4, 1);
410 ppc32_init_conv_walk();
411 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_conv_walk, cg);
414 if(cg->area_size < 32) cg->area_size = 32;
415 cg->area = frame_alloc_area(get_irg_frame_type(cg->irg), cg->area_size+24, 16, 1);
419 static void ppc32_search_start_successor(ir_node *block, void *env) {
420 ppc32_code_gen_t *cg = env;
421 int n = get_Block_n_cfgpreds(block);
422 ir_node *startblock = get_irg_start_block(cg->irg);
423 if(block == startblock) return;
425 for (n--; n >= 0; n--) {
426 ir_node *predblock = get_irn_n(get_Block_cfgpred(block, n), -1);
427 if(predblock == startblock)
429 cg->start_succ_block = block;
436 * Transforms the standard firm graph into
439 static void ppc32_prepare_graph(void *self) {
440 ppc32_code_gen_t *cg = self;
442 irg_block_walk_graph(cg->irg, NULL, ppc32_search_start_successor, cg);
443 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_pretransform_walk, cg);
444 be_dump(cg->irg, "-pretransformed", dump_ir_block_graph);
446 ppc32_register_transformers();
447 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_transform_node, cg);
448 be_dump(cg->irg, "-transformed", dump_ir_block_graph);
449 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_transform_const, cg);
455 * Called immediatly before emit phase.
457 static void ppc32_finish_irg(void *self) {
459 /* TODO: - fix offsets for nodes accessing stack
466 * These are some hooks which must be filled but are probably not needed.
468 static void ppc32_before_sched(void *self) {
470 /* Some stuff you need to do after scheduling but before register allocation */
474 * Called before the register allocator.
475 * Calculate a block schedule here. We need it for the x87
476 * simulator and the emitter.
478 static void ppc32_before_ra(void *self) {
479 ppc32_code_gen_t *cg = self;
480 cg->blk_sched = be_create_block_schedule(cg->irg, cg->birg->exec_freq);
483 static void ppc32_transform_spill(ir_node *node, void *env)
487 if(be_is_Spill(node))
489 ir_node *store, *proj;
490 dbg_info *dbg = get_irn_dbg_info(node);
491 ir_node *block = get_nodes_block(node);
493 const arch_register_class_t *regclass = arch_get_irn_reg_class(node, 1);
495 if (regclass == &ppc32_reg_classes[CLASS_ppc32_gp])
497 store = new_rd_ppc32_Stw(dbg, current_ir_graph, block,
498 get_irn_n(node, 0), get_irn_n(node, 1), new_rd_NoMem(current_ir_graph));
500 else if (regclass == &ppc32_reg_classes[CLASS_ppc32_fp])
502 store = new_rd_ppc32_Stfd(dbg, current_ir_graph, block,
503 get_irn_n(node, 0), get_irn_n(node, 1), new_rd_NoMem(current_ir_graph));
505 else panic("Spill for register class not supported yet!");
507 set_ppc32_frame_entity(store, be_get_frame_entity(node));
509 proj = new_rd_Proj(dbg, current_ir_graph, block, store, mode_M, pn_Store_M);
511 if (sched_is_scheduled(node)) {
512 sched_add_after(sched_prev(node), store);
513 sched_add_after(store, proj);
518 exchange(node, proj);
521 if(be_is_Reload(node))
523 ir_node *load, *proj;
524 const arch_register_t *reg;
525 dbg_info *dbg = get_irn_dbg_info(node);
526 ir_node *block = get_nodes_block(node);
527 ir_mode *mode = get_irn_mode(node);
529 const arch_register_class_t *regclass = arch_get_irn_reg_class(node, -1);
531 if (regclass == &ppc32_reg_classes[CLASS_ppc32_gp])
533 load = new_rd_ppc32_Lwz(dbg, current_ir_graph, block, get_irn_n(node, 0), get_irn_n(node, 1));
535 else if (regclass == &ppc32_reg_classes[CLASS_ppc32_fp])
537 load = new_rd_ppc32_Lfd(dbg, current_ir_graph, block, get_irn_n(node, 0), get_irn_n(node, 1));
539 else panic("Reload for register class not supported yet!");
541 set_ppc32_frame_entity(load, be_get_frame_entity(node));
543 proj = new_rd_Proj(dbg, current_ir_graph, block, load, mode, pn_Load_res);
545 if (sched_is_scheduled(node)) {
546 sched_add_after(sched_prev(node), load);
547 sched_add_after(load, proj);
552 /* copy the register from the old node to the new Load */
553 reg = arch_get_irn_register(node);
554 arch_set_irn_register(load, reg);
556 exchange(node, proj);
561 * Some stuff to do immediately after register allocation
563 static void ppc32_after_ra(void *self) {
564 ppc32_code_gen_t *cg = self;
565 be_coalesce_spillslots(cg->birg);
566 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_transform_spill, NULL);
570 * Emits the code, closes the output file and frees
571 * the code generator interface.
573 static void ppc32_emit_and_done(void *self) {
574 ppc32_code_gen_t *cg = self;
575 ir_graph *irg = cg->irg;
577 dump_ir_block_graph_sched(irg, "-ppc-finished");
578 ppc32_gen_routine(cg, irg);
582 /* de-allocate code generator */
583 del_set(cg->reg_set);
587 int is_direct_entity(ir_entity *ent);
589 static void *ppc32_cg_init(be_irg_t *birg);
591 static const arch_code_generator_if_t ppc32_code_gen_if = {
593 NULL, /* get_pic_base */
597 ppc32_before_sched, /* before scheduling hook */
598 ppc32_before_ra, /* before register allocation hook */
605 * Initializes the code generator.
607 static void *ppc32_cg_init(be_irg_t *birg) {
608 ppc32_isa_t *isa = (ppc32_isa_t *)birg->main_env->arch_env;
609 ppc32_code_gen_t *cg = XMALLOC(ppc32_code_gen_t);
611 cg->impl = &ppc32_code_gen_if;
613 cg->reg_set = new_set(ppc32_cmp_irn_reg_assoc, 1024);
618 cg->start_succ_block = NULL;
619 cg->blk_sched = NULL;
620 FIRM_DBG_REGISTER(cg->mod, "firm.be.ppc.cg");
622 cur_reg_set = cg->reg_set;
624 return (arch_code_generator_t *)cg;
629 /*****************************************************************
630 * ____ _ _ _____ _____
631 * | _ \ | | | | |_ _|/ ____| /\
632 * | |_) | __ _ ___| | _____ _ __ __| | | | | (___ / \
633 * | _ < / _` |/ __| |/ / _ \ '_ \ / _` | | | \___ \ / /\ \
634 * | |_) | (_| | (__| < __/ | | | (_| | _| |_ ____) / ____ \
635 * |____/ \__,_|\___|_|\_\___|_| |_|\__,_| |_____|_____/_/ \_\
637 *****************************************************************/
639 static ppc32_isa_t ppc32_isa_template = {
641 &ppc32_isa_if, /* isa interface */
642 &ppc32_gp_regs[REG_R1], /* stack pointer */
643 &ppc32_gp_regs[REG_R31], /* base pointer */
644 -1, /* stack is decreasing */
645 2, /* power of two stack alignment for calls, 2^2 == 4 */
646 NULL, /* main environment */
648 5, /* reload costs */
650 NULL /* symbol set */
654 * Collects all SymConsts which need to be accessed "indirectly"
656 * @param node the firm node
657 * @param env the symbol set
659 static void ppc32_collect_symconsts_walk(ir_node *node, void *env) {
660 pset *symbol_set = env;
662 if (is_SymConst(node)) {
663 ir_entity *ent = get_SymConst_entity(node);
664 set_entity_backend_marked(ent, 1);
665 if (! is_direct_entity(ent))
666 pset_insert_ptr(symbol_set, ent);
671 * Initializes the backend ISA and opens the output file.
673 static arch_env_t *ppc32_init(FILE *file_handle) {
674 static int inited = 0;
681 isa = XMALLOC(ppc32_isa_t);
682 memcpy(isa, &ppc32_isa_template, sizeof(*isa));
684 be_emit_init(file_handle);
686 ppc32_register_init();
687 ppc32_create_opcodes(&ppc32_irn_ops);
691 isa->symbol_set = pset_new_ptr(8);
692 for (i = 0; i < get_irp_n_irgs(); ++i) {
693 ir_graph *irg = get_irp_irg(i);
694 irg_walk_blkwise_graph(irg, NULL, ppc32_collect_symconsts_walk, isa->symbol_set);
697 /* we mark referenced global entities, so we can only emit those which
698 * are actually referenced. (Note: you mustn't use the type visited flag
699 * elsewhere in the backend)
701 inc_master_type_visited();
703 return &isa->arch_env;
706 static void ppc32_dump_indirect_symbols(ppc32_isa_t *isa) {
709 foreach_pset(isa->symbol_set, ent) {
710 const char *ld_name = get_entity_ld_name(ent);
711 be_emit_irprintf(".non_lazy_symbol_pointer\n%s:\n\t.indirect_symbol _%s\n\t.long 0\n\n", ld_name, ld_name);
712 be_emit_write_line();
717 * Closes the output file and frees the ISA structure.
719 static void ppc32_done(void *self) {
720 ppc32_isa_t *isa = self;
722 be_gas_emit_decls(isa->arch_env.main_env, 1);
723 be_gas_emit_switch_section(GAS_SECTION_DATA);
724 ppc32_dump_indirect_symbols(isa);
727 del_pset(isa->symbol_set);
734 static unsigned ppc32_get_n_reg_class(const void *self) {
739 static const arch_register_class_t *ppc32_get_reg_class(const void *self,
742 assert(i < N_CLASSES && "Invalid ppc register class requested.");
743 return &ppc32_reg_classes[i];
749 * Get the register class which shall be used to store a value of a given mode.
750 * @param self The this pointer.
751 * @param mode The mode in question.
752 * @return A register class which can hold values of the given mode.
754 const arch_register_class_t *ppc32_get_reg_class_for_mode(const void *self, const ir_mode *mode) {
756 if (mode_is_float(mode))
757 return &ppc32_reg_classes[CLASS_ppc32_fp];
759 return &ppc32_reg_classes[CLASS_ppc32_gp];
764 * Get the ABI restrictions for procedure calls.
765 * @param self The this pointer.
766 * @param method_type The type of the method (procedure) in question.
767 * @param abi The abi object to be modified
769 static void ppc32_get_call_abi(const void *self, ir_type *method_type, be_abi_call_t *abi) {
772 int i, n = get_method_n_params(method_type);
773 int stackoffs = 0, lastoffs = 0, stackparamsize;
778 const arch_register_t *reg;
779 be_abi_call_flags_t call_flags = { { 0, 0, 1, 0, 0, 0, 1 } };
782 if(get_type_visibility(method_type)!=visibility_external_allocated)
783 call_flags.bits.call_has_imm = 1;
785 /* set stack parameter passing style */
786 be_abi_call_set_flags(abi, call_flags, &ppc32_abi_callbacks);
788 for (i = 0; i < n; i++) {
789 tp = get_method_param_type(method_type, i);
790 mode = get_type_mode(tp);
791 if(is_atomic_type(tp))
793 if(mode_is_float(mode))
795 if(fpregi <= REG_F13)
797 if(get_mode_size_bits(mode) == 32) gpregi++, stackparamsize=4;
798 else gpregi += 2, stackparamsize=8; // mode == irm_D
799 reg = &ppc32_fp_regs[fpregi++];
803 if(get_mode_size_bits(mode) == 32) stackparamsize=4;
804 else stackparamsize=8; // mode == irm_D
810 if(gpregi <= REG_R10)
811 reg = &ppc32_gp_regs[gpregi++];
818 be_abi_call_param_reg(abi, i, reg);
821 be_abi_call_param_stack(abi, i, mode, 4, stackoffs - lastoffs, 0);
822 lastoffs = stackoffs+stackparamsize;
824 stackoffs += stackparamsize;
828 be_abi_call_param_stack(abi, i, mode, 4, stackoffs - lastoffs, 0);
829 stackoffs += (get_type_size_bytes(tp)+3) & -4;
830 lastoffs = stackoffs;
834 /* explain where result can be found if any */
835 if (get_method_n_ress(method_type) > 0) {
836 tp = get_method_res_type(method_type, 0);
837 mode = get_type_mode(tp);
839 be_abi_call_res_reg(abi, 0,
840 mode_is_float(mode) ? &ppc32_fp_regs[REG_F1] : &ppc32_gp_regs[REG_R3]);
844 int ppc32_to_appear_in_schedule(void *block_env, const ir_node *irn) {
846 if(!is_ppc32_irn(irn))
853 * Initializes the code generator interface.
855 static const arch_code_generator_if_t *ppc32_get_code_generator_if(void *self) {
857 return &ppc32_code_gen_if;
860 list_sched_selector_t ppc32_sched_selector;
863 * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
865 static const list_sched_selector_t *ppc32_get_list_sched_selector(const void *self, list_sched_selector_t *selector) {
868 ppc32_sched_selector = trivial_selector;
869 ppc32_sched_selector.to_appear_in_schedule = ppc32_to_appear_in_schedule;
870 return &ppc32_sched_selector;
873 static const ilp_sched_selector_t *ppc32_get_ilp_sched_selector(const void *self) {
879 * Returns the necessary byte alignment for storing a register of given class.
881 static int ppc32_get_reg_class_alignment(const void *self, const arch_register_class_t *cls) {
882 ir_mode *mode = arch_register_class_mode(cls);
885 return get_mode_size_bytes(mode);
888 static const be_execution_unit_t ***ppc32_get_allowed_execution_units(const void *self, const ir_node *irn) {
892 panic("Unimplemented ppc32_get_allowed_execution_units()");
896 static const be_machine_t *ppc32_get_machine(const void *self) {
899 panic("Unimplemented ppc32_get_machine()");
904 * Return irp irgs in the desired order.
906 static ir_graph **ppc32_get_irg_list(const void *self, ir_graph ***irg_list) {
913 * Returns the libFirm configuration parameter for this backend.
915 static const backend_params *ppc32_get_libfirm_params(void) {
916 static backend_params p = {
917 1, /* need dword lowering */
918 0, /* don't support inline assembler yet */
919 0, /* no immediate floating point mode. */
920 NULL, /* no additional opcodes */
921 NULL, /* will be set later */
922 NULL, /* but yet no creator function */
923 NULL, /* context for create_intrinsic_fkt */
924 NULL, /* no if conversion settings */
925 NULL /* no immediate fp mode */
931 static asm_constraint_flags_t ppc32_parse_asm_constraint(const void *self, const char **c)
933 /* no asm support yet */
936 return ASM_CONSTRAINT_FLAG_INVALID;
939 static int ppc32_is_valid_clobber(const void *self, const char *clobber)
941 /* no asm support yet */
947 const arch_isa_if_t ppc32_isa_if = {
950 ppc32_get_n_reg_class,
952 ppc32_get_reg_class_for_mode,
954 ppc32_get_code_generator_if,
955 ppc32_get_list_sched_selector,
956 ppc32_get_ilp_sched_selector,
957 ppc32_get_reg_class_alignment,
958 ppc32_get_libfirm_params,
959 ppc32_get_allowed_execution_units,
962 NULL, /* mark remat */
963 ppc32_parse_asm_constraint,
964 ppc32_is_valid_clobber
967 void be_init_arch_ppc32(void)
969 be_register_isa_if("ppc32", &ppc32_isa_if);
972 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_ppc32);