2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The main ppc backend driver file.
23 * @author Moritz Kroll, Jens Mueller
28 #include "pseudo_irg.h"
40 #include "../bearch_t.h" /* the general register allocator interface */
41 #include "../benode_t.h"
42 #include "../belower.h"
43 #include "../besched_t.h"
46 #include "../bemachine.h"
47 #include "../bemodule.h"
48 #include "../bespillslots.h"
49 #include "../beblocksched.h"
50 #include "../beirg_t.h"
51 #include "../begnuas.h"
55 #include "bearch_ppc32_t.h"
57 #include "ppc32_new_nodes.h" /* ppc nodes interface */
58 #include "gen_ppc32_regalloc_if.h" /* the generated interface (register type and class defenitions) */
59 #include "ppc32_transform.h"
60 #include "ppc32_transform_conv.h"
61 #include "ppc32_emitter.h"
62 #include "ppc32_map_regs.h"
64 #define DEBUG_MODULE "firm.be.ppc.isa"
68 /* TODO: ugly, but we need it to get access to the registers assigned to Phi nodes */
69 static set *cur_reg_set = NULL;
71 /**************************************************
74 * _ __ ___ __ _ __ _| | | ___ ___ _| |_
75 * | '__/ _ \/ _` | / _` | | |/ _ \ / __| | | _|
76 * | | | __/ (_| | | (_| | | | (_) | (__ | | |
77 * |_| \___|\__, | \__,_|_|_|\___/ \___| |_|_|
80 **************************************************/
83 * Return register requirements for a ppc node.
84 * If the node returns a tuple (mode_T) then the proj's
85 * will be asked for this information.
87 static const arch_register_req_t *ppc32_get_irn_reg_req(const ir_node *irn,
90 long node_pos = pos == -1 ? 0 : pos;
91 ir_mode *mode = get_irn_mode(irn);
92 FIRM_DBG_REGISTER(firm_dbg_module_t *mod, DEBUG_MODULE);
94 if (is_Block(irn) || mode == mode_X || mode == mode_M) {
95 DBG((mod, LEVEL_1, "ignoring block, mode_X or mode_M node %+F\n", irn));
96 return arch_no_register_req;
99 if (mode == mode_T && pos < 0) {
100 DBG((mod, LEVEL_1, "ignoring request for OUT requirements at %+F", irn));
101 return arch_no_register_req;
104 DBG((mod, LEVEL_1, "get requirements at pos %d for %+F ... ", pos, irn));
107 /* in case of a proj, we need to get the correct OUT slot */
108 /* of the node corresponding to the proj number */
110 node_pos = ppc32_translate_proj_pos(irn);
115 irn = skip_Proj_const(irn);
117 DB((mod, LEVEL_1, "skipping Proj, going to %+F at pos %d ... ", irn, node_pos));
120 /* get requirements for our own nodes */
121 if (is_ppc32_irn(irn)) {
122 const arch_register_req_t *req;
124 req = get_ppc32_in_req(irn, pos);
126 req = get_ppc32_out_req(irn, node_pos);
129 DB((mod, LEVEL_1, "returning reqs for %+F at pos %d\n", irn, pos));
133 /* unknowns should be transformed by now */
134 assert(!is_Unknown(irn));
136 DB((mod, LEVEL_1, "returning NULL for %+F (node not supported)\n", irn));
137 return arch_no_register_req;
140 static void ppc32_set_irn_reg(ir_node *irn, const arch_register_t *reg)
146 if (get_irn_mode(irn) == mode_X) {
150 pos = ppc32_translate_proj_pos(irn);
151 irn = skip_Proj(irn);
154 if (is_ppc32_irn(irn)) {
155 const arch_register_t **slots;
157 slots = get_ppc32_slots(irn);
161 /* here we set the registers for the Phi nodes */
162 ppc32_set_firm_reg(irn, reg, cur_reg_set);
166 static const arch_register_t *ppc32_get_irn_reg(const ir_node *irn)
169 const arch_register_t *reg = NULL;
173 if (get_irn_mode(irn) == mode_X) {
177 pos = ppc32_translate_proj_pos(irn);
178 irn = skip_Proj_const(irn);
181 if (is_ppc32_irn(irn)) {
182 const arch_register_t **slots;
183 slots = get_ppc32_slots(irn);
187 reg = ppc32_get_firm_reg(irn, cur_reg_set);
193 static arch_irn_class_t ppc32_classify(const ir_node *irn)
195 irn = skip_Proj_const(irn);
198 return arch_irn_class_branch;
204 static arch_irn_flags_t ppc32_get_flags(const ir_node *irn)
206 irn = skip_Proj_const(irn);
208 if (is_ppc32_irn(irn)) {
209 return get_ppc32_flags(irn);
211 else if (is_Unknown(irn)) {
212 return arch_irn_flags_ignore;
218 static ir_entity *ppc32_get_frame_entity(const ir_node *irn)
220 if(!is_ppc32_irn(irn)) return NULL;
221 if(get_ppc32_type(irn)!=ppc32_ac_FrameEntity) return NULL;
222 return get_ppc32_frame_entity(irn);
225 static void ppc32_set_frame_entity(ir_node *irn, ir_entity *ent)
227 if (! is_ppc32_irn(irn) || get_ppc32_type(irn) != ppc32_ac_FrameEntity)
229 set_ppc32_frame_entity(irn, ent);
233 * This function is called by the generic backend to correct offsets for
234 * nodes accessing the stack.
236 static void ppc32_set_stack_bias(ir_node *irn, int bias)
238 set_ppc32_offset(irn, bias);
241 static int ppc32_get_sp_bias(const ir_node *irn)
249 const be_abi_call_t *call;
254 * Initialize the callback object.
255 * @param call The call object.
256 * @param aenv The architecture environment.
257 * @param irg The graph with the method.
258 * @return Some pointer. This pointer is passed to all other callback functions as self object.
260 static void *ppc32_abi_init(const be_abi_call_t *call, const arch_env_t *aenv, ir_graph *irg)
262 ppc32_abi_env *env = XMALLOC(ppc32_abi_env);
271 * Destroy the callback object.
272 * @param self The callback object.
274 static void ppc32_abi_done(void *self)
280 * Get the between type for that call.
281 * @param self The callback object.
282 * @return The between type of for that call.
284 static ir_type *ppc32_abi_get_between_type(void *self)
286 static ir_type *between_type = NULL;
287 static ir_entity *old_bp_ent = NULL;
291 ir_entity *ret_addr_ent;
292 ir_type *ret_addr_type = new_type_primitive(new_id_from_str("return_addr"), mode_P);
293 ir_type *old_bp_type = new_type_primitive(new_id_from_str("bp"), mode_P);
295 between_type = new_type_class(new_id_from_str("ppc32_between_type"));
296 old_bp_ent = new_entity(between_type, new_id_from_str("old_bp"), old_bp_type);
297 ret_addr_ent = new_entity(between_type, new_id_from_str("old_bp"), ret_addr_type);
299 set_entity_offset(old_bp_ent, 0);
300 set_entity_offset(ret_addr_ent, get_type_size_bytes(old_bp_type));
301 set_type_size_bytes(between_type, get_type_size_bytes(old_bp_type) + get_type_size_bytes(ret_addr_type));
308 * Generate the prologue.
309 * @param self The callback object.
310 * @param mem A pointer to the mem node. Update this if you define new memory.
311 * @param reg_map A mapping mapping all callee_save/ignore/parameter registers to their defining nodes.
312 * @param stack_bias Points to the current stack bias, can be modified if needed.
314 * @return The register which shall be used as a stack frame base.
316 * All nodes which define registers in @p reg_map must keep @p reg_map current.
318 static const arch_register_t *ppc32_abi_prologue(void *self, ir_node **mem, pmap *reg_map, int *stack_bias)
320 ppc32_abi_env *env = (ppc32_abi_env *) self;
321 be_abi_call_flags_t flags = be_abi_call_get_flags(env->call);
325 isleaf = flags.bits.irg_is_leaf;
327 if (flags.bits.try_omit_fp)
328 return &ppc32_gp_regs[REG_R1];
330 return &ppc32_gp_regs[REG_R31];
334 * Generate the epilogue.
335 * @param self The callback object.
336 * @param mem Memory one can attach to.
337 * @param reg_map A mapping mapping all callee_save/ignore/return registers to their defining nodes.
339 * All nodes which define registers in @p reg_map must keep @p reg_map current.
340 * Also, the @p mem variable must be updated, if memory producing nodes are inserted.
342 static void ppc32_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_map)
350 static const be_abi_callbacks_t ppc32_abi_callbacks = {
353 ppc32_abi_get_between_type,
358 /* fill register allocator interface */
360 static const arch_irn_ops_t ppc32_irn_ops = {
361 ppc32_get_irn_reg_req,
366 ppc32_get_frame_entity,
367 ppc32_set_frame_entity,
368 ppc32_set_stack_bias,
370 NULL, /* get_inverse */
371 NULL, /* get_op_estimated_cost */
372 NULL, /* possible_memory_operand */
373 NULL, /* perform_memory_operand */
376 /**************************************************
379 * ___ ___ __| | ___ __ _ ___ _ __ _| |_
380 * / __/ _ \ / _` |/ _ \/ _` |/ _ \ '_ \ | | _|
381 * | (_| (_) | (_| | __/ (_| | __/ | | | | | |
382 * \___\___/ \__,_|\___|\__, |\___|_| |_| |_|_|
385 **************************************************/
387 static void ppc32_before_abi(void *self) {
388 ppc32_code_gen_t *cg = self;
389 ir_type *frame_type = get_irg_frame_type(cg->irg);
391 frame_alloc_area(frame_type, 24, 4, 1);
393 ppc32_init_conv_walk();
394 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_conv_walk, cg);
397 if(cg->area_size < 32) cg->area_size = 32;
398 cg->area = frame_alloc_area(get_irg_frame_type(cg->irg), cg->area_size+24, 16, 1);
402 static void ppc32_search_start_successor(ir_node *block, void *env) {
403 ppc32_code_gen_t *cg = env;
404 int n = get_Block_n_cfgpreds(block);
405 ir_node *startblock = get_irg_start_block(cg->irg);
406 if(block == startblock) return;
408 for (n--; n >= 0; n--) {
409 ir_node *predblock = get_irn_n(get_Block_cfgpred(block, n), -1);
410 if(predblock == startblock)
412 cg->start_succ_block = block;
419 * Transforms the standard firm graph into
422 static void ppc32_prepare_graph(void *self) {
423 ppc32_code_gen_t *cg = self;
425 irg_block_walk_graph(cg->irg, NULL, ppc32_search_start_successor, cg);
426 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_pretransform_walk, cg);
427 be_dump(cg->irg, "-pretransformed", dump_ir_block_graph);
429 ppc32_register_transformers();
430 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_transform_node, cg);
431 be_dump(cg->irg, "-transformed", dump_ir_block_graph);
432 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_transform_const, cg);
438 * Called immediatly before emit phase.
440 static void ppc32_finish_irg(void *self) {
442 /* TODO: - fix offsets for nodes accessing stack
449 * Called before the register allocator.
450 * Calculate a block schedule here. We need it for the x87
451 * simulator and the emitter.
453 static void ppc32_before_ra(void *self) {
454 ppc32_code_gen_t *cg = self;
455 cg->blk_sched = be_create_block_schedule(cg->irg, cg->birg->exec_freq);
458 static void ppc32_transform_spill(ir_node *node, void *env)
462 if(be_is_Spill(node))
464 ir_node *store, *proj;
465 dbg_info *dbg = get_irn_dbg_info(node);
466 ir_node *block = get_nodes_block(node);
468 const arch_register_class_t *regclass = arch_get_irn_reg_class(node, 1);
470 if (regclass == &ppc32_reg_classes[CLASS_ppc32_gp])
472 store = new_rd_ppc32_Stw(dbg, current_ir_graph, block,
473 get_irn_n(node, 0), get_irn_n(node, 1), new_rd_NoMem(current_ir_graph));
475 else if (regclass == &ppc32_reg_classes[CLASS_ppc32_fp])
477 store = new_rd_ppc32_Stfd(dbg, current_ir_graph, block,
478 get_irn_n(node, 0), get_irn_n(node, 1), new_rd_NoMem(current_ir_graph));
480 else panic("Spill for register class not supported yet!");
482 set_ppc32_frame_entity(store, be_get_frame_entity(node));
484 proj = new_rd_Proj(dbg, current_ir_graph, block, store, mode_M, pn_Store_M);
486 if (sched_is_scheduled(node)) {
487 sched_add_after(sched_prev(node), store);
488 sched_add_after(store, proj);
493 exchange(node, proj);
496 if(be_is_Reload(node))
498 ir_node *load, *proj;
499 const arch_register_t *reg;
500 dbg_info *dbg = get_irn_dbg_info(node);
501 ir_node *block = get_nodes_block(node);
502 ir_mode *mode = get_irn_mode(node);
504 const arch_register_class_t *regclass = arch_get_irn_reg_class_out(node);
506 if (regclass == &ppc32_reg_classes[CLASS_ppc32_gp])
508 load = new_rd_ppc32_Lwz(dbg, current_ir_graph, block, get_irn_n(node, 0), get_irn_n(node, 1));
510 else if (regclass == &ppc32_reg_classes[CLASS_ppc32_fp])
512 load = new_rd_ppc32_Lfd(dbg, current_ir_graph, block, get_irn_n(node, 0), get_irn_n(node, 1));
514 else panic("Reload for register class not supported yet!");
516 set_ppc32_frame_entity(load, be_get_frame_entity(node));
518 proj = new_rd_Proj(dbg, current_ir_graph, block, load, mode, pn_Load_res);
520 if (sched_is_scheduled(node)) {
521 sched_add_after(sched_prev(node), load);
522 sched_add_after(load, proj);
527 /* copy the register from the old node to the new Load */
528 reg = arch_get_irn_register(node);
529 arch_set_irn_register(load, reg);
531 exchange(node, proj);
536 * Some stuff to do immediately after register allocation
538 static void ppc32_after_ra(void *self) {
539 ppc32_code_gen_t *cg = self;
540 be_coalesce_spillslots(cg->birg);
541 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_transform_spill, NULL);
545 * Emits the code, closes the output file and frees
546 * the code generator interface.
548 static void ppc32_emit_and_done(void *self) {
549 ppc32_code_gen_t *cg = self;
550 ir_graph *irg = cg->irg;
552 dump_ir_block_graph_sched(irg, "-ppc-finished");
553 ppc32_gen_routine(cg, irg);
557 /* de-allocate code generator */
558 del_set(cg->reg_set);
562 int is_direct_entity(ir_entity *ent);
564 static void *ppc32_cg_init(be_irg_t *birg);
566 static const arch_code_generator_if_t ppc32_code_gen_if = {
568 NULL, /* get_pic_base */
572 ppc32_before_ra, /* before register allocation hook */
579 * Initializes the code generator.
581 static void *ppc32_cg_init(be_irg_t *birg) {
582 ppc32_isa_t *isa = (ppc32_isa_t *)birg->main_env->arch_env;
583 ppc32_code_gen_t *cg = XMALLOC(ppc32_code_gen_t);
585 cg->impl = &ppc32_code_gen_if;
587 cg->reg_set = new_set(ppc32_cmp_irn_reg_assoc, 1024);
592 cg->start_succ_block = NULL;
593 cg->blk_sched = NULL;
594 FIRM_DBG_REGISTER(cg->mod, "firm.be.ppc.cg");
596 cur_reg_set = cg->reg_set;
598 return (arch_code_generator_t *)cg;
603 /*****************************************************************
604 * ____ _ _ _____ _____
605 * | _ \ | | | | |_ _|/ ____| /\
606 * | |_) | __ _ ___| | _____ _ __ __| | | | | (___ / \
607 * | _ < / _` |/ __| |/ / _ \ '_ \ / _` | | | \___ \ / /\ \
608 * | |_) | (_| | (__| < __/ | | | (_| | _| |_ ____) / ____ \
609 * |____/ \__,_|\___|_|\_\___|_| |_|\__,_| |_____|_____/_/ \_\
611 *****************************************************************/
613 static ppc32_isa_t ppc32_isa_template = {
615 &ppc32_isa_if, /* isa interface */
616 &ppc32_gp_regs[REG_R1], /* stack pointer */
617 &ppc32_gp_regs[REG_R31], /* base pointer */
618 -1, /* stack is decreasing */
619 2, /* power of two stack alignment for calls, 2^2 == 4 */
620 NULL, /* main environment */
622 5, /* reload costs */
624 NULL /* symbol set */
628 * Collects all SymConsts which need to be accessed "indirectly"
630 * @param node the firm node
631 * @param env the symbol set
633 static void ppc32_collect_symconsts_walk(ir_node *node, void *env) {
634 pset *symbol_set = env;
636 if (is_SymConst(node)) {
637 ir_entity *ent = get_SymConst_entity(node);
638 set_entity_backend_marked(ent, 1);
639 if (! is_direct_entity(ent))
640 pset_insert_ptr(symbol_set, ent);
645 * Initializes the backend ISA and opens the output file.
647 static arch_env_t *ppc32_init(FILE *file_handle) {
648 static int inited = 0;
655 isa = XMALLOC(ppc32_isa_t);
656 memcpy(isa, &ppc32_isa_template, sizeof(*isa));
658 be_emit_init(file_handle);
660 ppc32_register_init();
661 ppc32_create_opcodes(&ppc32_irn_ops);
665 isa->symbol_set = pset_new_ptr(8);
666 for (i = 0; i < get_irp_n_irgs(); ++i) {
667 ir_graph *irg = get_irp_irg(i);
668 irg_walk_blkwise_graph(irg, NULL, ppc32_collect_symconsts_walk, isa->symbol_set);
671 /* we mark referenced global entities, so we can only emit those which
672 * are actually referenced. (Note: you mustn't use the type visited flag
673 * elsewhere in the backend)
675 inc_master_type_visited();
677 return &isa->arch_env;
680 static void ppc32_dump_indirect_symbols(ppc32_isa_t *isa) {
683 foreach_pset(isa->symbol_set, ent) {
684 const char *ld_name = get_entity_ld_name(ent);
685 be_emit_irprintf(".non_lazy_symbol_pointer\n%s:\n\t.indirect_symbol _%s\n\t.long 0\n\n", ld_name, ld_name);
686 be_emit_write_line();
691 * Closes the output file and frees the ISA structure.
693 static void ppc32_done(void *self) {
694 ppc32_isa_t *isa = self;
696 be_gas_emit_decls(isa->arch_env.main_env, 1);
697 be_gas_emit_switch_section(GAS_SECTION_DATA);
698 ppc32_dump_indirect_symbols(isa);
701 del_pset(isa->symbol_set);
708 static unsigned ppc32_get_n_reg_class(const void *self) {
713 static const arch_register_class_t *ppc32_get_reg_class(const void *self,
716 assert(i < N_CLASSES && "Invalid ppc register class requested.");
717 return &ppc32_reg_classes[i];
723 * Get the register class which shall be used to store a value of a given mode.
724 * @param self The this pointer.
725 * @param mode The mode in question.
726 * @return A register class which can hold values of the given mode.
728 const arch_register_class_t *ppc32_get_reg_class_for_mode(const void *self, const ir_mode *mode) {
730 if (mode_is_float(mode))
731 return &ppc32_reg_classes[CLASS_ppc32_fp];
733 return &ppc32_reg_classes[CLASS_ppc32_gp];
738 * Get the ABI restrictions for procedure calls.
739 * @param self The this pointer.
740 * @param method_type The type of the method (procedure) in question.
741 * @param abi The abi object to be modified
743 static void ppc32_get_call_abi(const void *self, ir_type *method_type, be_abi_call_t *abi) {
746 int i, n = get_method_n_params(method_type);
747 int stackoffs = 0, lastoffs = 0, stackparamsize;
752 const arch_register_t *reg;
753 be_abi_call_flags_t call_flags = { { 0, 0, 1, 0, 0, 0, 1 } };
756 if(get_type_visibility(method_type)!=visibility_external_allocated)
757 call_flags.bits.call_has_imm = 1;
759 /* set stack parameter passing style */
760 be_abi_call_set_flags(abi, call_flags, &ppc32_abi_callbacks);
762 for (i = 0; i < n; i++) {
763 tp = get_method_param_type(method_type, i);
764 mode = get_type_mode(tp);
765 if(is_atomic_type(tp))
767 if(mode_is_float(mode))
769 if(fpregi <= REG_F13)
771 if(get_mode_size_bits(mode) == 32) gpregi++, stackparamsize=4;
772 else gpregi += 2, stackparamsize=8; // mode == irm_D
773 reg = &ppc32_fp_regs[fpregi++];
777 if(get_mode_size_bits(mode) == 32) stackparamsize=4;
778 else stackparamsize=8; // mode == irm_D
784 if(gpregi <= REG_R10)
785 reg = &ppc32_gp_regs[gpregi++];
792 be_abi_call_param_reg(abi, i, reg);
795 be_abi_call_param_stack(abi, i, mode, 4, stackoffs - lastoffs, 0);
796 lastoffs = stackoffs+stackparamsize;
798 stackoffs += stackparamsize;
802 be_abi_call_param_stack(abi, i, mode, 4, stackoffs - lastoffs, 0);
803 stackoffs += (get_type_size_bytes(tp)+3) & -4;
804 lastoffs = stackoffs;
808 /* explain where result can be found if any */
809 if (get_method_n_ress(method_type) > 0) {
810 tp = get_method_res_type(method_type, 0);
811 mode = get_type_mode(tp);
813 be_abi_call_res_reg(abi, 0,
814 mode_is_float(mode) ? &ppc32_fp_regs[REG_F1] : &ppc32_gp_regs[REG_R3]);
818 int ppc32_to_appear_in_schedule(void *block_env, const ir_node *irn) {
820 if(!is_ppc32_irn(irn))
827 * Initializes the code generator interface.
829 static const arch_code_generator_if_t *ppc32_get_code_generator_if(void *self) {
831 return &ppc32_code_gen_if;
834 list_sched_selector_t ppc32_sched_selector;
837 * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
839 static const list_sched_selector_t *ppc32_get_list_sched_selector(const void *self, list_sched_selector_t *selector) {
842 ppc32_sched_selector = trivial_selector;
843 ppc32_sched_selector.to_appear_in_schedule = ppc32_to_appear_in_schedule;
844 return &ppc32_sched_selector;
847 static const ilp_sched_selector_t *ppc32_get_ilp_sched_selector(const void *self) {
853 * Returns the necessary byte alignment for storing a register of given class.
855 static int ppc32_get_reg_class_alignment(const void *self, const arch_register_class_t *cls) {
856 ir_mode *mode = arch_register_class_mode(cls);
859 return get_mode_size_bytes(mode);
862 static const be_execution_unit_t ***ppc32_get_allowed_execution_units(const void *self, const ir_node *irn) {
866 panic("Unimplemented ppc32_get_allowed_execution_units()");
870 static const be_machine_t *ppc32_get_machine(const void *self) {
873 panic("Unimplemented ppc32_get_machine()");
878 * Return irp irgs in the desired order.
880 static ir_graph **ppc32_get_irg_list(const void *self, ir_graph ***irg_list) {
887 * Returns the libFirm configuration parameter for this backend.
889 static const backend_params *ppc32_get_libfirm_params(void) {
890 static backend_params p = {
891 1, /* need dword lowering */
892 0, /* don't support inline assembler yet */
893 0, /* no immediate floating point mode. */
894 NULL, /* no additional opcodes */
895 NULL, /* will be set later */
896 NULL, /* but yet no creator function */
897 NULL, /* context for create_intrinsic_fkt */
898 NULL, /* no if conversion settings */
899 NULL /* no immediate fp mode */
905 static asm_constraint_flags_t ppc32_parse_asm_constraint(const void *self, const char **c)
907 /* no asm support yet */
910 return ASM_CONSTRAINT_FLAG_INVALID;
913 static int ppc32_is_valid_clobber(const void *self, const char *clobber)
915 /* no asm support yet */
921 const arch_isa_if_t ppc32_isa_if = {
924 ppc32_get_n_reg_class,
926 ppc32_get_reg_class_for_mode,
928 ppc32_get_code_generator_if,
929 ppc32_get_list_sched_selector,
930 ppc32_get_ilp_sched_selector,
931 ppc32_get_reg_class_alignment,
932 ppc32_get_libfirm_params,
933 ppc32_get_allowed_execution_units,
936 NULL, /* mark remat */
937 ppc32_parse_asm_constraint,
938 ppc32_is_valid_clobber
941 void be_init_arch_ppc32(void)
943 be_register_isa_if("ppc32", &ppc32_isa_if);
946 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_ppc32);