2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The main ppc backend driver file.
23 * @author Moritz Kroll, Jens Mueller
28 #include "pseudo_irg.h"
40 #include "../bearch_t.h" /* the general register allocator interface */
41 #include "../benode_t.h"
42 #include "../belower.h"
43 #include "../besched_t.h"
46 #include "../bemachine.h"
47 #include "../bemodule.h"
48 #include "../bespillslots.h"
49 #include "../beblocksched.h"
50 #include "../beirg_t.h"
51 #include "../begnuas.h"
55 #include "bearch_ppc32_t.h"
57 #include "ppc32_new_nodes.h" /* ppc nodes interface */
58 #include "gen_ppc32_regalloc_if.h" /* the generated interface (register type and class defenitions) */
59 #include "ppc32_transform.h"
60 #include "ppc32_transform_conv.h"
61 #include "ppc32_emitter.h"
62 #include "ppc32_map_regs.h"
64 #define DEBUG_MODULE "firm.be.ppc.isa"
68 /* TODO: ugly, but we need it to get access to the registers assigned to Phi nodes */
69 static set *cur_reg_set = NULL;
71 /**************************************************
74 * _ __ ___ __ _ __ _| | | ___ ___ _| |_
75 * | '__/ _ \/ _` | / _` | | |/ _ \ / __| | | _|
76 * | | | __/ (_| | | (_| | | | (_) | (__ | | |
77 * |_| \___|\__, | \__,_|_|_|\___/ \___| |_|_|
80 **************************************************/
83 * Return register requirements for a ppc node.
84 * If the node returns a tuple (mode_T) then the proj's
85 * will be asked for this information.
87 static const arch_register_req_t *ppc32_get_irn_reg_req(const ir_node *irn,
90 long node_pos = pos == -1 ? 0 : pos;
91 ir_mode *mode = get_irn_mode(irn);
92 FIRM_DBG_REGISTER(firm_dbg_module_t *mod, DEBUG_MODULE);
94 if (is_Block(irn) || mode == mode_X || mode == mode_M) {
95 DBG((mod, LEVEL_1, "ignoring block, mode_X or mode_M node %+F\n", irn));
96 return arch_no_register_req;
99 if (mode == mode_T && pos < 0) {
100 DBG((mod, LEVEL_1, "ignoring request for OUT requirements at %+F", irn));
101 return arch_no_register_req;
104 DBG((mod, LEVEL_1, "get requirements at pos %d for %+F ... ", pos, irn));
107 /* in case of a proj, we need to get the correct OUT slot */
108 /* of the node corresponding to the proj number */
110 node_pos = ppc32_translate_proj_pos(irn);
115 irn = skip_Proj_const(irn);
117 DB((mod, LEVEL_1, "skipping Proj, going to %+F at pos %d ... ", irn, node_pos));
120 /* get requirements for our own nodes */
121 if (is_ppc32_irn(irn)) {
122 const arch_register_req_t *req;
124 req = get_ppc32_in_req(irn, pos);
126 req = get_ppc32_out_req(irn, node_pos);
129 DB((mod, LEVEL_1, "returning reqs for %+F at pos %d\n", irn, pos));
133 /* unknowns should be transformed by now */
134 assert(!is_Unknown(irn));
136 DB((mod, LEVEL_1, "returning NULL for %+F (node not supported)\n", irn));
137 return arch_no_register_req;
140 static void ppc32_set_irn_reg(ir_node *irn, const arch_register_t *reg)
146 if (get_irn_mode(irn) == mode_X) {
150 pos = ppc32_translate_proj_pos(irn);
151 irn = skip_Proj(irn);
154 if (is_ppc32_irn(irn)) {
155 const arch_register_t **slots;
157 slots = get_ppc32_slots(irn);
161 /* here we set the registers for the Phi nodes */
162 ppc32_set_firm_reg(irn, reg, cur_reg_set);
166 static const arch_register_t *ppc32_get_irn_reg(const ir_node *irn)
169 const arch_register_t *reg = NULL;
173 if (get_irn_mode(irn) == mode_X) {
177 pos = ppc32_translate_proj_pos(irn);
178 irn = skip_Proj_const(irn);
181 if (is_ppc32_irn(irn)) {
182 const arch_register_t **slots;
183 slots = get_ppc32_slots(irn);
187 reg = ppc32_get_firm_reg(irn, cur_reg_set);
193 static arch_irn_class_t ppc32_classify(const ir_node *irn)
195 irn = skip_Proj_const(irn);
198 return arch_irn_class_branch;
200 else if (is_ppc32_irn(irn)) {
201 return arch_irn_class_normal;
207 static arch_irn_flags_t ppc32_get_flags(const ir_node *irn)
209 irn = skip_Proj_const(irn);
211 if (is_ppc32_irn(irn)) {
212 return get_ppc32_flags(irn);
214 else if (is_Unknown(irn)) {
215 return arch_irn_flags_ignore;
221 static ir_entity *ppc32_get_frame_entity(const ir_node *irn)
223 if(!is_ppc32_irn(irn)) return NULL;
224 if(get_ppc32_type(irn)!=ppc32_ac_FrameEntity) return NULL;
225 return get_ppc32_frame_entity(irn);
228 static void ppc32_set_frame_entity(ir_node *irn, ir_entity *ent)
230 if (! is_ppc32_irn(irn) || get_ppc32_type(irn) != ppc32_ac_FrameEntity)
232 set_ppc32_frame_entity(irn, ent);
236 * This function is called by the generic backend to correct offsets for
237 * nodes accessing the stack.
239 static void ppc32_set_stack_bias(ir_node *irn, int bias)
241 set_ppc32_offset(irn, bias);
244 static int ppc32_get_sp_bias(const ir_node *irn)
252 const be_abi_call_t *call;
257 * Initialize the callback object.
258 * @param call The call object.
259 * @param aenv The architecture environment.
260 * @param irg The graph with the method.
261 * @return Some pointer. This pointer is passed to all other callback functions as self object.
263 static void *ppc32_abi_init(const be_abi_call_t *call, const arch_env_t *aenv, ir_graph *irg)
265 ppc32_abi_env *env = XMALLOC(ppc32_abi_env);
274 * Destroy the callback object.
275 * @param self The callback object.
277 static void ppc32_abi_done(void *self)
283 * Get the between type for that call.
284 * @param self The callback object.
285 * @return The between type of for that call.
287 static ir_type *ppc32_abi_get_between_type(void *self)
289 static ir_type *between_type = NULL;
290 static ir_entity *old_bp_ent = NULL;
294 ir_entity *ret_addr_ent;
295 ir_type *ret_addr_type = new_type_primitive(new_id_from_str("return_addr"), mode_P);
296 ir_type *old_bp_type = new_type_primitive(new_id_from_str("bp"), mode_P);
298 between_type = new_type_class(new_id_from_str("ppc32_between_type"));
299 old_bp_ent = new_entity(between_type, new_id_from_str("old_bp"), old_bp_type);
300 ret_addr_ent = new_entity(between_type, new_id_from_str("old_bp"), ret_addr_type);
302 set_entity_offset(old_bp_ent, 0);
303 set_entity_offset(ret_addr_ent, get_type_size_bytes(old_bp_type));
304 set_type_size_bytes(between_type, get_type_size_bytes(old_bp_type) + get_type_size_bytes(ret_addr_type));
311 * Put all registers which are saved by the prologue/epilogue in a set.
312 * @param self The callback object.
315 static void ppc32_abi_regs_saved_by_me(void *self, pset *regs)
322 * Generate the prologue.
323 * @param self The callback object.
324 * @param mem A pointer to the mem node. Update this if you define new memory.
325 * @param reg_map A mapping mapping all callee_save/ignore/parameter registers to their defining nodes.
326 * @param stack_bias Points to the current stack bias, can be modified if needed.
328 * @return The register which shall be used as a stack frame base.
330 * All nodes which define registers in @p reg_map must keep @p reg_map current.
332 static const arch_register_t *ppc32_abi_prologue(void *self, ir_node **mem, pmap *reg_map, int *stack_bias)
334 ppc32_abi_env *env = (ppc32_abi_env *) self;
335 be_abi_call_flags_t flags = be_abi_call_get_flags(env->call);
339 isleaf = flags.bits.irg_is_leaf;
341 if (flags.bits.try_omit_fp)
342 return &ppc32_gp_regs[REG_R1];
344 return &ppc32_gp_regs[REG_R31];
348 * Generate the epilogue.
349 * @param self The callback object.
350 * @param mem Memory one can attach to.
351 * @param reg_map A mapping mapping all callee_save/ignore/return registers to their defining nodes.
353 * All nodes which define registers in @p reg_map must keep @p reg_map current.
354 * Also, the @p mem variable must be updated, if memory producing nodes are inserted.
356 static void ppc32_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_map)
364 static const be_abi_callbacks_t ppc32_abi_callbacks = {
367 ppc32_abi_get_between_type,
368 ppc32_abi_regs_saved_by_me,
373 /* fill register allocator interface */
375 static const arch_irn_ops_t ppc32_irn_ops = {
376 ppc32_get_irn_reg_req,
381 ppc32_get_frame_entity,
382 ppc32_set_frame_entity,
383 ppc32_set_stack_bias,
385 NULL, /* get_inverse */
386 NULL, /* get_op_estimated_cost */
387 NULL, /* possible_memory_operand */
388 NULL, /* perform_memory_operand */
391 /**************************************************
394 * ___ ___ __| | ___ __ _ ___ _ __ _| |_
395 * / __/ _ \ / _` |/ _ \/ _` |/ _ \ '_ \ | | _|
396 * | (_| (_) | (_| | __/ (_| | __/ | | | | | |
397 * \___\___/ \__,_|\___|\__, |\___|_| |_| |_|_|
400 **************************************************/
402 static void ppc32_before_abi(void *self) {
403 ppc32_code_gen_t *cg = self;
404 ir_type *frame_type = get_irg_frame_type(cg->irg);
406 frame_alloc_area(frame_type, 24, 4, 1);
408 ppc32_init_conv_walk();
409 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_conv_walk, cg);
412 if(cg->area_size < 32) cg->area_size = 32;
413 cg->area = frame_alloc_area(get_irg_frame_type(cg->irg), cg->area_size+24, 16, 1);
417 static void ppc32_search_start_successor(ir_node *block, void *env) {
418 ppc32_code_gen_t *cg = env;
419 int n = get_Block_n_cfgpreds(block);
420 ir_node *startblock = get_irg_start_block(cg->irg);
421 if(block == startblock) return;
423 for (n--; n >= 0; n--) {
424 ir_node *predblock = get_irn_n(get_Block_cfgpred(block, n), -1);
425 if(predblock == startblock)
427 cg->start_succ_block = block;
434 * Transforms the standard firm graph into
437 static void ppc32_prepare_graph(void *self) {
438 ppc32_code_gen_t *cg = self;
440 irg_block_walk_graph(cg->irg, NULL, ppc32_search_start_successor, cg);
441 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_pretransform_walk, cg);
442 be_dump(cg->irg, "-pretransformed", dump_ir_block_graph);
444 ppc32_register_transformers();
445 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_transform_node, cg);
446 be_dump(cg->irg, "-transformed", dump_ir_block_graph);
447 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_transform_const, cg);
453 * Called immediatly before emit phase.
455 static void ppc32_finish_irg(void *self) {
457 /* TODO: - fix offsets for nodes accessing stack
464 * These are some hooks which must be filled but are probably not needed.
466 static void ppc32_before_sched(void *self) {
468 /* Some stuff you need to do after scheduling but before register allocation */
472 * Called before the register allocator.
473 * Calculate a block schedule here. We need it for the x87
474 * simulator and the emitter.
476 static void ppc32_before_ra(void *self) {
477 ppc32_code_gen_t *cg = self;
478 cg->blk_sched = be_create_block_schedule(cg->irg, cg->birg->exec_freq);
481 static void ppc32_transform_spill(ir_node *node, void *env)
485 if(be_is_Spill(node))
487 ir_node *store, *proj;
488 dbg_info *dbg = get_irn_dbg_info(node);
489 ir_node *block = get_nodes_block(node);
491 const arch_register_class_t *regclass = arch_get_irn_reg_class(node, 1);
493 if (regclass == &ppc32_reg_classes[CLASS_ppc32_gp])
495 store = new_rd_ppc32_Stw(dbg, current_ir_graph, block,
496 get_irn_n(node, 0), get_irn_n(node, 1), new_rd_NoMem(current_ir_graph));
498 else if (regclass == &ppc32_reg_classes[CLASS_ppc32_fp])
500 store = new_rd_ppc32_Stfd(dbg, current_ir_graph, block,
501 get_irn_n(node, 0), get_irn_n(node, 1), new_rd_NoMem(current_ir_graph));
503 else panic("Spill for register class not supported yet!");
505 set_ppc32_frame_entity(store, be_get_frame_entity(node));
507 proj = new_rd_Proj(dbg, current_ir_graph, block, store, mode_M, pn_Store_M);
509 if (sched_is_scheduled(node)) {
510 sched_add_after(sched_prev(node), store);
511 sched_add_after(store, proj);
516 exchange(node, proj);
519 if(be_is_Reload(node))
521 ir_node *load, *proj;
522 const arch_register_t *reg;
523 dbg_info *dbg = get_irn_dbg_info(node);
524 ir_node *block = get_nodes_block(node);
525 ir_mode *mode = get_irn_mode(node);
527 const arch_register_class_t *regclass = arch_get_irn_reg_class(node, -1);
529 if (regclass == &ppc32_reg_classes[CLASS_ppc32_gp])
531 load = new_rd_ppc32_Lwz(dbg, current_ir_graph, block, get_irn_n(node, 0), get_irn_n(node, 1));
533 else if (regclass == &ppc32_reg_classes[CLASS_ppc32_fp])
535 load = new_rd_ppc32_Lfd(dbg, current_ir_graph, block, get_irn_n(node, 0), get_irn_n(node, 1));
537 else panic("Reload for register class not supported yet!");
539 set_ppc32_frame_entity(load, be_get_frame_entity(node));
541 proj = new_rd_Proj(dbg, current_ir_graph, block, load, mode, pn_Load_res);
543 if (sched_is_scheduled(node)) {
544 sched_add_after(sched_prev(node), load);
545 sched_add_after(load, proj);
550 /* copy the register from the old node to the new Load */
551 reg = arch_get_irn_register(node);
552 arch_set_irn_register(load, reg);
554 exchange(node, proj);
559 * Some stuff to do immediately after register allocation
561 static void ppc32_after_ra(void *self) {
562 ppc32_code_gen_t *cg = self;
563 be_coalesce_spillslots(cg->birg);
564 irg_walk_blkwise_graph(cg->irg, NULL, ppc32_transform_spill, NULL);
568 * Emits the code, closes the output file and frees
569 * the code generator interface.
571 static void ppc32_emit_and_done(void *self) {
572 ppc32_code_gen_t *cg = self;
573 ir_graph *irg = cg->irg;
575 dump_ir_block_graph_sched(irg, "-ppc-finished");
576 ppc32_gen_routine(cg, irg);
580 /* de-allocate code generator */
581 del_set(cg->reg_set);
585 int is_direct_entity(ir_entity *ent);
587 static void *ppc32_cg_init(be_irg_t *birg);
589 static const arch_code_generator_if_t ppc32_code_gen_if = {
591 NULL, /* get_pic_base */
595 ppc32_before_sched, /* before scheduling hook */
596 ppc32_before_ra, /* before register allocation hook */
603 * Initializes the code generator.
605 static void *ppc32_cg_init(be_irg_t *birg) {
606 ppc32_isa_t *isa = (ppc32_isa_t *)birg->main_env->arch_env;
607 ppc32_code_gen_t *cg = XMALLOC(ppc32_code_gen_t);
609 cg->impl = &ppc32_code_gen_if;
611 cg->reg_set = new_set(ppc32_cmp_irn_reg_assoc, 1024);
616 cg->start_succ_block = NULL;
617 cg->blk_sched = NULL;
618 FIRM_DBG_REGISTER(cg->mod, "firm.be.ppc.cg");
620 cur_reg_set = cg->reg_set;
622 return (arch_code_generator_t *)cg;
627 /*****************************************************************
628 * ____ _ _ _____ _____
629 * | _ \ | | | | |_ _|/ ____| /\
630 * | |_) | __ _ ___| | _____ _ __ __| | | | | (___ / \
631 * | _ < / _` |/ __| |/ / _ \ '_ \ / _` | | | \___ \ / /\ \
632 * | |_) | (_| | (__| < __/ | | | (_| | _| |_ ____) / ____ \
633 * |____/ \__,_|\___|_|\_\___|_| |_|\__,_| |_____|_____/_/ \_\
635 *****************************************************************/
637 static ppc32_isa_t ppc32_isa_template = {
639 &ppc32_isa_if, /* isa interface */
640 &ppc32_gp_regs[REG_R1], /* stack pointer */
641 &ppc32_gp_regs[REG_R31], /* base pointer */
642 -1, /* stack is decreasing */
643 2, /* power of two stack alignment for calls, 2^2 == 4 */
644 NULL, /* main environment */
646 5, /* reload costs */
648 NULL /* symbol set */
652 * Collects all SymConsts which need to be accessed "indirectly"
654 * @param node the firm node
655 * @param env the symbol set
657 static void ppc32_collect_symconsts_walk(ir_node *node, void *env) {
658 pset *symbol_set = env;
660 if (is_SymConst(node)) {
661 ir_entity *ent = get_SymConst_entity(node);
662 set_entity_backend_marked(ent, 1);
663 if (! is_direct_entity(ent))
664 pset_insert_ptr(symbol_set, ent);
669 * Initializes the backend ISA and opens the output file.
671 static arch_env_t *ppc32_init(FILE *file_handle) {
672 static int inited = 0;
679 isa = XMALLOC(ppc32_isa_t);
680 memcpy(isa, &ppc32_isa_template, sizeof(*isa));
682 be_emit_init(file_handle);
684 ppc32_register_init();
685 ppc32_create_opcodes(&ppc32_irn_ops);
689 isa->symbol_set = pset_new_ptr(8);
690 for (i = 0; i < get_irp_n_irgs(); ++i) {
691 ir_graph *irg = get_irp_irg(i);
692 irg_walk_blkwise_graph(irg, NULL, ppc32_collect_symconsts_walk, isa->symbol_set);
695 /* we mark referenced global entities, so we can only emit those which
696 * are actually referenced. (Note: you mustn't use the type visited flag
697 * elsewhere in the backend)
699 inc_master_type_visited();
701 return &isa->arch_env;
704 static void ppc32_dump_indirect_symbols(ppc32_isa_t *isa) {
707 foreach_pset(isa->symbol_set, ent) {
708 const char *ld_name = get_entity_ld_name(ent);
709 be_emit_irprintf(".non_lazy_symbol_pointer\n%s:\n\t.indirect_symbol _%s\n\t.long 0\n\n", ld_name, ld_name);
710 be_emit_write_line();
715 * Closes the output file and frees the ISA structure.
717 static void ppc32_done(void *self) {
718 ppc32_isa_t *isa = self;
720 be_gas_emit_decls(isa->arch_env.main_env, 1);
721 be_gas_emit_switch_section(GAS_SECTION_DATA);
722 ppc32_dump_indirect_symbols(isa);
725 del_pset(isa->symbol_set);
732 static unsigned ppc32_get_n_reg_class(const void *self) {
737 static const arch_register_class_t *ppc32_get_reg_class(const void *self,
740 assert(i < N_CLASSES && "Invalid ppc register class requested.");
741 return &ppc32_reg_classes[i];
747 * Get the register class which shall be used to store a value of a given mode.
748 * @param self The this pointer.
749 * @param mode The mode in question.
750 * @return A register class which can hold values of the given mode.
752 const arch_register_class_t *ppc32_get_reg_class_for_mode(const void *self, const ir_mode *mode) {
754 if (mode_is_float(mode))
755 return &ppc32_reg_classes[CLASS_ppc32_fp];
757 return &ppc32_reg_classes[CLASS_ppc32_gp];
762 * Get the ABI restrictions for procedure calls.
763 * @param self The this pointer.
764 * @param method_type The type of the method (procedure) in question.
765 * @param abi The abi object to be modified
767 static void ppc32_get_call_abi(const void *self, ir_type *method_type, be_abi_call_t *abi) {
770 int i, n = get_method_n_params(method_type);
771 int stackoffs = 0, lastoffs = 0, stackparamsize;
776 const arch_register_t *reg;
777 be_abi_call_flags_t call_flags = { { 0, 0, 1, 0, 0, 0, 1 } };
780 if(get_type_visibility(method_type)!=visibility_external_allocated)
781 call_flags.bits.call_has_imm = 1;
783 /* set stack parameter passing style */
784 be_abi_call_set_flags(abi, call_flags, &ppc32_abi_callbacks);
786 for (i = 0; i < n; i++) {
787 tp = get_method_param_type(method_type, i);
788 mode = get_type_mode(tp);
789 if(is_atomic_type(tp))
791 if(mode_is_float(mode))
793 if(fpregi <= REG_F13)
795 if(get_mode_size_bits(mode) == 32) gpregi++, stackparamsize=4;
796 else gpregi += 2, stackparamsize=8; // mode == irm_D
797 reg = &ppc32_fp_regs[fpregi++];
801 if(get_mode_size_bits(mode) == 32) stackparamsize=4;
802 else stackparamsize=8; // mode == irm_D
808 if(gpregi <= REG_R10)
809 reg = &ppc32_gp_regs[gpregi++];
816 be_abi_call_param_reg(abi, i, reg);
819 be_abi_call_param_stack(abi, i, mode, 4, stackoffs - lastoffs, 0);
820 lastoffs = stackoffs+stackparamsize;
822 stackoffs += stackparamsize;
826 be_abi_call_param_stack(abi, i, mode, 4, stackoffs - lastoffs, 0);
827 stackoffs += (get_type_size_bytes(tp)+3) & -4;
828 lastoffs = stackoffs;
832 /* explain where result can be found if any */
833 if (get_method_n_ress(method_type) > 0) {
834 tp = get_method_res_type(method_type, 0);
835 mode = get_type_mode(tp);
837 be_abi_call_res_reg(abi, 0,
838 mode_is_float(mode) ? &ppc32_fp_regs[REG_F1] : &ppc32_gp_regs[REG_R3]);
842 int ppc32_to_appear_in_schedule(void *block_env, const ir_node *irn) {
844 if(!is_ppc32_irn(irn))
851 * Initializes the code generator interface.
853 static const arch_code_generator_if_t *ppc32_get_code_generator_if(void *self) {
855 return &ppc32_code_gen_if;
858 list_sched_selector_t ppc32_sched_selector;
861 * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
863 static const list_sched_selector_t *ppc32_get_list_sched_selector(const void *self, list_sched_selector_t *selector) {
866 ppc32_sched_selector = trivial_selector;
867 ppc32_sched_selector.to_appear_in_schedule = ppc32_to_appear_in_schedule;
868 return &ppc32_sched_selector;
871 static const ilp_sched_selector_t *ppc32_get_ilp_sched_selector(const void *self) {
877 * Returns the necessary byte alignment for storing a register of given class.
879 static int ppc32_get_reg_class_alignment(const void *self, const arch_register_class_t *cls) {
880 ir_mode *mode = arch_register_class_mode(cls);
883 return get_mode_size_bytes(mode);
886 static const be_execution_unit_t ***ppc32_get_allowed_execution_units(const void *self, const ir_node *irn) {
890 panic("Unimplemented ppc32_get_allowed_execution_units()");
894 static const be_machine_t *ppc32_get_machine(const void *self) {
897 panic("Unimplemented ppc32_get_machine()");
902 * Return irp irgs in the desired order.
904 static ir_graph **ppc32_get_irg_list(const void *self, ir_graph ***irg_list) {
911 * Returns the libFirm configuration parameter for this backend.
913 static const backend_params *ppc32_get_libfirm_params(void) {
914 static backend_params p = {
915 1, /* need dword lowering */
916 0, /* don't support inline assembler yet */
917 0, /* no immediate floating point mode. */
918 NULL, /* no additional opcodes */
919 NULL, /* will be set later */
920 NULL, /* but yet no creator function */
921 NULL, /* context for create_intrinsic_fkt */
922 NULL, /* no if conversion settings */
923 NULL /* no immediate fp mode */
929 static asm_constraint_flags_t ppc32_parse_asm_constraint(const void *self, const char **c)
931 /* no asm support yet */
934 return ASM_CONSTRAINT_FLAG_INVALID;
937 static int ppc32_is_valid_clobber(const void *self, const char *clobber)
939 /* no asm support yet */
945 const arch_isa_if_t ppc32_isa_if = {
948 ppc32_get_n_reg_class,
950 ppc32_get_reg_class_for_mode,
952 ppc32_get_code_generator_if,
953 ppc32_get_list_sched_selector,
954 ppc32_get_ilp_sched_selector,
955 ppc32_get_reg_class_alignment,
956 ppc32_get_libfirm_params,
957 ppc32_get_allowed_execution_units,
960 NULL, /* mark remat */
961 ppc32_parse_asm_constraint,
962 ppc32_is_valid_clobber
965 void be_init_arch_ppc32(void)
967 be_register_isa_if("ppc32", &ppc32_isa_if);
970 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_ppc32);