1 /* The codegenrator (transform FIRM into mips FIRM */
11 #include "irgraph_t.h"
21 #include "../benode_t.h"
23 #include "../besched.h"
24 #include "../besched_t.h"
25 #include "bearch_mips_t.h"
27 #include "mips_nodes_attr.h"
28 #include "../arch/archop.h" /* we need this for Min and Max nodes */
29 #include "mips_transform.h"
30 #include "mips_new_nodes.h"
31 #include "mips_map_regs.h"
32 #include "mips_util.h"
33 #include "mips_emitter.h"
35 #include "gen_mips_regalloc_if.h"
37 /****************************************************************************************************
39 * | | | | / _| | | (_)
40 * _ __ ___ __| | ___ | |_ _ __ __ _ _ __ ___| |_ ___ _ __ _ __ ___ __ _| |_ _ ___ _ __
41 * | '_ \ / _ \ / _` |/ _ \ | __| '__/ _` | '_ \/ __| _/ _ \| '__| '_ ` _ \ / _` | __| |/ _ \| '_ \
42 * | | | | (_) | (_| | __/ | |_| | | (_| | | | \__ \ || (_) | | | | | | | | (_| | |_| | (_) | | | |
43 * |_| |_|\___/ \__,_|\___| \__|_| \__,_|_| |_|___/_| \___/|_| |_| |_| |_|\__,_|\__|_|\___/|_| |_|
45 ****************************************************************************************************/
47 #define MIPS_GENBINFUNC(mips_nodetype) \
48 static ir_node* mips_gen_##mips_nodetype(mips_transform_env_t *env, ir_node *op1, ir_node *op2) {\
49 ASSERT_NO_FLOAT(env->mode); \
50 /*assert(get_irn_mode(op1) == get_irn_mode(op2));*/ \
51 /*assert(get_irn_mode(op1) == env->mode);*/ \
52 assert(get_mode_size_bits(env->mode) == 32); \
53 return new_rd_mips_##mips_nodetype(env->dbg, env->irg, env->block, op1, op2); \
65 #define MIPS_GENUNFUNC(mips_nodetype) \
66 static ir_node *mips_gen_##mips_nodetype(mips_transform_env_t *env, ir_node *op) { \
67 ASSERT_NO_FLOAT(env->mode); \
68 assert(get_irn_mode(op) == env->mode); \
69 assert(get_mode_size_bits(env->mode) == 32); \
70 return new_rd_mips_##mips_nodetype(env->dbg, env->irg, env->block, op); \
75 static ir_node* mips_get_reg_node(mips_transform_env_t *env, const arch_register_t *reg) {
76 return be_abi_get_callee_save_irn(env->cg->birg->abi, reg);
79 static ir_node* gen_zero_node(mips_transform_env_t *env, dbg_info *ebg, ir_graph *irg, ir_node *block)
81 ir_node *zero = be_abi_get_callee_save_irn(env->cg->birg->abi, &mips_gp_regs[REG_ZERO]);
82 // TODO make zero nodes work
83 //ir_node *unknown = new_rd_mips_zero(dbg, irg, block, mode);
88 static ir_node* gen_node_for_Const(mips_transform_env_t *env, dbg_info *dbg, ir_graph *irg, ir_node *block, ir_node *constant)
90 tarval* tv = get_Const_tarval(constant);
94 ir_mode* mode = get_irn_mode(constant);
95 unsigned long val, lower, upper;
97 val = get_tarval_long(tv);
99 return gen_zero_node(env, dbg, irg, block);
101 lower = val & 0xffff;
102 upper = (val >> 16) & 0xffff;
104 ir_node *zero = gen_zero_node(env, dbg, irg, block);
105 ir_node *lli = new_rd_mips_lli(dbg, irg, block, zero);
106 attr = get_mips_attr(lli);
107 attr->tv = new_tarval_from_long(val, mode);
112 lui = new_rd_mips_lui(dbg, irg, block);
113 attr = get_mips_attr(lui);
114 attr->tv = new_tarval_from_long(val, mode);
119 lli = new_rd_mips_lli(dbg, irg, block, lui);
120 attr = get_mips_attr(lli);
121 attr->tv = new_tarval_from_long(val, mode);
126 static ir_node* exchange_node_for_Const(mips_transform_env_t *env, ir_node* pred, int n) {
127 ir_node *node = env->irn;
128 dbg_info *dbg = get_irn_dbg_info(pred);
129 ir_graph *irg = get_irn_irg(node);
132 if(get_irn_opcode(node) == iro_Phi) {
133 ir_node *phipred = get_nodes_block(node);
134 block = get_Block_cfgpred_block(phipred, n);
136 block = get_nodes_block(node);
139 return gen_node_for_Const(env, dbg, irg, block, pred);
142 static ir_node* gen_node_for_SymConst(mips_transform_env_t *env, ir_node* pred, int n) {
146 ir_node *node = env->irn;
147 dbg_info *dbg = get_irn_dbg_info(pred);
148 ir_graph *irg = get_irn_irg(node);
152 ir_node *phipred = get_nodes_block(node);
153 block = get_Block_cfgpred_block(phipred, n);
155 block = get_nodes_block(node);
158 kind = get_SymConst_kind(pred);
159 if(kind == symconst_addr_ent) {
160 result = new_rd_mips_la(dbg, irg, block);
161 attr = get_mips_attr(result);
162 attr->symconst_id = get_entity_ld_ident(get_SymConst_entity(pred));
164 } else if(kind == symconst_addr_name) {
165 result = new_rd_mips_la(dbg, irg, block);
166 attr = get_mips_attr(result);
167 attr->symconst_id = get_SymConst_name(pred);
177 * Generates a mips node for a firm Load node
179 static ir_node *gen_node_for_Load(mips_transform_env_t *env) {
180 ir_node *node = env->irn;
181 ir_node *result = NULL;
186 ASSERT_NO_FLOAT(get_irn_mode(node));
188 mode = get_Load_mode(node);
189 assert(mode->vector_elem == 1);
190 assert(mode->sort == irms_int_number || mode->sort == irms_reference);
192 load_ptr = get_Load_ptr(node);
193 assert(get_mode_sort(mode) == irms_reference || get_mode_sort(mode) == irms_int_number);
194 result = new_rd_mips_load_r(env->dbg, env->irg, env->block,
195 get_Load_mem(node), load_ptr, get_irn_mode(node));
197 attr = get_mips_attr(result);
198 attr->tv = new_tarval_from_long(0, mode_Iu);
199 attr->modes.load_store_mode = mode;
205 * Generates a mips node for a firm Store node
207 static ir_node *gen_node_for_Store(mips_transform_env_t *env) {
208 ir_node *node = env->irn;
209 ir_node *result = NULL;
214 ASSERT_NO_FLOAT(env->mode);
216 store_ptr = get_Store_ptr(node);
217 mode = get_irn_mode(store_ptr);
218 assert(mode->vector_elem == 1);
219 assert(mode->sort == irms_int_number || mode->sort == irms_reference);
221 if(get_irn_opcode(store_ptr) == iro_SymConst) {
222 result = new_rd_mips_store_i(env->dbg, env->irg, env->block, get_Store_mem(node),
223 get_Store_ptr(node), get_Store_value(node), env->mode);
225 result = new_rd_mips_store_r(env->dbg, env->irg, env->block, get_Store_mem(node),
226 get_Store_ptr(node), get_Store_value(node), env->mode);
228 attr = get_mips_attr(result);
229 attr->tv = new_tarval_from_long(0, mode_Iu);
230 attr->modes.load_store_mode = mode;
235 static ir_node *gen_node_for_div_Proj(mips_transform_env_t *env) {
236 ir_node *proj = env->irn;
238 ir_node *pred = get_irn_n(proj, 0);
242 n = get_Proj_proj(proj);
244 // set the div mode to the DivMod node
245 attr = get_mips_attr(pred);
246 assert(attr->modes.original_mode == NULL || attr->modes.original_mode == env->mode);
247 attr->modes.original_mode = env->mode;
249 // we have to construct a new proj here, to avoid circular refs that
250 // happen when we reuse the old one
251 new_proj = new_ir_node(env->dbg, env->irg, env->block, op_Proj, mode_ANY, 1, &pred);
252 set_Proj_proj(new_proj, n);
254 if(n == pn_DivMod_res_div) {
255 return new_rd_mips_mflo(env->dbg, env->irg, env->block, new_proj);
256 } else if(n == pn_DivMod_res_mod) {
257 return new_rd_mips_mfhi(env->dbg, env->irg, env->block, new_proj);
263 static ir_node *make_jmp_or_fallthrough(mips_transform_env_t *env)
265 const ir_edge_t *edge;
266 ir_node *node = env->irn;
268 int our_block_sched_nr = mips_get_block_sched_nr(get_nodes_block(node));
270 edge = get_irn_out_edge_first(node);
271 next_block = get_edge_src_irn(edge);
273 if(mips_get_sched_block(env->cg, our_block_sched_nr + 1) == next_block) {
274 return new_rd_mips_fallthrough(env->dbg, env->irg, env->block, mode_X);
277 return new_rd_mips_b(env->dbg, env->irg, env->block, mode_X);
280 static ir_node *gen_node_for_Cond_Proj(mips_transform_env_t *env, ir_node* node, int true_false)
282 // we can't use get_Cond_selector here because the selector is already
283 // replaced by a mips_ compare node
284 ir_node *proj = get_Cond_selector(node);
285 ir_node *original_cmp = get_irn_n(proj, 0);
289 dbg_info *dbg = env->dbg;
290 ir_graph *irg = env->irg;
291 ir_node *block = env->block;
294 n = get_Proj_proj(proj);
295 assert(n < 8 && "Only ordered comps supported");
297 assert(get_irn_opcode(original_cmp) == iro_Cmp);
298 op1 = get_Cmp_left(original_cmp);
299 op2 = get_Cmp_right(original_cmp);
306 return make_jmp_or_fallthrough(env);
310 return make_jmp_or_fallthrough(env);
312 condjmp = new_rd_mips_beq(dbg, irg, block, op1, op2, mode_T);
313 return new_rd_Proj(dbg, irg, block, condjmp, mode_X, 1);
317 return make_jmp_or_fallthrough(env);
319 cmp = new_rd_mips_slt(dbg, irg, block, op1, op2);
320 condjmp = new_rd_mips_bgtz(dbg, irg, block, cmp, mode_T);
321 return new_rd_Proj(dbg, irg, block, condjmp, mode_X, 1);
325 return make_jmp_or_fallthrough(env);
327 cmp = new_rd_mips_slt(dbg, irg, block, op2, op1);
328 condjmp = new_rd_mips_blez(dbg, irg, block, cmp, mode_T);
329 return new_rd_Proj(dbg, irg, block, condjmp, mode_X, 1);
333 return make_jmp_or_fallthrough(env);
335 cmp = new_rd_mips_slt(dbg, irg, block, op2, op1);
336 condjmp = new_rd_mips_bgtz(dbg, irg, block, cmp, mode_T);
337 return new_rd_Proj(dbg, irg, block, condjmp, mode_X, 1);
341 return make_jmp_or_fallthrough(env);
343 cmp = new_rd_mips_slt(dbg, irg, block, op1, op2);
344 condjmp = new_rd_mips_blez(dbg, irg, block, cmp, mode_T);
345 return new_rd_Proj(dbg, irg, block, condjmp, mode_X, 1);
349 return make_jmp_or_fallthrough(env);
351 condjmp = new_rd_mips_bne(dbg, irg, block, op1, op2, mode_T);
352 return new_rd_Proj(dbg, irg, block, condjmp, mode_X, 1);
358 return make_jmp_or_fallthrough(env);
367 static ir_node *gen_node_for_Proj(mips_transform_env_t *env)
369 ir_node *proj = env->irn;
371 ir_node *predecessor = get_Proj_pred(proj);
373 // all DivMods, Div, Mod should be replaced by now
374 assert(get_irn_opcode(predecessor) != iro_DivMod);
375 assert(get_irn_opcode(predecessor) != iro_Div);
376 assert(get_irn_opcode(predecessor) != iro_Mod);
378 if(is_mips_div(predecessor))
379 return gen_node_for_div_Proj(env);
381 if(get_irn_opcode(predecessor) == iro_Cond) {
382 ir_node *selector = get_Cond_selector(predecessor);
383 ir_mode *mode = get_irn_mode(selector);
384 n = get_Proj_proj(proj);
386 if(get_mode_sort(mode) == irms_internal_boolean) {
387 assert(n == pn_Cond_true || n == pn_Cond_false);
388 return gen_node_for_Cond_Proj(env, predecessor, n == pn_Cond_true);
395 static ir_node *gen_node_for_Cond(mips_transform_env_t *env)
397 ir_node *selector = get_Cond_selector(env->irn);
398 ir_mode *selector_mode = get_irn_mode(selector);
399 ir_node *node = env->irn;
400 dbg_info *dbg = env->dbg;
401 ir_graph *irg = env->irg;
402 ir_node *block = env->block;
403 ir_node *sub, *sltu, *minval_const, *max_const, *switchjmp;
404 ir_node *defaultproj, *defaultproj_succ;
406 long pn, minval, maxval, defaultprojn;
407 const ir_edge_t *edge;
408 ir_node *zero, *two_const, *add, *la, *load, *proj;
409 ir_mode *unsigned_mode;
412 // mode_b conds are handled by gen_node_for_Proj
413 if(get_mode_sort(selector_mode) != irms_int_number)
416 assert(get_mode_size_bits(selector_mode) == 32);
419 defaultprojn = get_Cond_defaultProj(node);
421 // go over all projs to find min-&maxval of the switch
424 foreach_out_edge(node, edge) {
425 ir_node* proj = get_edge_src_irn(edge);
426 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
428 pn = get_Proj_proj(proj);
429 if(pn == defaultprojn) {
439 assert(defaultproj != NULL);
441 // subtract minval from the switch value
444 minval_const = new_rd_Const(dbg, irg, block, selector_mode, new_tarval_from_long(minval, selector_mode));
445 minval_const = gen_node_for_Const(env, dbg, irg, block, minval_const);
446 sub = new_rd_mips_sub(dbg, irg, block, selector, minval_const);
451 // compare if we're above maxval-minval or below zero.
452 // we can do this with 1 compare because we use unsigned mode
453 unsigned_mode = new_ir_mode(get_mode_name(selector_mode),
454 get_mode_sort(selector_mode), get_mode_size_bits(selector_mode),
455 0, get_mode_arithmetic(selector_mode), get_mode_modulo_shift(selector_mode));
457 max_const = new_rd_Const(dbg, irg, block, unsigned_mode, new_tarval_from_long(maxval - minval + 1, unsigned_mode));
458 max_const = gen_node_for_Const(env, dbg, irg, block, max_const);
459 sltu = new_rd_mips_slt(dbg, irg, block, sub, max_const);
461 zero = gen_zero_node(env, dbg, irg, block);
462 beq = new_rd_mips_beq(dbg, irg, block, sltu, zero, mode_T);
464 // attach defaultproj to beq now
465 set_irn_n(defaultproj, 0, beq);
466 set_Proj_proj(defaultproj, 1);
468 two_const = new_rd_Const(dbg, irg, block, unsigned_mode, new_tarval_from_long(2, unsigned_mode));
469 two_const = gen_node_for_Const(env, dbg, irg, block, two_const);
470 sl = new_rd_mips_sl(dbg, irg, block, sub, two_const);
472 la = new_rd_mips_la(dbg, irg, block);
473 add = new_rd_mips_addu(dbg, irg, block, sl, la);
474 load = new_rd_mips_load_r(dbg, irg, block, new_rd_NoMem(irg), add, mode_T);
475 attr = get_mips_attr(load);
476 attr->modes.load_store_mode = mode_Iu;
477 attr->tv = new_tarval_from_long(0, mode_Iu);
479 proj = new_rd_Proj(dbg, irg, block, load, mode_Iu, pn_Load_res);
481 switchjmp = new_rd_mips_SwitchJump(dbg, irg, block, proj, mode_T);
482 attr = get_mips_attr(switchjmp);
483 attr->switch_default_pn = defaultprojn;
485 edge = get_irn_out_edge_first(defaultproj);
486 defaultproj_succ = get_edge_src_irn(edge);
487 attr->symconst_id = new_id_from_str(mips_get_block_label(defaultproj_succ));
489 attr = get_mips_attr(la);
490 attr->symconst_id = new_id_from_str(mips_get_jumptbl_label(switchjmp));
495 static ir_node *create_conv_store_load(mips_transform_env_t *env, ir_mode* srcmode, ir_mode* dstmode) {
496 ir_node *nomem, *store, *mem_proj, *value_proj, *load;
497 ir_entity *mem_entity;
498 ir_node *node = env->irn;
499 ir_node *pred = get_Conv_op(node);
501 // TODO HACK make this global...
504 ir_type *ptr_i32type;
507 id = new_id_from_str("__conv0");
508 i32type = new_type_primitive(new_id_from_str("ptr32"), mode_Iu);
509 ptr_i32type = new_d_type_pointer(id, i32type, mode_P, env->dbg);
510 mem_entity = new_d_entity(get_irg_frame_type(env->irg), id, ptr_i32type, env->dbg);
512 sp = mips_get_reg_node(env, &mips_gp_regs[REG_SP]);
513 nomem = new_ir_node(env->dbg, env->irg, env->block, op_NoMem, mode_M, 0, NULL);
515 store = new_rd_mips_store_r(env->dbg, env->irg, env->block, nomem, sp, pred, mode_T);
516 attr = get_mips_attr(store);
517 attr->tv = new_tarval_from_long(0, mode_Iu);
518 attr->modes.load_store_mode = srcmode;
519 attr->stack_entity = mem_entity;
521 mem_proj = new_ir_node(env->dbg, env->irg, env->block, op_Proj, mode_M, 1, &store);
522 set_Proj_proj(mem_proj, pn_Store_M);
524 load = new_rd_mips_load_r(env->dbg, env->irg, env->block, mem_proj, sp, mode_T);
525 attr = get_mips_attr(load);
526 attr->tv = new_tarval_from_long(0, mode_Iu);
527 attr->modes.load_store_mode = dstmode;
528 attr->stack_entity = mem_entity;
530 value_proj = new_ir_node(env->dbg, env->irg, env->block, op_Proj, env->mode, 1, &load);
531 set_Proj_proj(value_proj, pn_Load_res);
536 static ir_node *create_conv_and(mips_transform_env_t *env, long immediate) {
537 ir_node *node = env->irn;
542 pred = get_Conv_op(node);
543 result = new_rd_mips_andi(env->dbg, env->irg, env->block, pred);
544 attr = get_mips_attr(result);
545 attr->tv = new_tarval_from_long(immediate, mode_Iu);
550 static ir_node *gen_node_for_Conv(mips_transform_env_t *env) {
551 ir_node *node = env->irn;
555 int dst_size, src_size;
557 pred = get_Conv_op(node);
558 srcmode = get_irn_mode(pred);
559 destmode = get_irn_mode(node);
561 dst_size = get_mode_size_bits(destmode);
562 src_size = get_mode_size_bits(srcmode);
564 if(srcmode->size >= destmode->size) {
565 assert(srcmode->size > destmode->size || srcmode->sign != destmode->sign);
566 return new_rd_mips_reinterpret_conv(env->dbg, env->irg, env->block, pred);
569 if(srcmode->size == 8) {
570 return create_conv_store_load(env, mode_Bs, mode_Bs);
571 } else if(srcmode->size == 16) {
572 return create_conv_store_load(env, mode_Hs, mode_Hs);
576 return create_conv_and(env, 0xff);
577 } else if(src_size == 16) {
578 return create_conv_and(env, 0xffff);
586 static ir_node *gen_node_mips_div(mips_transform_env_t *env, ir_node* op1, ir_node* op2, long p_div, long p_mod,
589 ir_node *node = env->irn;
591 const ir_edge_t *edge;
592 ir_mode *mode = get_irn_mode(node);
594 if(mode_is_signed(mode)) {
595 div = new_rd_mips_div(env->dbg, env->irg, env->block, op1, op2);
597 div = new_rd_mips_divu(env->dbg, env->irg, env->block, op1, op2);
601 foreach_out_edge(node, edge) {
602 ir_node *proj = get_edge_src_irn(edge);
603 long n = get_Proj_proj(proj);
604 assert(is_Proj(proj) && "non-Proj from Mod node");
606 set_Proj_proj(proj, pn_DivMod_res_div);
607 } else if (n == p_mod) {
608 set_Proj_proj(proj, pn_DivMod_res_mod);
609 } else if(n == p_m) {
610 set_Proj_proj(proj, pn_DivMod_M);
611 } else if(n == p_x) {
612 set_Proj_proj(proj, pn_DivMod_X_except);
614 assert(!"invalid proj");
621 static ir_node *gen_node_for_DivMod(mips_transform_env_t *env) {
622 ir_node *node = env->irn;
624 return gen_node_mips_div(env, get_DivMod_left(node), get_DivMod_right(node), pn_DivMod_res_div,
625 pn_DivMod_res_mod, pn_DivMod_M, pn_DivMod_X_except);
628 static ir_node *gen_node_for_Div(mips_transform_env_t *env) {
629 ir_node *node = env->irn;
631 return gen_node_mips_div(env, get_Div_left(node), get_Div_right(node), pn_Div_res, -1,
632 pn_Div_M, pn_Div_X_except);
635 static ir_node *gen_node_for_Mod(mips_transform_env_t *env) {
636 ir_node *node = env->irn;
638 return gen_node_mips_div(env, get_Mod_left(node), get_Mod_right(node), -1, pn_Mod_res,
639 pn_Mod_M, pn_Mod_X_except);
642 static ir_node *gen_node_for_Mul(mips_transform_env_t *env) {
643 ir_node *node = env->irn;
647 ir_mode *mode = get_irn_mode(node);
649 op1 = get_Mul_left(node);
650 op2 = get_Mul_right(node);
652 assert(get_mode_size_bits(env->mode) == 32);
653 assert(get_mode_size_bits(get_irn_mode(op1)) == get_mode_size_bits(env->mode));
654 assert(get_mode_size_bits(get_irn_mode(op2)) == get_mode_size_bits(env->mode));
656 if(mode_is_signed(mode)) {
657 mul = new_rd_mips_mult(env->dbg, env->irg, env->block, get_Mul_left(node), get_Mul_right(node));
659 mul = new_rd_mips_multu(env->dbg, env->irg, env->block, get_Mul_left(node), get_Mul_right(node));
661 mflo = new_rd_mips_mflo(env->dbg, env->irg, env->block, mul);
666 static ir_node *gen_node_for_IJmp(mips_transform_env_t *env) {
667 ir_node *node = env->irn;
669 return new_rd_mips_j(env->dbg, env->irg, env->block, get_IJmp_target(node), node->mode);
672 static ir_node *gen_node_for_Jmp(mips_transform_env_t *env) {
673 return make_jmp_or_fallthrough(env);
676 static ir_node *gen_node_for_Abs(mips_transform_env_t *env) {
677 ir_node *node = env->irn;
678 ir_node *sra, *add, *xor;
681 // TODO for other bit sizes...
682 assert(get_mode_size_bits(env->mode) == 32);
683 sra = new_rd_mips_srai(env->dbg, env->irg, env->block, get_Abs_op(node));
684 attr = get_mips_attr(sra);
685 attr->tv = new_tarval_from_long(31, mode_Iu);
686 add = new_rd_mips_addu(env->dbg, env->irg, env->block, get_Abs_op(node), sra);
687 xor = new_rd_mips_xor(env->dbg, env->irg, env->block, sra, add);
692 static ir_node *gen_node_for_Rot(mips_transform_env_t *env) {
693 ir_node *node = env->irn;
694 ir_node *subu, *srlv, *sllv, *or;
696 subu = new_rd_mips_subuzero(env->dbg, env->irg, env->block, get_Rot_right(node));
697 srlv = new_rd_mips_srlv(env->dbg, env->irg, env->block, get_Rot_left(node), subu);
698 sllv = new_rd_mips_sllv(env->dbg, env->irg, env->block, get_Rot_left(node), get_Rot_right(node));
699 or = new_rd_mips_or(env->dbg, env->irg, env->block, sllv, srlv);
704 static ir_node *gen_node_for_Unknown(mips_transform_env_t *env)
706 return gen_zero_node(env, env->dbg, env->irg, env->block);
710 * lower a copyB into standard Firm assembler :-)
712 ir_node *gen_code_for_CopyB(ir_node *block, ir_node *node) {
714 ir_node *dst = get_CopyB_dst(node);
715 ir_node *src = get_CopyB_src(node);
716 ir_type *type = get_CopyB_type(node);
717 ir_node *mem = get_CopyB_mem(node);
719 ir_node *result = NULL;
720 int size = get_type_size_bytes(type);
721 dbg_info *dbg = get_irn_dbg_info(node);
722 ir_graph *irg = get_irn_irg(block);
727 ir_node *phi, *projT, *projF, *cmp, *proj, *cond, *jmp, *in[2];
728 ir_node *new_bl, *src_phi, *dst_phi, *mem_phi, *add;
729 ir_mode *p_mode = get_irn_mode(src);
732 /* build the control loop */
733 in[0] = in[1] = new_r_Unknown(irg, mode_X);
735 new_bl = new_r_Block(irg, 2, in);
737 in[0] = cnt = new_Const_long(mode_Is, (size >> 4));
738 in[1] = new_r_Unknown(irg, mode_Is);
739 phi = new_r_Phi(irg, new_bl, 2, in, mode_Is);
741 sub = new_rd_Sub(dbg, irg, new_bl, phi, new_Const_long(mode_Is, -1), mode_Is);
742 set_Phi_pred(phi, 1, sub);
744 cmp = new_rd_Cmp(dbg, irg, new_bl, sub, new_Const_long(mode_Is, 0));
745 proj = new_r_Proj(irg, new_bl, cmp, mode_b, pn_Cmp_Lg);
746 cond = new_rd_Cond(dbg, irg, new_bl, proj);
748 projT = new_r_Proj(irg, new_bl, cond, mode_X, pn_Cond_true);
749 projF = new_r_Proj(irg, new_bl, cond, mode_X, pn_Cond_false);
751 jmp = get_Block_cfgpred(block, 0);
752 set_Block_cfgpred(block, 0, projF);
754 set_Block_cfgpred(new_bl, 0, jmp);
755 set_Block_cfgpred(new_bl, 1, projT);
761 in[1] = new_r_Unknown(irg, p_mode);
762 src_phi = new_r_Phi(irg, new_bl, 2, in, p_mode);
765 dst_phi = new_r_Phi(irg, new_bl, 2, in, p_mode);
767 add = new_rd_Add(dbg, irg, new_bl, src_phi, new_Const_long(mode_Is, 16), p_mode);
768 set_Phi_pred(src_phi, 1, add);
769 add = new_rd_Add(dbg, irg, new_bl, dst_phi, new_Const_long(mode_Is, 16), p_mode);
770 set_Phi_pred(dst_phi, 1, add);
773 in[1] = new_r_Unknown(irg, mode_M);
774 mem_phi = new_r_Phi(irg, new_bl, 2, in, mode_M);
779 /* create 4 parallel loads */
780 for (i = 0; i < 4; ++i) {
783 load = new_rd_mips_load_r(dbg, irg, new_bl, mem_phi, src, mode_T);
784 attr = get_mips_attr(load);
785 attr->modes.load_store_mode = mode_Iu;
786 attr->tv = new_tarval_from_long(i * 4, mode_Iu);
788 ld[i] = new_rd_Proj(dbg, irg, new_bl, load, mode_Iu, pn_Load_res);
791 /* create 4 parallel stores */
792 for (i = 0; i < 4; ++i) {
795 store = new_rd_mips_store_r(dbg, irg, new_bl, mem_phi, dst, ld[i], mode_T);
796 attr = get_mips_attr(store);
797 attr->modes.load_store_mode = mode_Iu;
798 attr->tv = new_tarval_from_long(i * 4, mode_Iu);
800 mm[i] = new_rd_Proj(dbg, irg, new_bl, store, mode_M, pn_Store_M);
802 mem = new_r_Sync(irg, new_bl, 4, mm);
804 set_Phi_pred(mem_phi, 1, mem);
807 // output store/loads manually
809 for(i = size; i > 0; ) {
811 ir_node *load, *store, *projv;
812 int offset = size - i;
824 load = new_rd_mips_load_r(dbg, irg, block, mem, src, mode_T);
825 attr = get_mips_attr(load);
826 attr->modes.load_store_mode = mode;
827 attr->tv = new_tarval_from_long(offset, mode_Iu);
829 projv = new_rd_Proj(dbg, irg, block, load, mode, pn_Load_res);
831 store = new_rd_mips_store_r(dbg, irg, block, mem, dst, projv, mode_T);
832 attr = get_mips_attr(store);
833 attr->modes.load_store_mode = mode;
834 attr->tv = new_tarval_from_long(offset, mode_Iu);
836 mm[n] = new_rd_Proj(dbg, irg, block, store, mode_M, pn_Store_M);
841 result = new_r_Sync(irg, block, n, mm);
849 static void mips_fix_CopyB_Proj(mips_transform_env_t* env) {
850 ir_node *node = env->irn;
851 long n = get_Proj_proj(node);
853 if(n == pn_CopyB_M_except) {
855 } else if(n == pn_CopyB_M_regular) {
856 set_Proj_proj(node, pn_Store_M);
857 } else if(n == pn_CopyB_M_except) {
858 set_Proj_proj(node, pn_Store_X_except);
862 static void mips_transform_Spill(mips_transform_env_t* env) {
863 ir_node *node = env->irn;
864 ir_node *sched_point = NULL;
865 ir_node *store, *proj;
866 ir_node *nomem = new_rd_NoMem(env->irg);
867 ir_node *ptr = get_irn_n(node, 0);
868 ir_node *val = get_irn_n(node, 1);
869 ir_entity *ent = be_get_frame_entity(node);
872 if(sched_is_scheduled(node)) {
873 sched_point = sched_prev(node);
876 store = new_rd_mips_store_r(env->dbg, env->irg, env->block, nomem, ptr, val, mode_T);
877 attr = get_mips_attr(store);
878 attr->stack_entity = ent;
879 attr->modes.load_store_mode = get_irn_mode(val);
881 proj = new_rd_Proj(env->dbg, env->irg, env->block, store, mode_M, pn_Store_M);
884 sched_add_after(sched_point, store);
885 sched_add_after(store, proj);
890 exchange(node, proj);
893 static void mips_transform_Reload(mips_transform_env_t* env) {
894 ir_node *node = env->irn;
895 ir_node *sched_point = NULL;
896 ir_node *load, *proj;
897 ir_node *ptr = get_irn_n(node, 0);
898 ir_node *mem = get_irn_n(node, 1);
899 ir_mode *mode = get_irn_mode(node);
900 ir_entity *ent = be_get_frame_entity(node);
901 const arch_register_t* reg;
904 if(sched_is_scheduled(node)) {
905 sched_point = sched_prev(node);
908 load = new_rd_mips_load_r(env->dbg, env->irg, env->block, mem, ptr, mode_T);
909 attr = get_mips_attr(load);
910 attr->stack_entity = ent;
911 attr->modes.load_store_mode = mode;
913 proj = new_rd_Proj(env->dbg, env->irg, env->block, load, mode, pn_Load_res);
916 sched_add_after(sched_point, load);
917 sched_add_after(load, proj);
922 /* copy the register from the old node to the new Load */
923 reg = arch_get_irn_register(env->cg->arch_env, node);
924 arch_set_irn_register(env->cg->arch_env, proj, reg);
926 exchange(node, proj);
929 static ir_node *gen_node_for_StackParam(mips_transform_env_t *env)
931 ir_node *node = env->irn;
932 ir_node *sp = get_irn_n(node, 0);
934 ir_node *nomem = new_rd_NoMem(env->irg);
938 load = new_rd_mips_load_r(env->dbg, env->irg, env->block, nomem, sp, mode_T);
939 attr = get_mips_attr(load);
940 attr->stack_entity = be_get_frame_entity(node);
941 attr->modes.load_store_mode = env->mode;
943 proj = new_rd_Proj(env->dbg, env->irg, env->block, load, env->mode, pn_Load_res);
948 static ir_node *gen_node_for_AddSP(mips_transform_env_t *env)
950 ir_node *node = env->irn;
953 const arch_register_t *reg;
955 op1 = get_irn_n(node, 0);
956 op2 = get_irn_n(node, 1);
958 add = new_rd_mips_addu(env->dbg, env->irg, env->block, op1, op2);
960 /* copy the register requirements from the old node to the new node */
961 reg = arch_get_irn_register(env->cg->arch_env, node);
962 arch_set_irn_register(env->cg->arch_env, add, reg);
967 /*********************************************************
970 * _ __ ___ __ _ _ _ __ __| |_ __ ___ _____ _ __
971 * | '_ ` _ \ / _` | | '_ \ / _` | '__| \ \ / / _ \ '__|
972 * | | | | | | (_| | | | | | | (_| | | | |\ V / __/ |
973 * |_| |_| |_|\__,_|_|_| |_| \__,_|_| |_| \_/ \___|_|
975 *********************************************************/
979 * Transforms the given firm node (and maybe some other related nodes)
980 * into one or more assembler nodes.
982 * @param node the firm node
983 * @param env the debug module
985 void mips_transform_node(ir_node *node, void *env) {
986 mips_code_gen_t *cgenv = (mips_code_gen_t *)env;
987 ir_opcode code = get_irn_opcode(node);
988 ir_node *asm_node = node;
989 mips_transform_env_t tenv;
994 tenv.block = get_nodes_block(node);
995 tenv.dbg = get_irn_dbg_info(node);
996 tenv.irg = current_ir_graph;
998 DEBUG_ONLY(tenv.mod = cgenv->mod;)
999 tenv.mode = get_irn_mode(node);
1002 #define UNOP(firm_opcode, mips_nodetype) case iro_##firm_opcode: asm_node = mips_gen_##mips_nodetype(&tenv, get_##firm_opcode##_op(node)); break
1003 #define BINOP(firm_opcode, mips_nodetype) case iro_##firm_opcode: asm_node = mips_gen_##mips_nodetype(&tenv, get_##firm_opcode##_left(node), get_##firm_opcode##_right(node)); break
1004 #define IGN(a) case iro_##a: break
1005 #define BAD(a) case iro_##a: goto bad
1007 DBG((tenv.mod, LEVEL_1, "check %+F ... ", node));
1021 asm_node = gen_node_for_Abs(&tenv);
1025 asm_node = gen_node_for_Rot(&tenv);
1029 asm_node = gen_node_for_Div(&tenv);
1033 asm_node = gen_node_for_Mod(&tenv);
1037 asm_node = gen_node_for_Load(&tenv);
1041 asm_node = gen_node_for_Store(&tenv);
1045 asm_node = gen_node_for_Proj(&tenv);
1049 asm_node = gen_node_for_Conv(&tenv);
1053 asm_node = gen_node_for_DivMod(&tenv);
1057 asm_node = gen_node_for_Mul(&tenv);
1061 asm_node = gen_node_for_Jmp(&tenv);
1065 asm_node = gen_node_for_IJmp(&tenv);
1069 asm_node = gen_node_for_Unknown(&tenv);
1073 asm_node = gen_node_for_Cond(&tenv);
1076 /* TODO: implement these nodes */
1079 /* You probably don't need to handle the following nodes */
1081 // call is handled in the emit phase
1083 // Cmp is handled together with Cond
1113 if(be_is_StackParam(node)) {
1114 asm_node = gen_node_for_StackParam(&tenv);
1115 } else if(be_is_AddSP(node)) {
1116 asm_node = gen_node_for_AddSP(&tenv);
1121 fprintf(stderr, "Not implemented: %s\n", get_irn_opname(node));
1125 if (asm_node != node) {
1126 exchange(node, asm_node);
1127 DB((tenv.mod, LEVEL_1, "created node %+F[%p]\n", asm_node, asm_node));
1129 DB((tenv.mod, LEVEL_1, "ignored\n"));
1133 void mips_pre_transform_node(ir_node *node, void *env) {
1134 mips_code_gen_t *cgenv = (mips_code_gen_t *)env;
1137 mips_transform_env_t tenv;
1142 tenv.block = get_nodes_block(node);
1143 tenv.dbg = get_irn_dbg_info(node);
1144 tenv.irg = current_ir_graph;
1146 DEBUG_ONLY(tenv.mod = cgenv->mod;)
1147 tenv.mode = get_irn_mode(node);
1151 ir_node* pred = get_Proj_pred(node);
1153 if(get_irn_opcode(pred) == iro_CopyB) {
1154 mips_fix_CopyB_Proj(&tenv);
1158 for(i = 0; i < get_irn_arity(node); ++i) {
1159 ir_node* pred = get_irn_n(node, i);
1161 if (is_Const(pred)) {
1162 ir_node* constnode = exchange_node_for_Const(&tenv, pred, i);
1163 set_irn_n(node, i, constnode);
1164 } else if (get_irn_op(pred) == op_SymConst) {
1165 ir_node* constnode = gen_node_for_SymConst(&tenv, pred, i);
1166 set_irn_n(node, i, constnode);
1172 * Calls the transform functions for Spill and Reload.
1174 void mips_after_ra_walker(ir_node *node, void *env) {
1175 mips_code_gen_t *cg = env;
1176 mips_transform_env_t tenv;
1181 tenv.block = get_nodes_block(node);
1182 tenv.dbg = get_irn_dbg_info(node);
1183 tenv.irg = current_ir_graph;
1185 DEBUG_ONLY(tenv.mod = cg->mod;)
1186 tenv.mode = get_irn_mode(node);
1189 /* be_is_StackParam(node) || */
1190 if (be_is_Reload(node)) {
1191 mips_transform_Reload(&tenv);
1192 } else if (be_is_Spill(node)) {
1193 mips_transform_Spill(&tenv);