2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The codegenrator (transform FIRM into mips FIRM
23 * @author Matthias Braun, Mehdi
33 #include "irgraph_t.h"
45 #include "../benode_t.h"
47 #include "../besched.h"
48 #include "../besched_t.h"
49 #include "../beirg_t.h"
50 #include "../betranshlp.h"
51 #include "bearch_mips_t.h"
53 #include "mips_nodes_attr.h"
55 #include "mips_transform.h"
56 #include "mips_new_nodes.h"
57 #include "mips_map_regs.h"
58 #include "mips_util.h"
59 #include "mips_emitter.h"
61 #include "gen_mips_regalloc_if.h"
63 /** hold the current code generator during transformation */
64 static mips_code_gen_t *env_cg = NULL;
66 /****************************************************************************************************
68 * | | | | / _| | | (_)
69 * _ __ ___ __| | ___ | |_ _ __ __ _ _ __ ___| |_ ___ _ __ _ __ ___ __ _| |_ _ ___ _ __
70 * | '_ \ / _ \ / _` |/ _ \ | __| '__/ _` | '_ \/ __| _/ _ \| '__| '_ ` _ \ / _` | __| |/ _ \| '_ \
71 * | | | | (_) | (_| | __/ | |_| | | (_| | | | \__ \ || (_) | | | | | | | | (_| | |_| | (_) | | | |
72 * |_| |_|\___/ \__,_|\___| \__|_| \__,_|_| |_|___/_| \___/|_| |_| |_| |_|\__,_|\__|_|\___/|_| |_|
74 ****************************************************************************************************/
76 typedef ir_node *construct_binop_func(dbg_info *db, ir_graph *irg,
77 ir_node *block, ir_node *left, ir_node *right);
79 static INLINE int mode_needs_gp_reg(ir_mode *mode) {
80 return mode_is_int(mode) || mode_is_reference(mode);
83 ir_node *mips_create_Immediate(long val)
85 ir_graph *irg = current_ir_graph;
86 ir_node *block = get_irg_start_block(irg);
87 const arch_register_t **slots;
90 assert(val >= -32768 && val <= 32767);
91 res = new_rd_mips_Immediate(NULL, irg, block, MIPS_IMM_CONST, NULL,
93 slots = get_mips_slots(res);
94 slots[0] = &mips_gp_regs[REG_GP_NOREG];
99 ir_node* mips_create_zero(void)
101 ir_graph *irg = current_ir_graph;
102 ir_node *block = get_irg_start_block(irg);
103 ir_node *zero = new_rd_mips_zero(NULL, irg, block);
104 const arch_register_t **slots = get_mips_slots(zero);
106 slots[0] = &mips_gp_regs[REG_ZERO];
111 static ir_node *try_create_Immediate(ir_node *node)
120 mode = get_irn_mode(node);
121 if(!mode_needs_gp_reg(mode))
124 tv = get_Const_tarval(node);
125 if(tarval_is_long(tv)) {
126 val = get_tarval_long(tv);
128 ir_fprintf(stderr, "Optimisation Warning: tarval %+F is not a long?\n",
133 if(val < -32768 || val > 32767)
136 return mips_create_Immediate(val);
139 static void create_binop_operands(ir_node **new_left, ir_node **new_right,
140 ir_node *left, ir_node *right,
143 *new_right = try_create_Immediate(right);
144 if(*new_right != NULL) {
145 *new_left = be_transform_node(left);
149 *new_right = try_create_Immediate(left);
150 if(*new_right != NULL) {
151 *new_left = be_transform_node(right);
156 *new_left = be_transform_node(left);
157 *new_right = be_transform_node(right);
160 static ir_node *gen_binop(ir_node *node, ir_node *left, ir_node *right,
161 construct_binop_func func, int supports_immediate)
163 ir_graph *irg = current_ir_graph;
164 dbg_info *dbgi = get_irn_dbg_info(node);
165 ir_node *block = be_transform_node(get_nodes_block(node));
167 ir_node *new_left, *new_right;
169 assert(mode_needs_gp_reg(get_irn_mode(node)));
171 if(supports_immediate) {
172 int is_commutative = is_op_commutative(get_irn_op(node));
173 create_binop_operands(&new_left, &new_right, left, right,
176 new_left = be_transform_node(left);
177 new_right = be_transform_node(right);
180 res = func(dbgi, irg, block, new_left, new_right);
185 static ir_node *gen_Add(ir_node *node)
187 /* TODO: match add(symconst, const) */
188 return gen_binop(node, get_Add_left(node), get_Add_right(node),
189 new_rd_mips_addu, 1);
192 static ir_node *gen_Sub(ir_node *node)
194 return gen_binop(node, get_Sub_left(node), get_Sub_right(node),
195 new_rd_mips_addu, 0);
198 static ir_node *gen_And(ir_node *node)
200 return gen_binop(node, get_Add_left(node), get_Add_right(node),
204 static ir_node *gen_Or(ir_node *node)
206 return gen_binop(node, get_Add_left(node), get_Add_right(node),
210 static ir_node *gen_Eor(ir_node *node)
212 return gen_binop(node, get_Add_left(node), get_Add_right(node),
216 static ir_node *gen_Shl(ir_node *node)
218 return gen_binop(node, get_Add_left(node), get_Add_right(node),
222 static ir_node *gen_Shr(ir_node *node)
224 return gen_binop(node, get_Add_left(node), get_Add_right(node),
228 static ir_node *gen_Shrs(ir_node *node)
230 return gen_binop(node, get_Add_left(node), get_Add_right(node),
234 static ir_node *gen_Not(ir_node *node)
236 ir_graph *irg = current_ir_graph;
237 dbg_info *dbgi = get_irn_dbg_info(node);
238 ir_node *block = be_transform_node(get_nodes_block(node));
239 ir_node *op = get_Not_op(node);
244 /* we can transform not->or to nor */
246 return gen_binop(op, get_Or_left(op), get_Or_right(op),
250 /* construct (op < 1) */
251 one = mips_create_Immediate(1);
252 new_op = be_transform_node(op);
253 res = new_rd_mips_sltu(dbgi, irg, block, new_op, one);
258 static ir_node *gen_Minus(ir_node *node)
260 ir_graph *irg = current_ir_graph;
261 dbg_info *dbgi = get_irn_dbg_info(node);
262 ir_node *block = be_transform_node(get_nodes_block(node));
263 ir_node *op = get_Minus_op(node);
264 ir_node *new_op = be_transform_node(op);
268 /* construct (0 - op) */
269 zero = mips_create_zero();
270 res = new_rd_mips_subu(dbgi, irg, block, zero, new_op);
275 static ir_node *gen_Abs(ir_node *node)
277 ir_graph *irg = current_ir_graph;
278 dbg_info *dbgi = get_irn_dbg_info(node);
279 ir_node *block = be_transform_node(get_nodes_block(node));
280 ir_node *op = get_Abs_op(node);
281 ir_node *new_op = be_transform_node(op);
282 ir_node *sra_const, *sra, *add, *xor;
284 /* TODO: support other bit sizes... */
285 assert(get_mode_size_bits(get_irn_mode(node)) == 32);
286 sra_const = mips_create_Immediate(31);
287 sra = new_rd_mips_sra(dbgi, irg, block, new_op, sra_const);
288 add = new_rd_mips_addu(dbgi, irg, block, new_op, sra);
289 xor = new_rd_mips_xor(dbgi, irg, block, sra, add);
294 static ir_node* gen_Const(ir_node *node)
296 ir_graph *irg = current_ir_graph;
297 dbg_info *dbgi = get_irn_dbg_info(node);
298 ir_node *block = be_transform_node(get_nodes_block(node));
299 tarval *tv = get_Const_tarval(node);
303 unsigned long val, lower, upper;
305 if(tarval_is_long(tv)) {
306 val = get_tarval_long(tv);
308 panic("Can't get value of tarval %+F", node);
311 val = get_tarval_long(tv);
313 lower = val & 0xffff;
314 upper = (val >> 16) & 0xffff;
316 upper_node = mips_create_zero();
318 upper_node = new_rd_mips_lui(dbgi, irg, block, MIPS_IMM_CONST, NULL,
325 or_const = mips_create_Immediate(lower);
326 lower_node = new_rd_mips_or(dbgi, irg, block, upper_node, or_const);
331 static ir_node* gen_SymConst(ir_node *node)
333 ir_graph *irg = current_ir_graph;
334 dbg_info *dbgi = get_irn_dbg_info(node);
335 ir_node *block = be_transform_node(get_nodes_block(node));
337 const arch_register_t **slots;
338 ir_node *lui, *or_const, *or;
340 if(get_SymConst_kind(node) != symconst_addr_ent) {
341 panic("Only address entity symconsts supported in mips backend");
344 entity = get_SymConst_entity(node);
346 lui = new_rd_mips_lui(dbgi, irg, block, MIPS_IMM_SYMCONST_HI,
348 or_const = new_rd_mips_Immediate(dbgi, irg, block,
349 MIPS_IMM_SYMCONST_LO, entity, 0);
350 or = new_rd_mips_or(dbgi, irg, block, lui, or_const);
352 slots = get_mips_slots(or_const);
353 slots[0] = &mips_gp_regs[REG_GP_NOREG];
358 typedef ir_node* (*gen_load_func) (dbg_info *dbg, ir_graph *irg,
359 ir_node *block, ir_node *ptr, ir_node *mem,
360 ir_entity *entity, long offset);
363 * Generates a mips node for a firm Load node
365 static ir_node *gen_Load(ir_node *node)
367 ir_graph *irg = current_ir_graph;
368 dbg_info *dbgi = get_irn_dbg_info(node);
369 ir_node *block = be_transform_node(get_nodes_block(node));
370 ir_node *mem = get_Load_mem(node);
371 ir_node *new_mem = be_transform_node(mem);
372 ir_node *ptr = get_Load_ptr(node);
373 ir_node *new_ptr = be_transform_node(ptr);
374 ir_mode *mode = get_Load_mode(node);
375 int sign = get_mode_sign(mode);
379 ASSERT_NO_FLOAT(mode);
380 assert(mode_needs_gp_reg(mode));
382 /* TODO: make use of offset in ptrs */
384 switch(get_mode_size_bits(mode)) {
386 func = new_rd_mips_lw;
389 func = sign ? new_rd_mips_lh : new_rd_mips_lhu;
392 func = sign ? new_rd_mips_lb : new_rd_mips_lbu;
395 panic("mips backend only support 32, 16, 8 bit loads");
398 res = func(dbgi, irg, block, new_ptr, new_mem, NULL, 0);
399 set_irn_pinned(res, get_irn_pinned(node));
404 typedef ir_node* (*gen_store_func) (dbg_info *dbg, ir_graph *irg,
405 ir_node *block, ir_node *ptr, ir_node *val,
406 ir_node *mem, ir_entity *ent, long offset);
409 * Generates a mips node for a firm Store node
411 static ir_node *gen_Store(ir_node *node)
413 ir_graph *irg = current_ir_graph;
414 dbg_info *dbgi = get_irn_dbg_info(node);
415 ir_node *block = be_transform_node(get_nodes_block(node));
416 ir_node *mem = get_Store_mem(node);
417 ir_node *new_mem = be_transform_node(mem);
418 ir_node *ptr = get_Store_ptr(node);
419 ir_node *new_ptr = be_transform_node(ptr);
420 ir_node *val = get_Store_value(node);
421 ir_node *new_val = be_transform_node(val);
422 ir_mode *mode = get_irn_mode(val);
426 assert(mode_needs_gp_reg(mode));
428 switch(get_mode_size_bits(mode)) {
430 func = new_rd_mips_sw;
433 func = new_rd_mips_sh;
436 func = new_rd_mips_sb;
439 panic("store only supported for 32, 16, 8 bit values in mips backend");
442 res = func(dbgi, irg, block, new_ptr, new_val, new_mem, NULL, 0);
443 set_irn_pinned(res, get_irn_pinned(node));
448 static ir_node *gen_Proj_DivMod(ir_node *node)
450 ir_graph *irg = current_ir_graph;
451 dbg_info *dbgi = get_irn_dbg_info(node);
452 ir_node *block = be_transform_node(get_nodes_block(node));
453 ir_node *divmod = get_Proj_pred(node);
454 ir_node *new_div = be_transform_node(divmod);
455 long pn = get_Proj_proj(node);
458 assert(is_mips_div(new_div) || is_mips_divu(new_div));
460 switch(get_irn_opcode(divmod)) {
464 return new_rd_Proj(dbgi, irg, block, new_div, mode_M,
467 proj = new_rd_Proj(dbgi, irg, block, new_div, mode_M,
469 return new_rd_mips_mflo(dbgi, irg, block, proj);
476 return new_rd_Proj(dbgi, irg, block, new_div, mode_M,
479 proj = new_rd_Proj(dbgi, irg, block, new_div, mode_M,
481 return new_rd_mips_mfhi(dbgi, irg, block, proj);
489 return new_rd_Proj(dbgi, irg, block, new_div, mode_M,
491 case pn_DivMod_res_div:
492 proj = new_rd_Proj(dbgi, irg, block, new_div, mode_M,
494 return new_rd_mips_mflo(dbgi, irg, block, proj);
495 case pn_DivMod_res_mod:
496 proj = new_rd_Proj(dbgi, irg, block, new_div, mode_M,
498 return new_rd_mips_mfhi(dbgi, irg, block, proj);
506 panic("invalid proj attached to %+F", divmod);
509 static ir_node *gen_Proj_Start(ir_node *node)
511 ir_graph *irg = current_ir_graph;
512 dbg_info *dbgi = get_irn_dbg_info(node);
513 ir_node *block = be_transform_node(get_nodes_block(node));
514 long pn = get_Proj_proj(node);
516 if(pn == pn_Start_X_initial_exec) {
517 /* we exchange the projx with a jump */
518 ir_node *jump = new_rd_Jmp(dbgi, irg, block);
521 if(node == get_irg_anchor(irg, anchor_tls)) {
523 return be_duplicate_node(node);
525 return be_duplicate_node(node);
528 static ir_node *gen_Proj(ir_node *node)
530 ir_graph *irg = current_ir_graph;
531 dbg_info *dbgi = get_irn_dbg_info(node);
532 ir_node *pred = get_Proj_pred(node);
534 switch(get_irn_opcode(pred)) {
542 return gen_Proj_DivMod(node);
545 return gen_Proj_Start(node);
548 assert(get_irn_mode(node) != mode_T);
549 if(mode_needs_gp_reg(get_irn_mode(node))) {
550 ir_node *new_pred = be_transform_node(pred);
551 ir_node *block = be_transform_node(get_nodes_block(node));
552 long pn = get_Proj_proj(node);
554 return new_rd_Proj(dbgi, irg, block, new_pred, mode_Iu, pn);
559 return be_duplicate_node(node);
562 static ir_node *gen_Phi(ir_node *node)
564 ir_graph *irg = current_ir_graph;
565 dbg_info *dbgi = get_irn_dbg_info(node);
566 ir_node *block = be_transform_node(get_nodes_block(node));
567 ir_mode *mode = get_irn_mode(node);
570 if(mode_needs_gp_reg(mode)) {
571 assert(get_mode_size_bits(mode) <= 32);
575 /* phi nodes allow loops, so we use the old arguments for now
576 * and fix this later */
577 phi = new_ir_node(dbgi, irg, block, op_Phi, mode, get_irn_arity(node),
578 get_irn_in(node) + 1);
579 copy_node_attr(node, phi);
580 be_duplicate_deps(node, phi);
582 be_enqueue_preds(node);
589 ir_node *gen_node_for_SwitchCond(mips_transform_env_t *env)
591 ir_node *selector = get_Cond_selector(env->irn);
592 ir_mode *selector_mode = get_irn_mode(selector);
593 ir_node *node = env->irn;
594 dbg_info *dbg = env->dbg;
595 ir_graph *irg = env->irg;
596 ir_node *block = env->block;
597 ir_node *sub, *sltu, *minval_const, *max_const, *switchjmp;
598 ir_node *defaultproj, *defaultproj_succ;
600 long pn, minval, maxval, defaultprojn;
601 const ir_edge_t *edge;
602 ir_node *zero, *two_const, *add, *la, *load, *proj;
603 ir_mode *unsigned_mode;
606 // mode_b conds are handled by gen_node_for_Proj
607 if(get_mode_sort(selector_mode) != irms_int_number)
610 assert(get_mode_size_bits(selector_mode) == 32);
613 defaultprojn = get_Cond_defaultProj(node);
615 // go over all projs to find min-&maxval of the switch
618 foreach_out_edge(node, edge) {
619 ir_node* proj = get_edge_src_irn(edge);
620 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
622 pn = get_Proj_proj(proj);
623 if(pn == defaultprojn) {
633 assert(defaultproj != NULL);
635 // subtract minval from the switch value
638 minval_const = new_rd_Const(dbg, irg, block, selector_mode, new_tarval_from_long(minval, selector_mode));
639 minval_const = gen_node_for_Const(env, dbg, irg, block, minval_const);
640 sub = new_rd_mips_sub(dbg, irg, block, selector, minval_const);
645 // compare if we're above maxval-minval or below zero.
646 // we can do this with 1 compare because we use unsigned mode
647 unsigned_mode = new_ir_mode(get_mode_name(selector_mode),
648 get_mode_sort(selector_mode), get_mode_size_bits(selector_mode),
649 0, get_mode_arithmetic(selector_mode), get_mode_modulo_shift(selector_mode));
651 max_const = new_rd_Const(dbg, irg, block, unsigned_mode, new_tarval_from_long(maxval - minval + 1, unsigned_mode));
652 max_const = gen_node_for_Const(env, dbg, irg, block, max_const);
653 sltu = new_rd_mips_slt(dbg, irg, block, sub, max_const);
655 zero = gen_zero_node(env, dbg, irg, block);
656 beq = new_rd_mips_beq(dbg, irg, block, sltu, zero, mode_T);
658 // attach defaultproj to beq now
659 set_irn_n(defaultproj, 0, beq);
660 set_Proj_proj(defaultproj, 1);
662 two_const = new_rd_Const(dbg, irg, block, unsigned_mode, new_tarval_from_long(2, unsigned_mode));
663 two_const = gen_node_for_Const(env, dbg, irg, block, two_const);
664 sl = new_rd_mips_sl(dbg, irg, block, sub, two_const);
666 la = new_rd_mips_la(dbg, irg, block);
667 add = new_rd_mips_addu(dbg, irg, block, sl, la);
668 load = new_rd_mips_load_r(dbg, irg, block, new_rd_NoMem(irg), add, mode_T);
669 attr = get_mips_attr(load);
670 attr->modes.load_store_mode = mode_Iu;
671 attr->tv = new_tarval_from_long(0, mode_Iu);
673 proj = new_rd_Proj(dbg, irg, block, load, mode_Iu, pn_Load_res);
675 switchjmp = new_rd_mips_SwitchJump(dbg, irg, block, proj, mode_T);
676 attr = get_mips_attr(switchjmp);
677 attr->switch_default_pn = defaultprojn;
679 edge = get_irn_out_edge_first(defaultproj);
680 defaultproj_succ = get_edge_src_irn(edge);
681 attr->symconst_id = new_id_from_str(mips_get_block_label(defaultproj_succ));
683 attr = get_mips_attr(la);
684 attr->symconst_id = new_id_from_str(mips_get_jumptbl_label(switchjmp));
690 static ir_node *gen_Cond(ir_node *node)
692 ir_graph *irg = current_ir_graph;
693 dbg_info *dbgi = get_irn_dbg_info(node);
694 ir_node *block = get_nodes_block(node);
695 ir_node *sel_proj = get_Cond_selector(node);
696 ir_node *cmp = get_Proj_pred(sel_proj);
697 ir_node *left = get_Cmp_left(cmp);
698 ir_node *new_left = be_transform_node(left);
699 ir_node *right = get_Cmp_right(cmp);
700 ir_node *new_right = be_transform_node(right);
701 long pnc = get_Proj_proj(sel_proj);
706 /* TODO: use blez & co. when possible */
712 panic("mips backend can't handle unoptimized constant Cond");
715 res = new_rd_mips_beq(dbgi, irg, block, new_left, new_right);
719 zero = mips_create_zero();
720 slt = new_rd_mips_slt(dbgi, irg, block, new_left, new_right);
721 res = new_rd_mips_bne(dbgi, irg, block, slt, zero);
725 zero = mips_create_zero();
726 slt = new_rd_mips_slt(dbgi, irg, block, new_right, new_left);
727 res = new_rd_mips_beq(dbgi, irg, block, slt, zero);
731 zero = mips_create_zero();
732 slt = new_rd_mips_slt(dbgi, irg, block, new_right, new_left);
733 res = new_rd_mips_bne(dbgi, irg, block, slt, zero);
737 zero = mips_create_zero();
738 slt = new_rd_mips_slt(dbgi, irg, block, new_right, new_left);
739 res = new_rd_mips_bne(dbgi, irg, block, slt, zero);
743 res = new_rd_mips_bne(dbgi, irg, block, new_left, new_right);
747 panic("mips backend doesn't handle unordered compares yet");
753 static ir_node *gen_Conv(ir_node *node)
755 ir_graph *irg = current_ir_graph;
756 dbg_info *dbgi = get_irn_dbg_info(node);
757 ir_node *block = be_transform_node(get_nodes_block(node));
758 ir_node *op = get_Conv_op(node);
759 ir_node *new_op = be_transform_node(op);
760 ir_mode *src_mode = get_irn_mode(op);
761 ir_mode *dst_mode = get_irn_mode(node);
762 int src_size = get_mode_size_bits(src_mode);
763 int dst_size = get_mode_size_bits(dst_mode);
766 assert(mode_needs_gp_reg(src_mode));
767 assert(mode_needs_gp_reg(dst_mode));
769 /* we only need to do something on upconvs */
770 if(src_size >= dst_size) {
771 /* unnecessary conv */
775 if(mode_is_signed(src_mode)) {
777 res = new_rd_mips_seb(dbgi, irg, block, new_op);
778 } else if(src_size == 16) {
779 res = new_rd_mips_seh(dbgi, irg, block, new_op);
781 panic("invalid conv %+F", node);
787 and_const = mips_create_Immediate(0xff);
788 } else if(src_size == 16) {
789 and_const = mips_create_Immediate(0xffff);
791 panic("invalid conv %+F", node);
793 res = new_rd_mips_and(dbgi, irg, block, new_op, and_const);
799 static ir_node *create_div(ir_node *node, ir_node *left, ir_node *right,
802 ir_graph *irg = current_ir_graph;
803 dbg_info *dbgi = get_irn_dbg_info(node);
804 ir_node *block = be_transform_node(get_nodes_block(node));
805 ir_node *new_left = be_transform_node(left);
806 ir_node *new_right = be_transform_node(right);
809 if(mode_is_signed(mode)) {
810 res = new_rd_mips_div(dbgi, irg, block, new_left, new_right);
812 res = new_rd_mips_divu(dbgi, irg, block, new_left, new_right);
815 set_irn_pinned(res, get_irn_pinned(node));
820 static ir_node *gen_DivMod(ir_node *node)
822 return create_div(node, get_DivMod_left(node), get_DivMod_right(node),
823 get_DivMod_resmode(node));
826 static ir_node *gen_Div(ir_node *node)
828 return create_div(node, get_Div_left(node), get_Div_right(node),
829 get_Div_resmode(node));
832 static ir_node *gen_Mod(ir_node *node)
834 return create_div(node, get_Mod_left(node), get_Mod_right(node),
835 get_Mod_resmode(node));
839 static ir_node *gen_node_for_Mul(mips_transform_env_t *env) {
840 ir_node *node = env->irn;
844 ir_mode *mode = get_irn_mode(node);
846 op1 = get_Mul_left(node);
847 op2 = get_Mul_right(node);
849 assert(get_mode_size_bits(env->mode) == 32);
850 assert(get_mode_size_bits(get_irn_mode(op1)) == get_mode_size_bits(env->mode));
851 assert(get_mode_size_bits(get_irn_mode(op2)) == get_mode_size_bits(env->mode));
853 if(mode_is_signed(mode)) {
854 mul = new_rd_mips_mult(env->dbg, env->irg, env->block, get_Mul_left(node), get_Mul_right(node));
856 mul = new_rd_mips_multu(env->dbg, env->irg, env->block, get_Mul_left(node), get_Mul_right(node));
858 mflo = new_rd_mips_mflo(env->dbg, env->irg, env->block, mul);
864 ir_node *gen_node_for_IJmp(mips_transform_env_t *env) {
865 ir_graph *irg = env->irg;
866 ir_node *node = env->irn;
867 dbg_info *dbg = get_irn_dbg_info(node);
868 ir_node *block = get_nodes_block(node);
869 ir_node *target = get_IJmp_target(node);
871 return new_rd_mips_jr(dbg, irg, block, target);
875 ir_node *gen_node_for_Rot(mips_transform_env_t *env) {
876 ir_node *node = env->irn;
877 ir_node *subu, *srlv, *sllv, *or;
879 subu = new_rd_mips_subuzero(env->dbg, env->irg, env->block, get_Rot_right(node));
880 srlv = new_rd_mips_srlv(env->dbg, env->irg, env->block, get_Rot_left(node), subu);
881 sllv = new_rd_mips_sllv(env->dbg, env->irg, env->block, get_Rot_left(node), get_Rot_right(node));
882 or = new_rd_mips_or(env->dbg, env->irg, env->block, sllv, srlv);
888 static ir_node *gen_Unknown(ir_node *node)
891 assert(mode_needs_gp_reg(get_irn_mode(node)));
892 return mips_create_zero();
897 * lower a copyB into standard Firm assembler :-)
899 ir_node *gen_code_for_CopyB(ir_node *block, ir_node *node) {
901 ir_node *dst = get_CopyB_dst(node);
902 ir_node *src = get_CopyB_src(node);
903 ir_type *type = get_CopyB_type(node);
904 ir_node *mem = get_CopyB_mem(node);
906 ir_node *result = NULL;
907 int size = get_type_size_bytes(type);
908 dbg_info *dbg = get_irn_dbg_info(node);
909 ir_graph *irg = get_irn_irg(block);
914 ir_node *phi, *projT, *projF, *cmp, *proj, *cond, *jmp, *in[2];
915 ir_node *new_bl, *src_phi, *dst_phi, *mem_phi, *add;
916 ir_mode *p_mode = get_irn_mode(src);
919 /* build the control loop */
920 in[0] = in[1] = new_r_Unknown(irg, mode_X);
922 new_bl = new_r_Block(irg, 2, in);
924 in[0] = cnt = new_Const_long(mode_Is, (size >> 4));
925 in[1] = new_r_Unknown(irg, mode_Is);
926 phi = new_r_Phi(irg, new_bl, 2, in, mode_Is);
928 sub = new_rd_Sub(dbg, irg, new_bl, phi, new_Const_long(mode_Is, -1), mode_Is);
929 set_Phi_pred(phi, 1, sub);
931 cmp = new_rd_Cmp(dbg, irg, new_bl, sub, new_Const_long(mode_Is, 0));
932 proj = new_r_Proj(irg, new_bl, cmp, mode_b, pn_Cmp_Lg);
933 cond = new_rd_Cond(dbg, irg, new_bl, proj);
935 projT = new_r_Proj(irg, new_bl, cond, mode_X, pn_Cond_true);
936 projF = new_r_Proj(irg, new_bl, cond, mode_X, pn_Cond_false);
938 jmp = get_Block_cfgpred(block, 0);
939 set_Block_cfgpred(block, 0, projF);
941 set_Block_cfgpred(new_bl, 0, jmp);
942 set_Block_cfgpred(new_bl, 1, projT);
948 in[1] = new_r_Unknown(irg, p_mode);
949 src_phi = new_r_Phi(irg, new_bl, 2, in, p_mode);
952 dst_phi = new_r_Phi(irg, new_bl, 2, in, p_mode);
954 add = new_rd_Add(dbg, irg, new_bl, src_phi, new_Const_long(mode_Is, 16), p_mode);
955 set_Phi_pred(src_phi, 1, add);
956 add = new_rd_Add(dbg, irg, new_bl, dst_phi, new_Const_long(mode_Is, 16), p_mode);
957 set_Phi_pred(dst_phi, 1, add);
960 in[1] = new_r_Unknown(irg, mode_M);
961 mem_phi = new_r_Phi(irg, new_bl, 2, in, mode_M);
966 /* create 4 parallel loads */
967 for (i = 0; i < 4; ++i) {
970 load = new_rd_mips_load_r(dbg, irg, new_bl, mem_phi, src, mode_T);
971 attr = get_mips_attr(load);
972 attr->modes.load_store_mode = mode_Iu;
973 attr->tv = new_tarval_from_long(i * 4, mode_Iu);
975 ld[i] = new_rd_Proj(dbg, irg, new_bl, load, mode_Iu, pn_Load_res);
978 /* create 4 parallel stores */
979 for (i = 0; i < 4; ++i) {
982 store = new_rd_mips_store_r(dbg, irg, new_bl, mem_phi, dst, ld[i], mode_T);
983 attr = get_mips_attr(store);
984 attr->modes.load_store_mode = mode_Iu;
985 attr->tv = new_tarval_from_long(i * 4, mode_Iu);
987 mm[i] = new_rd_Proj(dbg, irg, new_bl, store, mode_M, pn_Store_M);
989 mem = new_r_Sync(irg, new_bl, 4, mm);
991 set_Phi_pred(mem_phi, 1, mem);
994 // output store/loads manually
996 for(i = size; i > 0; ) {
998 ir_node *load, *store, *projv;
999 int offset = size - i;
1011 load = new_rd_mips_load_r(dbg, irg, block, mem, src, mode_T);
1012 attr = get_mips_attr(load);
1013 attr->modes.load_store_mode = mode;
1014 attr->tv = new_tarval_from_long(offset, mode_Iu);
1016 projv = new_rd_Proj(dbg, irg, block, load, mode, pn_Load_res);
1018 store = new_rd_mips_store_r(dbg, irg, block, mem, dst, projv, mode_T);
1019 attr = get_mips_attr(store);
1020 attr->modes.load_store_mode = mode;
1021 attr->tv = new_tarval_from_long(offset, mode_Iu);
1023 mm[n] = new_rd_Proj(dbg, irg, block, store, mode_M, pn_Store_M);
1028 result = new_r_Sync(irg, block, n, mm);
1036 static void mips_fix_CopyB_Proj(mips_transform_env_t* env) {
1037 ir_node *node = env->irn;
1038 long n = get_Proj_proj(node);
1040 if(n == pn_CopyB_M_except) {
1041 panic("Unsupported Proj from CopyB");
1042 } else if(n == pn_CopyB_M_regular) {
1043 set_Proj_proj(node, pn_Store_M);
1044 } else if(n == pn_CopyB_M_except) {
1045 set_Proj_proj(node, pn_Store_X_except);
1050 static void mips_transform_Spill(mips_transform_env_t* env) {
1051 ir_node *node = env->irn;
1052 ir_node *sched_point = NULL;
1054 ir_node *nomem = new_rd_NoMem(env->irg);
1055 ir_node *ptr = get_irn_n(node, 0);
1056 ir_node *val = get_irn_n(node, 1);
1057 ir_entity *ent = be_get_frame_entity(node);
1059 if(sched_is_scheduled(node)) {
1060 sched_point = sched_prev(node);
1063 store = new_rd_mips_sw(env->dbg, env->irg, env->block, ptr, val, nomem,
1067 sched_add_after(sched_point, store);
1071 exchange(node, store);
1074 static void mips_transform_Reload(mips_transform_env_t* env) {
1075 ir_node *node = env->irn;
1076 ir_node *sched_point = NULL;
1077 ir_node *load, *proj;
1078 ir_node *ptr = get_irn_n(node, 0);
1079 ir_node *mem = get_irn_n(node, 1);
1080 ir_entity *ent = be_get_frame_entity(node);
1081 const arch_register_t* reg;
1083 if(sched_is_scheduled(node)) {
1084 sched_point = sched_prev(node);
1087 load = new_rd_mips_lw(env->dbg, env->irg, env->block, ptr, mem, ent, 0);
1089 proj = new_rd_Proj(env->dbg, env->irg, env->block, load, mode_Iu, pn_mips_lw_res);
1092 sched_add_after(sched_point, load);
1097 /* copy the register from the old node to the new Load */
1098 reg = arch_get_irn_register(env->cg->arch_env, node);
1099 arch_set_irn_register(env->cg->arch_env, proj, reg);
1101 exchange(node, proj);
1105 static ir_node *gen_AddSP(ir_node *node)
1107 ir_node *node = env->irn;
1110 const arch_register_t *reg;
1112 op1 = get_irn_n(node, 0);
1113 op2 = get_irn_n(node, 1);
1115 add = new_rd_mips_addu(env->dbg, env->irg, env->block, op1, op2);
1117 /* copy the register requirements from the old node to the new node */
1118 reg = arch_get_irn_register(env->cg->arch_env, node);
1119 arch_set_irn_register(env->cg->arch_env, add, reg);
1125 /*********************************************************
1128 * _ __ ___ __ _ _ _ __ __| |_ __ ___ _____ _ __
1129 * | '_ ` _ \ / _` | | '_ \ / _` | '__| \ \ / / _ \ '__|
1130 * | | | | | | (_| | | | | | | (_| | | | |\ V / __/ |
1131 * |_| |_| |_|\__,_|_|_| |_| \__,_|_| |_| \_/ \___|_|
1133 *********************************************************/
1135 typedef ir_node *(*mips_transform_func) (ir_node *node);
1137 static void register_transformer(ir_op *op, mips_transform_func func)
1139 assert(op->ops.generic == NULL);
1140 op->ops.generic = (op_func) func;
1143 static void register_transformers(void)
1145 clear_irp_opcodes_generic_func();
1147 register_transformer(op_Add, gen_Add);
1148 register_transformer(op_Sub, gen_Sub);
1149 register_transformer(op_And, gen_And);
1150 register_transformer(op_Or, gen_Or);
1151 register_transformer(op_Eor, gen_Eor);
1152 register_transformer(op_Shl, gen_Shl);
1153 register_transformer(op_Shr, gen_Shr);
1154 register_transformer(op_Shrs, gen_Shrs);
1155 register_transformer(op_Not, gen_Not);
1156 register_transformer(op_Minus, gen_Minus);
1157 register_transformer(op_Div, gen_Div);
1158 register_transformer(op_Mod, gen_Mod);
1159 register_transformer(op_DivMod, gen_DivMod);
1160 register_transformer(op_Abs, gen_Abs);
1161 register_transformer(op_Load, gen_Load);
1162 register_transformer(op_Store, gen_Store);
1163 register_transformer(op_Cond, gen_Cond);
1164 register_transformer(op_Conv, gen_Conv);
1165 register_transformer(op_Const, gen_Const);
1166 register_transformer(op_SymConst, gen_SymConst);
1167 register_transformer(op_Unknown, gen_Unknown);
1168 register_transformer(op_Proj, gen_Proj);
1169 register_transformer(op_Phi, gen_Phi);
1172 void mips_transform_graph(mips_code_gen_t *cg)
1175 register_transformers();
1176 be_transform_graph(cg->birg, NULL);
1180 * Calls the transform functions for Spill and Reload.
1182 void mips_after_ra_walker(ir_node *node, void *env) {
1183 mips_code_gen_t *cg = env;
1184 mips_transform_env_t tenv;
1189 tenv.block = get_nodes_block(node);
1190 tenv.dbg = get_irn_dbg_info(node);
1191 tenv.irg = current_ir_graph;
1193 tenv.mode = get_irn_mode(node);
1196 if (be_is_Reload(node)) {
1197 mips_transform_Reload(&tenv);
1198 } else if (be_is_Spill(node)) {
1199 mips_transform_Spill(&tenv);