2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The codegenrator (transform FIRM into mips FIRM
23 * @author Matthias Braun, Mehdi
31 #include "irgraph_t.h"
43 #include "../benode_t.h"
45 #include "../besched.h"
46 #include "../besched_t.h"
47 #include "../beirg_t.h"
48 #include "../betranshlp.h"
49 #include "bearch_mips_t.h"
51 #include "mips_nodes_attr.h"
52 #include "mips_transform.h"
53 #include "mips_new_nodes.h"
54 #include "mips_map_regs.h"
55 #include "mips_util.h"
56 #include "mips_emitter.h"
58 #include "gen_mips_regalloc_if.h"
60 /****************************************************************************************************
62 * | | | | / _| | | (_)
63 * _ __ ___ __| | ___ | |_ _ __ __ _ _ __ ___| |_ ___ _ __ _ __ ___ __ _| |_ _ ___ _ __
64 * | '_ \ / _ \ / _` |/ _ \ | __| '__/ _` | '_ \/ __| _/ _ \| '__| '_ ` _ \ / _` | __| |/ _ \| '_ \
65 * | | | | (_) | (_| | __/ | |_| | | (_| | | | \__ \ || (_) | | | | | | | | (_| | |_| | (_) | | | |
66 * |_| |_|\___/ \__,_|\___| \__|_| \__,_|_| |_|___/_| \___/|_| |_| |_| |_|\__,_|\__|_|\___/|_| |_|
68 ****************************************************************************************************/
70 typedef ir_node *construct_binop_func(dbg_info *db, ir_node *block,
71 ir_node *left, ir_node *right);
73 static inline int mode_needs_gp_reg(ir_mode *mode) {
74 return mode_is_int(mode) || mode_is_reference(mode);
77 ir_node *mips_create_Immediate(long val)
79 ir_graph *irg = current_ir_graph;
80 ir_node *block = get_irg_start_block(irg);
83 assert(val >= -32768 && val <= 32767);
84 res = new_bd_mips_Immediate(NULL, block, MIPS_IMM_CONST, NULL, val);
85 arch_set_irn_register(res, &mips_gp_regs[REG_GP_NOREG]);
90 ir_node* mips_create_zero(void)
92 ir_graph *irg = current_ir_graph;
93 ir_node *block = get_irg_start_block(irg);
94 ir_node *zero = new_bd_mips_zero(NULL, block);
96 arch_set_irn_register(zero, &mips_gp_regs[REG_GP_NOREG]);
101 static ir_node *try_create_Immediate(ir_node *node)
110 mode = get_irn_mode(node);
111 if(!mode_needs_gp_reg(mode))
114 tv = get_Const_tarval(node);
115 if(tarval_is_long(tv)) {
116 val = get_tarval_long(tv);
118 ir_fprintf(stderr, "Optimisation Warning: tarval %+F is not a long?\n",
123 if(val < -32768 || val > 32767)
126 return mips_create_Immediate(val);
129 static void create_binop_operands(ir_node **new_left, ir_node **new_right,
130 ir_node *left, ir_node *right,
133 *new_right = try_create_Immediate(right);
134 if(*new_right != NULL) {
135 *new_left = be_transform_node(left);
139 *new_right = try_create_Immediate(left);
140 if(*new_right != NULL) {
141 *new_left = be_transform_node(right);
146 *new_left = be_transform_node(left);
147 *new_right = be_transform_node(right);
150 static ir_node *gen_binop(ir_node *node, ir_node *left, ir_node *right,
151 construct_binop_func func, int supports_immediate)
153 dbg_info *dbgi = get_irn_dbg_info(node);
154 ir_node *block = be_transform_node(get_nodes_block(node));
156 ir_node *new_left, *new_right;
158 assert(mode_needs_gp_reg(get_irn_mode(node)));
160 if(supports_immediate) {
161 int is_commutative = is_op_commutative(get_irn_op(node));
162 create_binop_operands(&new_left, &new_right, left, right,
165 new_left = be_transform_node(left);
166 new_right = be_transform_node(right);
169 res = func(dbgi, block, new_left, new_right);
174 static ir_node *gen_Add(ir_node *node)
176 /* TODO: match add(symconst, const) */
177 return gen_binop(node, get_Add_left(node), get_Add_right(node),
178 new_bd_mips_addu, 1);
181 static ir_node *gen_Sub(ir_node *node)
183 return gen_binop(node, get_Sub_left(node), get_Sub_right(node),
184 new_bd_mips_addu, 0);
187 static ir_node *gen_And(ir_node *node)
189 return gen_binop(node, get_Add_left(node), get_Add_right(node),
193 static ir_node *gen_Or(ir_node *node)
195 return gen_binop(node, get_Add_left(node), get_Add_right(node),
199 static ir_node *gen_Eor(ir_node *node)
201 return gen_binop(node, get_Add_left(node), get_Add_right(node),
205 static ir_node *gen_Shl(ir_node *node)
207 return gen_binop(node, get_Add_left(node), get_Add_right(node),
211 static ir_node *gen_Shr(ir_node *node)
213 return gen_binop(node, get_Add_left(node), get_Add_right(node),
217 static ir_node *gen_Shrs(ir_node *node)
219 return gen_binop(node, get_Add_left(node), get_Add_right(node),
223 static ir_node *gen_Not(ir_node *node)
225 dbg_info *dbgi = get_irn_dbg_info(node);
226 ir_node *block = be_transform_node(get_nodes_block(node));
227 ir_node *op = get_Not_op(node);
232 /* we can transform not->or to nor */
234 return gen_binop(op, get_Or_left(op), get_Or_right(op),
238 /* construct (op < 1) */
239 one = mips_create_Immediate(1);
240 new_op = be_transform_node(op);
241 res = new_bd_mips_sltu(dbgi, block, new_op, one);
246 static ir_node *gen_Minus(ir_node *node)
248 dbg_info *dbgi = get_irn_dbg_info(node);
249 ir_node *block = be_transform_node(get_nodes_block(node));
250 ir_node *op = get_Minus_op(node);
251 ir_node *new_op = be_transform_node(op);
255 /* construct (0 - op) */
256 zero = mips_create_zero();
257 res = new_bd_mips_subu(dbgi, block, zero, new_op);
262 static ir_node *gen_Abs(ir_node *node)
264 dbg_info *dbgi = get_irn_dbg_info(node);
265 ir_node *block = be_transform_node(get_nodes_block(node));
266 ir_node *op = get_Abs_op(node);
267 ir_node *new_op = be_transform_node(op);
268 ir_node *sra_const, *sra, *add, *xor;
270 /* TODO: support other bit sizes... */
271 assert(get_mode_size_bits(get_irn_mode(node)) == 32);
272 sra_const = mips_create_Immediate(31);
273 sra = new_bd_mips_sra( dbgi, block, new_op, sra_const);
274 add = new_bd_mips_addu(dbgi, block, new_op, sra);
275 xor = new_bd_mips_xor( dbgi, block, sra, add);
280 static ir_node* gen_Const(ir_node *node)
282 dbg_info *dbgi = get_irn_dbg_info(node);
283 ir_node *block = be_transform_node(get_nodes_block(node));
284 tarval *tv = get_Const_tarval(node);
288 unsigned long val, lower, upper;
290 if(tarval_is_long(tv)) {
291 val = get_tarval_long(tv);
293 panic("Can't get value of tarval %+F", node);
296 val = get_tarval_long(tv);
298 lower = val & 0xffff;
299 upper = (val >> 16) & 0xffff;
301 upper_node = mips_create_zero();
303 upper_node = new_bd_mips_lui(dbgi, block, MIPS_IMM_CONST, NULL, upper);
309 or_const = mips_create_Immediate(lower);
310 lower_node = new_bd_mips_or(dbgi, block, upper_node, or_const);
315 static ir_node* gen_SymConst(ir_node *node)
317 dbg_info *dbgi = get_irn_dbg_info(node);
318 ir_node *block = be_transform_node(get_nodes_block(node));
320 ir_node *lui, *or_const, *or;
322 if(get_SymConst_kind(node) != symconst_addr_ent) {
323 panic("Only address entity symconsts supported in mips backend");
326 entity = get_SymConst_entity(node);
328 lui = new_bd_mips_lui(dbgi, block, MIPS_IMM_SYMCONST_HI, entity, 0);
329 or_const = new_bd_mips_Immediate(dbgi, block, MIPS_IMM_SYMCONST_LO, entity, 0);
330 or = new_bd_mips_or(dbgi, block, lui, or_const);
332 arch_set_irn_register(or_const, &mips_gp_regs[REG_GP_NOREG]);
337 typedef ir_node* (*gen_load_func)(dbg_info *dbg, ir_node *block, ir_node *ptr,
338 ir_node *mem, ir_entity *entity, long offset);
341 * Generates a mips node for a firm Load node
343 static ir_node *gen_Load(ir_node *node)
345 dbg_info *dbgi = get_irn_dbg_info(node);
346 ir_node *block = be_transform_node(get_nodes_block(node));
347 ir_node *mem = get_Load_mem(node);
348 ir_node *new_mem = be_transform_node(mem);
349 ir_node *ptr = get_Load_ptr(node);
350 ir_node *new_ptr = be_transform_node(ptr);
351 ir_mode *mode = get_Load_mode(node);
352 int sign = get_mode_sign(mode);
356 ASSERT_NO_FLOAT(mode);
357 assert(mode_needs_gp_reg(mode));
359 /* TODO: make use of offset in ptrs */
361 switch(get_mode_size_bits(mode)) {
363 func = new_bd_mips_lw;
366 func = sign ? new_bd_mips_lh : new_bd_mips_lhu;
369 func = sign ? new_bd_mips_lb : new_bd_mips_lbu;
372 panic("mips backend only support 32, 16, 8 bit loads");
375 res = func(dbgi, block, new_ptr, new_mem, NULL, 0);
376 set_irn_pinned(res, get_irn_pinned(node));
381 typedef ir_node* (*gen_store_func)(dbg_info *dbg, ir_node *block, ir_node *ptr,
382 ir_node *val, ir_node *mem, ir_entity *ent, long offset);
385 * Generates a mips node for a firm Store node
387 static ir_node *gen_Store(ir_node *node)
389 dbg_info *dbgi = get_irn_dbg_info(node);
390 ir_node *block = be_transform_node(get_nodes_block(node));
391 ir_node *mem = get_Store_mem(node);
392 ir_node *new_mem = be_transform_node(mem);
393 ir_node *ptr = get_Store_ptr(node);
394 ir_node *new_ptr = be_transform_node(ptr);
395 ir_node *val = get_Store_value(node);
396 ir_node *new_val = be_transform_node(val);
397 ir_mode *mode = get_irn_mode(val);
401 assert(mode_needs_gp_reg(mode));
403 switch(get_mode_size_bits(mode)) {
405 func = new_bd_mips_sw;
408 func = new_bd_mips_sh;
411 func = new_bd_mips_sb;
414 panic("store only supported for 32, 16, 8 bit values in mips backend");
417 res = func(dbgi, block, new_ptr, new_val, new_mem, NULL, 0);
418 set_irn_pinned(res, get_irn_pinned(node));
423 static ir_node *gen_Proj_DivMod(ir_node *node)
425 ir_graph *irg = current_ir_graph;
426 dbg_info *dbgi = get_irn_dbg_info(node);
427 ir_node *block = be_transform_node(get_nodes_block(node));
428 ir_node *divmod = get_Proj_pred(node);
429 ir_node *new_div = be_transform_node(divmod);
430 long pn = get_Proj_proj(node);
433 assert(is_mips_div(new_div) || is_mips_divu(new_div));
435 switch(get_irn_opcode(divmod)) {
439 return new_rd_Proj(dbgi, irg, block, new_div, mode_M,
442 proj = new_rd_Proj(dbgi, irg, block, new_div, mode_M,
444 return new_bd_mips_mflo(dbgi, block, proj);
451 return new_rd_Proj(dbgi, irg, block, new_div, mode_M,
454 proj = new_rd_Proj(dbgi, irg, block, new_div, mode_M,
456 return new_bd_mips_mfhi(dbgi, block, proj);
464 return new_rd_Proj(dbgi, irg, block, new_div, mode_M,
466 case pn_DivMod_res_div:
467 proj = new_rd_Proj(dbgi, irg, block, new_div, mode_M,
469 return new_bd_mips_mflo(dbgi, block, proj);
470 case pn_DivMod_res_mod:
471 proj = new_rd_Proj(dbgi, irg, block, new_div, mode_M,
473 return new_bd_mips_mfhi(dbgi, block, proj);
481 panic("invalid proj attached to %+F", divmod);
484 static ir_node *gen_Proj_Start(ir_node *node)
486 ir_graph *irg = current_ir_graph;
487 dbg_info *dbgi = get_irn_dbg_info(node);
488 ir_node *block = be_transform_node(get_nodes_block(node));
489 long pn = get_Proj_proj(node);
491 if(pn == pn_Start_X_initial_exec) {
492 /* we exchange the projx with a jump */
493 ir_node *jump = new_rd_Jmp(dbgi, irg, block);
496 if(node == get_irg_anchor(irg, anchor_tls)) {
498 return be_duplicate_node(node);
500 return be_duplicate_node(node);
503 static ir_node *gen_Proj(ir_node *node)
505 ir_graph *irg = current_ir_graph;
506 dbg_info *dbgi = get_irn_dbg_info(node);
507 ir_node *pred = get_Proj_pred(node);
509 switch(get_irn_opcode(pred)) {
517 return gen_Proj_DivMod(node);
520 return gen_Proj_Start(node);
523 assert(get_irn_mode(node) != mode_T);
524 if(mode_needs_gp_reg(get_irn_mode(node))) {
525 ir_node *new_pred = be_transform_node(pred);
526 ir_node *block = be_transform_node(get_nodes_block(node));
527 long pn = get_Proj_proj(node);
529 return new_rd_Proj(dbgi, irg, block, new_pred, mode_Iu, pn);
534 return be_duplicate_node(node);
537 static ir_node *gen_Phi(ir_node *node)
539 ir_graph *irg = current_ir_graph;
540 dbg_info *dbgi = get_irn_dbg_info(node);
541 ir_node *block = be_transform_node(get_nodes_block(node));
542 ir_mode *mode = get_irn_mode(node);
545 if(mode_needs_gp_reg(mode)) {
546 assert(get_mode_size_bits(mode) <= 32);
550 /* phi nodes allow loops, so we use the old arguments for now
551 * and fix this later */
552 phi = new_ir_node(dbgi, irg, block, op_Phi, mode, get_irn_arity(node),
553 get_irn_in(node) + 1);
554 copy_node_attr(node, phi);
555 be_duplicate_deps(node, phi);
557 be_enqueue_preds(node);
564 ir_node *gen_node_for_SwitchCond(mips_transform_env_t *env)
566 ir_node *selector = get_Cond_selector(env->irn);
567 ir_mode *selector_mode = get_irn_mode(selector);
568 ir_node *node = env->irn;
569 dbg_info *dbg = env->dbg;
570 ir_graph *irg = env->irg;
571 ir_node *block = env->block;
572 ir_node *sub, *sltu, *minval_const, *max_const, *switchjmp;
573 ir_node *defaultproj, *defaultproj_succ;
575 long pn, minval, maxval, defaultprojn;
576 const ir_edge_t *edge;
577 ir_node *zero, *two_const, *add, *la, *load, *proj;
578 ir_mode *unsigned_mode;
581 // mode_b conds are handled by gen_node_for_Proj
582 if(get_mode_sort(selector_mode) != irms_int_number)
585 assert(get_mode_size_bits(selector_mode) == 32);
588 defaultprojn = get_Cond_default_proj(node);
590 // go over all projs to find min-&maxval of the switch
593 foreach_out_edge(node, edge) {
594 ir_node* proj = get_edge_src_irn(edge);
595 assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
597 pn = get_Proj_proj(proj);
598 if(pn == defaultprojn) {
608 assert(defaultproj != NULL);
610 // subtract minval from the switch value
613 minval_const = new_rd_Const(dbg, irg, block, selector_mode, new_tarval_from_long(minval, selector_mode));
614 minval_const = gen_node_for_Const(env, dbg, irg, block, minval_const);
615 sub = new_bd_mips_sub(dbg, block, selector, minval_const);
620 // compare if we're above maxval-minval or below zero.
621 // we can do this with 1 compare because we use unsigned mode
622 unsigned_mode = new_ir_mode(get_mode_name(selector_mode),
623 get_mode_sort(selector_mode), get_mode_size_bits(selector_mode),
624 0, get_mode_arithmetic(selector_mode), get_mode_modulo_shift(selector_mode));
626 max_const = new_rd_Const(dbg, irg, block, unsigned_mode, new_tarval_from_long(maxval - minval + 1, unsigned_mode));
627 max_const = gen_node_for_Const(env, dbg, irg, block, max_const);
628 sltu = new_bd_mips_slt(dbg, block, sub, max_const);
630 zero = gen_zero_node(env, dbg, irg, block);
631 beq = new_bd_mips_beq(dbg, block, sltu, zero, mode_T);
633 // attach defaultproj to beq now
634 set_irn_n(defaultproj, 0, beq);
635 set_Proj_proj(defaultproj, 1);
637 two_const = new_rd_Const(dbg, irg, block, unsigned_mode, new_tarval_from_long(2, unsigned_mode));
638 two_const = gen_node_for_Const(env, dbg, irg, block, two_const);
639 sl = new_bd_mips_sl(dbg, block, sub, two_const);
641 la = new_bd_mips_la( dbg, block);
642 add = new_bd_mips_addu( dbg, block, sl, la);
643 load = new_bd_mips_load_r(dbg, block, new_NoMem(), add, mode_T);
644 attr = get_mips_attr(load);
645 attr->modes.load_store_mode = mode_Iu;
646 attr->tv = new_tarval_from_long(0, mode_Iu);
648 proj = new_rd_Proj(dbg, irg, block, load, mode_Iu, pn_Load_res);
650 switchjmp = new_bd_mips_SwitchJump(dbg, block, proj, mode_T);
651 attr = get_mips_attr(switchjmp);
652 attr->switch_default_pn = defaultprojn;
654 edge = get_irn_out_edge_first(defaultproj);
655 defaultproj_succ = get_edge_src_irn(edge);
656 attr->symconst_id = new_id_from_str(mips_get_block_label(defaultproj_succ));
658 attr = get_mips_attr(la);
659 attr->symconst_id = new_id_from_str(mips_get_jumptbl_label(switchjmp));
665 static ir_node *gen_Cond(ir_node *node)
667 dbg_info *dbgi = get_irn_dbg_info(node);
668 ir_node *block = get_nodes_block(node);
669 ir_node *sel_proj = get_Cond_selector(node);
670 ir_node *cmp = get_Proj_pred(sel_proj);
671 ir_node *left = get_Cmp_left(cmp);
672 ir_node *new_left = be_transform_node(left);
673 ir_node *right = get_Cmp_right(cmp);
674 ir_node *new_right = be_transform_node(right);
675 long pnc = get_Proj_proj(sel_proj);
680 /* TODO: use blez & co. when possible */
686 panic("mips backend can't handle unoptimized constant Cond");
689 res = new_bd_mips_beq(dbgi, block, new_left, new_right);
693 zero = mips_create_zero();
694 slt = new_bd_mips_slt(dbgi, block, new_left, new_right);
695 res = new_bd_mips_bne(dbgi, block, slt, zero);
699 zero = mips_create_zero();
700 slt = new_bd_mips_slt(dbgi, block, new_right, new_left);
701 res = new_bd_mips_beq(dbgi, block, slt, zero);
705 zero = mips_create_zero();
706 slt = new_bd_mips_slt(dbgi, block, new_right, new_left);
707 res = new_bd_mips_bne(dbgi, block, slt, zero);
711 zero = mips_create_zero();
712 slt = new_bd_mips_slt(dbgi, block, new_right, new_left);
713 res = new_bd_mips_bne(dbgi, block, slt, zero);
717 res = new_bd_mips_bne(dbgi, block, new_left, new_right);
721 panic("mips backend doesn't handle unordered compares yet");
727 static ir_node *gen_Conv(ir_node *node)
729 dbg_info *dbgi = get_irn_dbg_info(node);
730 ir_node *block = be_transform_node(get_nodes_block(node));
731 ir_node *op = get_Conv_op(node);
732 ir_node *new_op = be_transform_node(op);
733 ir_mode *src_mode = get_irn_mode(op);
734 ir_mode *dst_mode = get_irn_mode(node);
735 int src_size = get_mode_size_bits(src_mode);
736 int dst_size = get_mode_size_bits(dst_mode);
739 assert(mode_needs_gp_reg(src_mode));
740 assert(mode_needs_gp_reg(dst_mode));
742 /* we only need to do something on upconvs */
743 if(src_size >= dst_size) {
744 /* unnecessary conv */
748 if(mode_is_signed(src_mode)) {
750 res = new_bd_mips_seb(dbgi, block, new_op);
751 } else if(src_size == 16) {
752 res = new_bd_mips_seh(dbgi, block, new_op);
754 panic("invalid conv %+F", node);
760 and_const = mips_create_Immediate(0xff);
761 } else if(src_size == 16) {
762 and_const = mips_create_Immediate(0xffff);
764 panic("invalid conv %+F", node);
766 res = new_bd_mips_and(dbgi, block, new_op, and_const);
772 static ir_node *create_div(ir_node *node, ir_node *left, ir_node *right,
775 dbg_info *dbgi = get_irn_dbg_info(node);
776 ir_node *block = be_transform_node(get_nodes_block(node));
777 ir_node *new_left = be_transform_node(left);
778 ir_node *new_right = be_transform_node(right);
781 if(mode_is_signed(mode)) {
782 res = new_bd_mips_div(dbgi, block, new_left, new_right);
784 res = new_bd_mips_divu(dbgi, block, new_left, new_right);
787 set_irn_pinned(res, get_irn_pinned(node));
792 static ir_node *gen_DivMod(ir_node *node)
794 return create_div(node, get_DivMod_left(node), get_DivMod_right(node),
795 get_DivMod_resmode(node));
798 static ir_node *gen_Div(ir_node *node)
800 return create_div(node, get_Div_left(node), get_Div_right(node),
801 get_Div_resmode(node));
804 static ir_node *gen_Mod(ir_node *node)
806 return create_div(node, get_Mod_left(node), get_Mod_right(node),
807 get_Mod_resmode(node));
811 static ir_node *gen_node_for_Mul(mips_transform_env_t *env) {
812 ir_node *node = env->irn;
816 ir_mode *mode = get_irn_mode(node);
818 op1 = get_Mul_left(node);
819 op2 = get_Mul_right(node);
821 assert(get_mode_size_bits(env->mode) == 32);
822 assert(get_mode_size_bits(get_irn_mode(op1)) == get_mode_size_bits(env->mode));
823 assert(get_mode_size_bits(get_irn_mode(op2)) == get_mode_size_bits(env->mode));
825 if(mode_is_signed(mode)) {
826 mul = new_bd_mips_mult(env->dbg, env->block, get_Mul_left(node), get_Mul_right(node));
828 mul = new_bd_mips_multu(env->dbg, env->block, get_Mul_left(node), get_Mul_right(node));
830 mflo = new_bd_mips_mflo(env->dbg, env->block, mul);
836 ir_node *gen_node_for_IJmp(mips_transform_env_t *env) {
837 ir_node *node = env->irn;
838 dbg_info *dbg = get_irn_dbg_info(node);
839 ir_node *block = get_nodes_block(node);
840 ir_node *target = get_IJmp_target(node);
842 return new_bd_mips_jr(dbg, block, target);
846 ir_node *gen_node_for_Rot(mips_transform_env_t *env) {
847 ir_node *node = env->irn;
848 ir_node *subu, *srlv, *sllv, *or;
850 subu = new_bd_mips_subuzero(env->dbg, env->block, get_Rot_right(node));
851 srlv = new_bd_mips_srlv(env->dbg, env->block, get_Rot_left(node), subu);
852 sllv = new_bd_mips_sllv(env->dbg, env->block, get_Rot_left(node), get_Rot_right(node));
853 or = new_bd_mips_or(env->dbg, env->block, sllv, srlv);
859 static ir_node *gen_Unknown(ir_node *node)
862 assert(mode_needs_gp_reg(get_irn_mode(node)));
863 return mips_create_zero();
868 * lower a copyB into standard Firm assembler :-)
870 ir_node *gen_code_for_CopyB(ir_node *block, ir_node *node) {
872 ir_node *dst = get_CopyB_dst(node);
873 ir_node *src = get_CopyB_src(node);
874 ir_type *type = get_CopyB_type(node);
875 ir_node *mem = get_CopyB_mem(node);
877 ir_node *result = NULL;
878 int size = get_type_size_bytes(type);
879 dbg_info *dbg = get_irn_dbg_info(node);
880 ir_graph *irg = get_irn_irg(block);
885 ir_node *phi, *projT, *projF, *cmp, *proj, *cond, *jmp, *in[2];
886 ir_node *new_bl, *src_phi, *dst_phi, *mem_phi, *add;
887 ir_mode *p_mode = get_irn_mode(src);
890 /* build the control loop */
891 in[0] = in[1] = new_r_Unknown(irg, mode_X);
893 new_bl = new_r_Block(irg, 2, in);
895 in[0] = cnt = new_Const_long(mode_Is, (size >> 4));
896 in[1] = new_r_Unknown(irg, mode_Is);
897 phi = new_r_Phi(irg, new_bl, 2, in, mode_Is);
899 sub = new_rd_Sub(dbg, irg, new_bl, phi, new_Const_long(mode_Is, -1), mode_Is);
900 set_Phi_pred(phi, 1, sub);
902 cmp = new_rd_Cmp(dbg, irg, new_bl, sub, new_Const_long(mode_Is, 0));
903 proj = new_r_Proj(irg, new_bl, cmp, mode_b, pn_Cmp_Lg);
904 cond = new_rd_Cond(dbg, irg, new_bl, proj);
906 projT = new_r_Proj(irg, new_bl, cond, mode_X, pn_Cond_true);
907 projF = new_r_Proj(irg, new_bl, cond, mode_X, pn_Cond_false);
909 jmp = get_Block_cfgpred(block, 0);
910 set_Block_cfgpred(block, 0, projF);
912 set_Block_cfgpred(new_bl, 0, jmp);
913 set_Block_cfgpred(new_bl, 1, projT);
919 in[1] = new_r_Unknown(irg, p_mode);
920 src_phi = new_r_Phi(irg, new_bl, 2, in, p_mode);
923 dst_phi = new_r_Phi(irg, new_bl, 2, in, p_mode);
925 add = new_rd_Add(dbg, irg, new_bl, src_phi, new_Const_long(mode_Is, 16), p_mode);
926 set_Phi_pred(src_phi, 1, add);
927 add = new_rd_Add(dbg, irg, new_bl, dst_phi, new_Const_long(mode_Is, 16), p_mode);
928 set_Phi_pred(dst_phi, 1, add);
931 in[1] = new_r_Unknown(irg, mode_M);
932 mem_phi = new_r_Phi(irg, new_bl, 2, in, mode_M);
937 /* create 4 parallel loads */
938 for (i = 0; i < 4; ++i) {
941 load = new_bd_mips_load_r(dbg, new_bl, mem_phi, src, mode_T);
942 attr = get_mips_attr(load);
943 attr->modes.load_store_mode = mode_Iu;
944 attr->tv = new_tarval_from_long(i * 4, mode_Iu);
946 ld[i] = new_rd_Proj(dbg, irg, new_bl, load, mode_Iu, pn_Load_res);
949 /* create 4 parallel stores */
950 for (i = 0; i < 4; ++i) {
953 store = new_bd_mips_store_r(dbg, new_bl, mem_phi, dst, ld[i], mode_T);
954 attr = get_mips_attr(store);
955 attr->modes.load_store_mode = mode_Iu;
956 attr->tv = new_tarval_from_long(i * 4, mode_Iu);
958 mm[i] = new_rd_Proj(dbg, irg, new_bl, store, mode_M, pn_Store_M);
960 mem = new_r_Sync(irg, new_bl, 4, mm);
962 set_Phi_pred(mem_phi, 1, mem);
965 // output store/loads manually
967 for(i = size; i > 0; ) {
969 ir_node *load, *store, *projv;
970 int offset = size - i;
982 load = new_bd_mips_load_r(dbg, block, mem, src, mode_T);
983 attr = get_mips_attr(load);
984 attr->modes.load_store_mode = mode;
985 attr->tv = new_tarval_from_long(offset, mode_Iu);
987 projv = new_rd_Proj(dbg, irg, block, load, mode, pn_Load_res);
989 store = new_bd_mips_store_r(dbg, block, mem, dst, projv, mode_T);
990 attr = get_mips_attr(store);
991 attr->modes.load_store_mode = mode;
992 attr->tv = new_tarval_from_long(offset, mode_Iu);
994 mm[n] = new_rd_Proj(dbg, irg, block, store, mode_M, pn_Store_M);
999 result = new_r_Sync(irg, block, n, mm);
1007 static void mips_fix_CopyB_Proj(mips_transform_env_t* env) {
1008 ir_node *node = env->irn;
1009 long n = get_Proj_proj(node);
1011 if(n == pn_CopyB_M_except) {
1012 panic("Unsupported Proj from CopyB");
1013 } else if(n == pn_CopyB_M_regular) {
1014 set_Proj_proj(node, pn_Store_M);
1015 } else if(n == pn_CopyB_M_except) {
1016 set_Proj_proj(node, pn_Store_X_except);
1021 static void mips_transform_Spill(mips_transform_env_t* env) {
1022 ir_node *node = env->irn;
1023 ir_node *sched_point = NULL;
1025 ir_node *nomem = new_NoMem();
1026 ir_node *ptr = get_irn_n(node, 0);
1027 ir_node *val = get_irn_n(node, 1);
1028 ir_entity *ent = be_get_frame_entity(node);
1030 if(sched_is_scheduled(node)) {
1031 sched_point = sched_prev(node);
1034 store = new_bd_mips_sw(env->dbg, env->block, ptr, val, nomem, ent, 0);
1037 sched_add_after(sched_point, store);
1041 exchange(node, store);
1044 static void mips_transform_Reload(mips_transform_env_t* env) {
1045 ir_node *node = env->irn;
1046 ir_node *sched_point = NULL;
1047 ir_node *load, *proj;
1048 ir_node *ptr = get_irn_n(node, 0);
1049 ir_node *mem = get_irn_n(node, 1);
1050 ir_entity *ent = be_get_frame_entity(node);
1051 const arch_register_t* reg;
1053 if(sched_is_scheduled(node)) {
1054 sched_point = sched_prev(node);
1057 load = new_bd_mips_lw(env->dbg, env->block, ptr, mem, ent, 0);
1059 proj = new_rd_Proj(env->dbg, env->irg, env->block, load, mode_Iu, pn_mips_lw_res);
1062 sched_add_after(sched_point, load);
1067 /* copy the register from the old node to the new Load */
1068 reg = arch_get_irn_register(node);
1069 arch_set_irn_register(proj, reg);
1071 exchange(node, proj);
1075 static ir_node *gen_AddSP(ir_node *node)
1077 ir_node *node = env->irn;
1080 const arch_register_t *reg;
1082 op1 = get_irn_n(node, 0);
1083 op2 = get_irn_n(node, 1);
1085 add = new_bd_mips_addu(env->dbg, env->block, op1, op2);
1087 /* copy the register requirements from the old node to the new node */
1088 reg = arch_get_irn_register(node);
1089 arch_set_irn_register(add, reg);
1095 /*********************************************************
1098 * _ __ ___ __ _ _ _ __ __| |_ __ ___ _____ _ __
1099 * | '_ ` _ \ / _` | | '_ \ / _` | '__| \ \ / / _ \ '__|
1100 * | | | | | | (_| | | | | | | (_| | | | |\ V / __/ |
1101 * |_| |_| |_|\__,_|_|_| |_| \__,_|_| |_| \_/ \___|_|
1103 *********************************************************/
1105 typedef ir_node *(*mips_transform_func) (ir_node *node);
1107 static void register_transformer(ir_op *op, mips_transform_func func)
1109 assert(op->ops.generic == NULL);
1110 op->ops.generic = (op_func) func;
1113 static void register_transformers(void)
1115 clear_irp_opcodes_generic_func();
1117 register_transformer(op_Add, gen_Add);
1118 register_transformer(op_Sub, gen_Sub);
1119 register_transformer(op_And, gen_And);
1120 register_transformer(op_Or, gen_Or);
1121 register_transformer(op_Eor, gen_Eor);
1122 register_transformer(op_Shl, gen_Shl);
1123 register_transformer(op_Shr, gen_Shr);
1124 register_transformer(op_Shrs, gen_Shrs);
1125 register_transformer(op_Not, gen_Not);
1126 register_transformer(op_Minus, gen_Minus);
1127 register_transformer(op_Div, gen_Div);
1128 register_transformer(op_Mod, gen_Mod);
1129 register_transformer(op_DivMod, gen_DivMod);
1130 register_transformer(op_Abs, gen_Abs);
1131 register_transformer(op_Load, gen_Load);
1132 register_transformer(op_Store, gen_Store);
1133 register_transformer(op_Cond, gen_Cond);
1134 register_transformer(op_Conv, gen_Conv);
1135 register_transformer(op_Const, gen_Const);
1136 register_transformer(op_SymConst, gen_SymConst);
1137 register_transformer(op_Unknown, gen_Unknown);
1138 register_transformer(op_Proj, gen_Proj);
1139 register_transformer(op_Phi, gen_Phi);
1142 void mips_transform_graph(mips_code_gen_t *cg)
1144 register_transformers();
1145 be_transform_graph(cg->birg, NULL);
1149 * Calls the transform functions for Spill and Reload.
1151 void mips_after_ra_walker(ir_node *node, void *env) {
1152 mips_code_gen_t *cg = env;
1153 mips_transform_env_t tenv;
1158 tenv.block = get_nodes_block(node);
1159 tenv.dbg = get_irn_dbg_info(node);
1160 tenv.irg = current_ir_graph;
1162 tenv.mode = get_irn_mode(node);
1165 if (be_is_Reload(node)) {
1166 mips_transform_Reload(&tenv);
1167 } else if (be_is_Spill(node)) {
1168 mips_transform_Spill(&tenv);