4 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
10 # 1 - caller save (register must be saved by the caller of a function)
11 # 2 - callee save (register must be saved by the called function)
12 # 4 - ignore (do not assign this register)
13 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold\
16 { name => "zero", type => 4 }, # always zero
17 { name => "at", type => 4 }, # reserved for assembler
18 { name => "v0", realname => "2", type => 1 }, # first return value
19 { name => "v1", realname => "3", type => 1 }, # second return value
20 { name => "a0", realname => "4", type => 1 }, # first argument
21 { name => "a1", realname => "5", type => 1 }, # second argument
22 { name => "a2", realname => "6", type => 1 }, # third argument
23 { name => "a3", realname => "7", type => 1 }, # fourth argument
24 { name => "t0", realname => "8", type => 1 },
25 { name => "t1", realname => "9", type => 1 },
26 { name => "t2", realname => "10", type => 1 },
27 { name => "t3", realname => "11", type => 1 },
28 { name => "t4", realname => "12", type => 1 },
29 { name => "t5", realname => "13", type => 1 },
30 { name => "t6", realname => "14", type => 1 },
31 { name => "t7", realname => "15", type => 1 },
32 { name => "s0", realname => "16", type => 2 },
33 { name => "s1", realname => "17", type => 2 },
34 { name => "s2", realname => "18", type => 2 },
35 { name => "s3", realname => "19", type => 2 },
36 { name => "s4", realname => "20", type => 2 },
37 { name => "s5", realname => "21", type => 2 },
38 { name => "s6", realname => "22", type => 2 },
39 { name => "s7", realname => "23", type => 2 },
40 { name => "t8", realname => "24", type => 1 },
41 { name => "t9", realname => "25", type => 1 },
42 { name => "kt0", type => 4 }, # reserved for OS
43 { name => "kt1", type => 4 }, # reserved for OS
44 { name => "gp", type => 4 }, # general purpose
45 { name => "sp", type => 4 }, # stack pointer
46 { name => "fp", type => 4 }, # frame pointer
47 { name => "ra", type => 2+1 }, # return address
48 { name => "gp_NOREG", realname => "!NOREG_INVALID!", type => 4 | 8 | 16 }, #dummy register for immediate nodes
54 S0 => "${arch}_emit_source_register(node, 0);",
55 S1 => "${arch}_emit_source_register(node, 1);",
56 SI1 => "${arch}_emit_source_register_or_immediate(node, 1);",
57 D0 => "${arch}_emit_dest_register(node, 0);",
58 A0 => "${arch}_emit_load_store_address(node, 0);",
59 I => "${arch}_emit_immediate_suffix(node, 1);",
60 C => "${arch}_emit_immediate(node);",
61 JumpTarget => "${arch}_emit_jump_target(node);",
62 JumpTarget1 => "${arch}_emit_jump_target_proj(node, 1);",
63 JumpOrFallthrough => "${arch}_emit_jump_or_fallthrough(node, 0);",
66 $default_attr_type = "mips_attr_t";
67 $default_copy_attr = "mips_copy_attr";
72 mips_attr_t => "\tinit_mips_attributes(res, flags, in_reqs, exec_units, n_res);",
74 mips_immediate_attr_t => "\tinit_mips_attributes(res, flags, in_reqs, exec_units, n_res);\n".
75 "\tinit_mips_immediate_attributes(res, imm_type, entity, val);",
77 mips_load_store_attr_t => "\tinit_mips_attributes(res, flags, in_reqs, exec_units, n_res);\n".
78 "\tinit_mips_load_store_attributes(res, entity, offset);",
82 mips_attr_t => "mips_compare_nodes_attr",
83 mips_immediate_attr_t => "mips_compare_immediate_attr",
84 mips_load_store_attr_t => "mips_compare_load_store_attr",
87 #--------------------------------------------------#
90 # _ __ _____ __ _ _ __ ___ _ __ ___ #
91 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
92 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
93 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
96 #--------------------------------------------------#
103 reg_req => { out => [ "gp_NOREG:I" ] },
104 attr => "mips_immediate_type_t imm_type, ir_entity *entity, long val",
105 attr_type => "mips_immediate_attr_t",
109 #-----------------------------------------------------------------#
112 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
113 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
114 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
115 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
118 #-----------------------------------------------------------------#
120 # commutative operations
124 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
125 ins => [ "left", "right" ],
126 emit => '. add%I%.u %D0, %S0, %SI1',
132 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
133 ins => [ "left", "right" ],
134 emit => '. and%I %D0, %S0, %SI1',
139 reg_req => { in => [ "gp", "gp" ], out => [ "none", "none" ] },
140 ins => [ "left", "right" ],
141 outs => [ "lohi", "M" ],
142 emit => '. div %S0, %S1',
147 reg_req => { in => [ "gp", "gp" ], out => [ "none", "none" ] },
148 ins => [ "left", "right" ],
149 outs => [ "lohi", "M" ],
150 emit => '. divu %S0, %S1',
155 reg_req => { in => [ "gp", "gp" ], out => [ "none" ] },
156 ins => [ "left", "right" ],
157 emit => '. mult %S0, %S1',
162 reg_req => { in => [ "gp", "gp" ], out => [ "none" ] },
163 ins => [ "left", "right" ],
164 emit => '. multu %S0, %S1',
170 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
171 emit => '. nor%I %D0, %S0, %SI1',
177 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
178 ins => [ "left", "right" ],
179 emit => '. or%I %D0, %S0, %SI1',
185 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
186 ins => [ "left", "right" ],
187 emit => '. sll %D0, %S0, %SI1',
193 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
194 ins => [ "left", "right" ],
195 emit => '. sra %D0, %S0, %SI1',
201 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
202 ins => [ "left", "right" ],
203 emit => '. srl %D0, %S0, %SI1',
209 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
210 ins => [ "left", "right" ],
211 emit => '. subu %D0, %S0, %S1',
217 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
218 ins => [ "left", "right" ],
219 emit => '. xor%I %D0, %S0, %SI1',
225 reg_req => { in => [ "gp" ], out => [ "gp" ] },
227 emit => '.seb %D0, %S0',
233 reg_req => { in => [ "gp" ], out => [ "gp" ] },
235 emit => '.seh %D0, %S0',
242 reg_req => { out => [ "gp" ] },
243 emit => '.lui %D0, %C',
244 attr_type => "mips_immediate_attr_t",
245 attr => "mips_immediate_type_t imm_type, ir_entity *entity, long val",
251 reg_req => { in => [ "none" ], out => [ "gp" ] },
253 emit => '. mflo %D0',
259 reg_req => { in => [ "none" ], out => [ "gp" ] },
261 emit => '. mfhi %D0',
268 reg_req => { out => [ "zero:I" ] },
275 # | __ ) _ __ __ _ _ __ ___| |__ / / | |_ _ _ __ ___ _ __
276 # | _ \| '__/ _` | '_ \ / __| '_ \ / / | | | | | '_ ` _ \| '_ \
277 # | |_) | | | (_| | | | | (__| | | |/ / |_| | |_| | | | | | | |_) |
278 # |____/|_| \__,_|_| |_|\___|_| |_/_/ \___/ \__,_|_| |_| |_| .__/
284 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
285 emit => '. slt%I %D0, %S0, %SI1',
291 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
292 emit => '. slt%I%.u %D0, %S0, %SI1',
298 reg_req => { in => [ "gp", "gp" ], out => [ "none", "none" ] },
299 outs => [ "false", "true" ],
300 emit => '. beq %S0, %S1, %JumpTarget1
301 . %JumpOrFallthrough'
306 reg_req => { in => [ "gp", "gp" ], out => [ "none", "none" ] },
307 outs => [ "false", "true" ],
308 emit => '. bne %S0, %S1, %JumpTarget1
309 . %JumpOrFallthrough'
314 reg_req => { in => [ "gp" ], out => [ "none", "none" ] },
315 outs => [ "false", "true" ],
316 emit => '. bgtz %S0, %JumpTarget1
317 . %JumpOrFallthrough'
322 reg_req => { in => [ "gp" ], out => [ "none", "none" ] },
323 outs => [ "false", "true" ],
324 emit => '. blez %S0, %JumpTarget1
325 . %JumpOrFallthrough'
330 reg_req => { in => [ ], out => [ "none" ] },
331 emit => '. b %JumpTarget',
337 reg_req => { in => [ "gp" ], out => [ "none" ] },
344 reg_req => { in => [ "gp" ], out => [ "none" ] },
349 # | | ___ __ _ __| | / / ___|| |_ ___ _ __ ___
350 # | | / _ \ / _` |/ _` | / /\___ \| __/ _ \| '__/ _ \
351 # | |__| (_) | (_| | (_| |/ / ___) | || (_) | | | __/
352 # |_____\___/ \__,_|\__,_/_/ |____/ \__\___/|_| \___|
357 state => "exc_pinned",
358 reg_req => { in => [ "gp", "none" ], out => [ "gp", "none" ] },
359 ins => [ "ptr", "mem" ],
360 outs => [ "res", "M" ],
361 emit => '. lw %D0, %A0',
362 attr_type => "mips_load_store_attr_t",
363 attr => "ir_entity *entity, long offset",
368 state => "exc_pinned",
369 reg_req => { in => [ "gp", "none" ], out => [ "gp", "none" ] },
370 ins => [ "ptr", "mem" ],
371 outs => [ "res", "M" ],
372 emit => '. lh %D0, %A0',
373 attr_type => "mips_load_store_attr_t",
374 attr => "ir_entity *entity, long offset",
379 state => "exc_pinned",
380 reg_req => { in => [ "gp", "none" ], out => [ "gp", "none" ] },
381 ins => [ "ptr", "mem" ],
382 outs => [ "res", "M" ],
383 emit => '. lhu %D0, %A0',
384 attr_type => "mips_load_store_attr_t",
385 attr => "ir_entity *entity, long offset",
390 state => "exc_pinned",
391 reg_req => { in => [ "gp", "none" ], out => [ "gp", "none" ] },
392 ins => [ "ptr", "mem" ],
393 outs => [ "res", "M" ],
394 emit => '. lb %D0, %A0',
395 attr_type => "mips_load_store_attr_t",
396 attr => "ir_entity *entity, long offset",
401 state => "exc_pinned",
402 reg_req => { in => [ "gp", "none" ], out => [ "gp", "none" ] },
403 ins => [ "ptr", "mem" ],
404 outs => [ "res", "M" ],
405 emit => '. lbu %D0, %A0',
406 attr_type => "mips_load_store_attr_t",
407 attr => "ir_entity *entity, long offset",
412 state => "exc_pinned",
413 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
414 ins => [ "ptr", "val", "mem" ],
415 emit => '. sw %S1, %A0',
417 attr_type => "mips_load_store_attr_t",
418 attr => "ir_entity *entity, long offset",
423 state => "exc_pinned",
424 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
425 ins => [ "ptr", "val", "mem" ],
426 emit => '. sh %S1, %A0',
428 attr_type => "mips_load_store_attr_t",
429 attr => "ir_entity *entity, long offset",
434 state => "exc_pinned",
435 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
436 ins => [ "ptr", "val", "mem" ],
437 emit => '. sb %S1, %A0',
439 attr_type => "mips_load_store_attr_t",
440 attr => "ir_entity *entity, long offset",
449 reg_req => { in => [], out => [ "none" ] },