3 # This is a template specification for the Firm-Backend
5 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
11 # The node description is done as a perl hash initializer with the
12 # following structure:
17 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
18 # "arity" => "0|1|2|3 ... |variable|dynamic|any",
19 # "state" => "floats|pinned|mem_pinned|exc_pinned",
21 # { "type" => "type 1", "name" => "name 1" },
22 # { "type" => "type 2", "name" => "name 2" },
25 # "comment" => "any comment for constructor",
26 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
27 # "cmp_attr" => "c source code for comparing node attributes",
28 # emit => "emit code with templates",
29 # "rd_constructor" => "c source code which constructs an ir_node"
32 # ... # (all nodes you need to describe)
34 # ); # close the %nodes initializer
36 # op_flags: flags for the operation, OPTIONAL (default is "N")
37 # the op_flags correspond to the firm irop_flags:
40 # C irop_flag_commutative
41 # X irop_flag_cfopcode
42 # I irop_flag_ip_cfopcode
45 # H irop_flag_highlevel
46 # c irop_flag_constlike
51 # I ignore for register allocation
53 # state: state of the operation, OPTIONAL (default is "floats")
55 # arity: arity of the operation, MUST NOT BE OMITTED
57 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
58 # are always the first 3 arguments and are always autmatically
60 # If this key is missing the following arguments will be created:
61 # for i = 1 .. arity: ir_node *op_i
64 # outs: if a node defines more than one output, the names of the projections
65 # nodes having outs having automatically the mode mode_T
67 # comment: OPTIONAL comment for the node constructor
69 # rd_constructor: for every operation there will be a
70 # new_rd_<arch>_<op-name> function with the arguments from above
71 # which creates the ir_node corresponding to the defined operation
72 # you can either put the complete source code of this function here
74 # This key is OPTIONAL. If omitted, the following constructor will
76 # if (!op_<arch>_<op-name>) assert(0);
80 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
83 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
87 # 1 - caller save (register must be saved by the caller of a function)
88 # 2 - callee save (register must be saved by the called function)
89 # 4 - ignore (do not assign this register)
90 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold\
93 { name => "zero", type => 4+2 }, # always zero
94 { name => "at", type => 4 }, # reserved for assembler
95 { name => "v0", type => 1 }, # first return value
96 { name => "v1", type => 1 }, # second return value
97 { name => "a0", type => 1 }, # first argument
98 { name => "a1", type => 1 }, # second argument
99 { name => "a2", type => 1 }, # third argument
100 { name => "a3", type => 1 }, # fourth argument
101 { name => "t0", type => 1 },
102 { name => "t1", type => 1 },
103 { name => "t2", type => 1 },
104 { name => "t3", type => 1 },
105 { name => "t4", type => 1 },
106 { name => "t5", type => 1 },
107 { name => "t6", type => 1 },
108 { name => "t7", type => 1 },
109 { name => "s0", type => 2 },
110 { name => "s1", type => 2 },
111 { name => "s2", type => 2 },
112 { name => "s3", type => 2 },
113 { name => "s4", type => 2 },
114 { name => "s5", type => 2 },
115 { name => "s6", type => 2 },
116 { name => "s7", type => 2 },
117 { name => "t8", type => 1 },
118 { name => "t9", type => 1 },
119 { name => "k0", type => 4 }, # reserved for OS
120 { name => "k1", type => 4 }, # reserved for OS
121 { name => "gp", type => 4 }, # general purpose
122 { name => "sp", type => 4+2 }, # stack pointer
123 { name => "fp", type => 4+2 }, # frame pointer
124 { name => "ra", type => 2+1 }, # return address. This is also caller save, because
125 # the jla instruction that is used for calls modifies
126 # the ra register. It is callee save too, because at the last
127 # command of a function (the ja $ra) it needs to have it's
133 #--------------------------------------------------#
136 # _ __ _____ __ _ _ __ ___ _ __ ___ #
137 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
138 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
139 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
142 #--------------------------------------------------#
146 #-----------------------------------------------------------------#
149 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
150 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
151 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
152 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
155 #-----------------------------------------------------------------#
157 # commutative operations
161 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
162 emit => '. addu %D1, %S1, %S2'
166 reg_req => { in => [ "gp" ], out => [ "gp" ] },
167 emit => '. addiu %D1, %S1, %C',
168 cmp_attr => 'return attr_a->tv != attr_b->tv;',
173 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
174 emit => '. and %D1, %S1, %S2',
178 reg_req => { in => [ "gp" ], out => [ "gp" ] },
179 emit => '. andi %D1, %S1, %C',
180 cmp_attr => 'return attr_a->tv != attr_b->tv;',
184 reg_req => { in => [ "gp", "gp" ], out => [ "none", "none", "none", "none" ] },
186 mips_attr_t *attr = get_mips_attr(n);
187 if (attr->modes.original_mode->sign) {
197 reg_req => { in => [ "gp", "gp" ], out => [ "none" ] },
199 if (mode_is_signed(get_irn_mode(n))) {
210 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
211 emit => '. nor %D1, %S1, %S2'
215 reg_req => { in => [ "gp" ], out => [ "gp" ] },
216 emit => '. nor %D1, %S1, $zero'
221 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
222 emit => '. or %D1, %S1, %S2'
226 reg_req => { in => [ "gp" ], out => [ "gp" ] },
227 emit => '. ori %D1, %S1, %C',
228 cmp_attr => 'return attr_a->tv != attr_b->tv;',
232 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
234 if (mode_is_signed(get_irn_mode(n))) {
244 reg_req => { in => [ "gp" ], out => [ "gp" ] },
246 if (mode_is_signed(get_irn_mode(n))) {
256 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
257 emit => '. sra %D1, %S1, %S2',
261 reg_req => { in => [ "gp" ], out => [ "gp" ] },
262 emit => '. sra %D1, %S1, %C',
263 cmp_attr => 'return attr_a->tv != attr_b->tv;',
267 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
269 if (mode_is_signed(get_irn_mode(n))) {
279 reg_req => { in => [ "gp" ], out => [ "gp" ] },
281 if (mode_is_signed(get_irn_mode(n))) {
291 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
292 emit => '. srlv %D1, %S1, %S2',
296 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
297 emit => '. sllv %D1, %S1, %S2',
301 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
302 emit => '. subu %D1, %S1, %S2',
306 reg_req => { in => [ "gp" ], out => [ "gp" ] },
307 emit => '. subu %D1, $zero, %S1',
311 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
312 emit => '. xor %D1, %S1, %S2'
316 reg_req => { in => [ "gp" ], out => [ "gp" ] },
317 emit => '. xori %D1, %S1, %C',
318 cmp_attr => 'return attr_a->tv != attr_b->tv;',
322 # / ___|___ _ __ ___| |_ __ _ _ __ | |_ ___
323 # | | / _ \| '_ \/ __| __/ _` | '_ \| __/ __|
324 # | |__| (_) | | | \__ \ || (_| | | | | |_\__ \
325 # \____\___/|_| |_|___/\__\__,_|_| |_|\__|___/
328 # load upper imediate
331 reg_req => { out => [ "gp" ] },
332 emit => '. lui %D1, %C',
333 cmp_attr => 'return attr_a->tv != attr_b->tv;',
336 # load lower immediate
339 reg_req => { in => [ "gp" ], out => [ "gp" ] },
340 emit => '. ori %D1, %S1, %C',
341 cmp_attr => 'return attr_a->tv != attr_b->tv;',
346 reg_req => { out => [ "gp" ] },
347 emit => '. la %D1, %C',
348 cmp_attr => 'return attr_a->symconst_id != attr_b->symconst_id;',
352 reg_req => { in => [ "none" ], out => [ "gp" ] },
357 reg_req => { in => [ "none" ], out => [ "gp" ] },
362 reg_req => { out => [ "zero" ] },
368 # | __ ) _ __ __ _ _ __ ___| |__ / / | |_ _ _ __ ___ _ __
369 # | _ \| '__/ _` | '_ \ / __| '_ \ / / | | | | | '_ ` _ \| '_ \
370 # | |_) | | | (_| | | | | (__| | | |/ / |_| | |_| | | | | | | |_) |
371 # |____/|_| \__,_|_| |_|\___|_| |_/_/ \___/ \__,_|_| |_| |_| .__/
376 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
378 if (mode_is_signed(get_irn_mode(n))) {
382 2. sltu %D1, %S1, %S2
388 reg_req => { in => [ "gp" ], out => [ "gp" ] },
390 if (mode_is_signed(get_irn_mode(n))) {
394 2. sltiu %D1, %S1, %C
397 cmp_attr => 'return attr_a->tv != attr_b->tv;',
403 reg_req => { in => [ "gp", "gp" ], out => [ "in_r0", "none" ] },
405 ir_node *jumpblock = mips_get_jump_block(n, 1);
406 assert(jumpblock != NULL);
408 lc_efprintf(arg_env, F, "\tbeq %1S, %2S, BLOCK_%d\n", n, n, get_irn_node_nr(jumpblock));
415 reg_req => { in => [ "gp", "gp" ], out => [ "in_r0", "none" ] },
417 ir_node *jumpblock = mips_get_jump_block(n, 1);
418 assert(jumpblock != NULL);
420 lc_efprintf(arg_env, F, "\tbne %1S, %2S, BLOCK_%d\n", n, n, get_irn_node_nr(jumpblock));
427 reg_req => { in => [ "gp" ], out => [ "in_r0", "none" ] },
429 ir_node *jumpblock = mips_get_jump_block(n, 1);
430 assert(jumpblock != NULL);
432 lc_efprintf(arg_env, F, "\tbgtz %1S, BLOCK_%d\n", n, get_irn_node_nr(jumpblock));
439 reg_req => { in => [ "gp" ], out => [ "in_r0", "none" ] },
441 ir_node *jumpblock = mips_get_jump_block(n, 1);
442 assert(jumpblock != NULL);
444 lc_efprintf(arg_env, F, "\tblez %1S, BLOCK_%d\n", n, get_irn_node_nr(jumpblock));
450 reg_req => { in => [ "gp" ] },
457 reg_req => { in => [ ], out => [ "none" ] },
459 ir_node *jumpblock = get_irn_link(n);
460 assert(jumpblock != NULL);
462 lc_efprintf(arg_env, F, "\tb BLOCK_%d\t\t\t# mips_b\n", get_irn_node_nr(jumpblock));
469 reg_req => { in => [ ], out => [ "none" ] },
470 emit => '. # fallthrough'
476 reg_req => { in => [ "gp" ], out => [ "none" ] },
482 # | | / _ \ / _` |/ _` |
483 # | |__| (_) | (_| | (_| |
484 # |_____\___/ \__,_|\__,_|
488 reg_req => { in => [ "none", "gp" ], out => [ "none", "none", "gp" ] },
490 mips_attr_t* attr = get_mips_attr(n);
493 mode = attr->modes.load_store_mode;
495 switch (get_mode_size_bits(mode)) {
497 if (mode_is_signed(mode)) {
505 if (mode_is_signed(mode)) {
516 assert(! "Only 8, 16 and 32 bit loads supported");
520 cmp_attr => 'return attr_a->tv != attr_b->tv || attr_a->stack_entity != attr_b->stack_entity;',
525 # | | ___ __ _ __| | / / ___|| |_ ___ _ __ ___
526 # | | / _ \ / _` |/ _` | / /\___ \| __/ _ \| '__/ _ \
527 # | |__| (_) | (_| | (_| |/ / ___) | || (_) | | | __/
528 # |_____\___/ \__,_|\__,_/_/ |____/ \__\___/|_| \___|
532 reg_req => { in => [ "none", "gp", "gp" ], out => [ "none", "none" ] },
534 mips_attr_t* attr = get_mips_attr(n);
537 mode = attr->modes.load_store_mode;
539 switch (get_mode_size_bits(mode)) {
541 if (mode_is_signed(mode))
545 if (mode_is_signed(mode))
552 assert(! "Only 8, 16 and 32 bit stores supported");
556 cmp_attr => 'return attr_a->tv != attr_b->tv;',
560 reg_req => { in => [ "none", "none", "gp" ], out => [ "none", "none" ] },
562 mips_attr_t* attr = get_mips_attr(n);
565 mode = attr->modes.load_store_mode;
567 switch (get_mode_size_bits(mode)) {
578 assert(! "Only 8, 16 and 32 bit stores supported");
583 return attr_a->stack_entity != attr_b->stack_entity;
588 reg_req => { in => [ "gp" ], out => [ "gp" ] },
589 emit => '. or %D1, $zero, %S1'
596 reinterpret_conv => {
597 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
598 emit => '. # reinterpret %S1 -> %D1',
607 reg_req => { in => [], out => [ "none" ] },
608 emit => '. nop # nop',