2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The main mips backend driver file.
23 * @author Matthias Braun, Mehdi
30 #include "pseudo_irg.h"
47 #include "../bearch_t.h"
48 #include "../benode_t.h"
49 #include "../belower.h"
50 #include "../besched_t.h"
53 #include "../bemachine.h"
54 #include "../bemodule.h"
55 #include "../bespillslots.h"
56 #include "../beemitter.h"
57 #include "../begnuas.h"
59 #include "bearch_mips_t.h"
61 #include "mips_new_nodes.h"
62 #include "gen_mips_regalloc_if.h"
63 #include "mips_transform.h"
64 #include "mips_emitter.h"
65 #include "mips_map_regs.h"
66 #include "mips_util.h"
67 #include "mips_scheduler.h"
69 #define DEBUG_MODULE "firm.be.mips.isa"
71 /* TODO: ugly, but we need it to get access to the registers assigned to Phi nodes */
72 static set *cur_reg_set = NULL;
74 /**************************************************
77 * _ __ ___ __ _ __ _| | | ___ ___ _| |_
78 * | '__/ _ \/ _` | / _` | | |/ _ \ / __| | | _|
79 * | | | __/ (_| | | (_| | | | (_) | (__ | | |
80 * |_| \___|\__, | \__,_|_|_|\___/ \___| |_|_|
83 **************************************************/
86 * Return register requirements for a mips node.
87 * If the node returns a tuple (mode_T) then the proj's
88 * will be asked for this information.
91 arch_register_req_t *mips_get_irn_reg_req(const void *self,
92 const ir_node *node, int pos)
94 long node_pos = pos == -1 ? 0 : pos;
95 ir_mode *mode = get_irn_mode(node);
98 if (is_Block(node) || mode == mode_X || mode == mode_M) {
99 return arch_no_register_req;
102 if (mode == mode_T && pos < 0) {
103 return arch_no_register_req;
107 /* in case of a proj, we need to get the correct OUT slot */
108 /* of the node corresponding to the proj number */
110 node_pos = mips_translate_proj_pos(node);
116 node = skip_Proj_const(node);
119 /* get requirements for our own nodes */
120 if (is_mips_irn(node)) {
121 const arch_register_req_t *req;
123 req = get_mips_in_req(node, pos);
125 req = get_mips_out_req(node, node_pos);
131 /* unknown should be translated by now */
132 assert(!is_Unknown(node));
134 return arch_no_register_req;
137 static void mips_set_irn_reg(const void *self, ir_node *irn,
138 const arch_register_t *reg)
145 if (get_irn_mode(irn) == mode_X) {
149 pos = mips_translate_proj_pos(irn);
150 irn = skip_Proj(irn);
153 if (is_mips_irn(irn)) {
154 const arch_register_t **slots;
156 slots = get_mips_slots(irn);
159 /* here we set the registers for the Phi nodes */
160 mips_set_firm_reg(irn, reg, cur_reg_set);
164 static const arch_register_t *mips_get_irn_reg(const void *self,
168 const arch_register_t *reg = NULL;
173 if (get_irn_mode(irn) == mode_X) {
177 pos = mips_translate_proj_pos(irn);
178 irn = skip_Proj_const(irn);
181 if (is_mips_irn(irn)) {
182 const arch_register_t **slots;
183 slots = get_mips_slots(irn);
187 reg = mips_get_firm_reg(irn, cur_reg_set);
193 static arch_irn_class_t mips_classify(const void *self, const ir_node *irn)
196 irn = skip_Proj_const(irn);
199 return arch_irn_class_branch;
200 } else if (is_mips_irn(irn)) {
201 return arch_irn_class_normal;
207 static arch_irn_flags_t mips_get_flags(const void *self, const ir_node *irn)
210 irn = skip_Proj_const(irn);
212 if (!is_mips_irn(irn))
215 return get_mips_flags(irn);
218 int mips_is_Load(const ir_node *node)
220 return is_mips_lw(node) || is_mips_lh(node) || is_mips_lhu(node) ||
221 is_mips_lb(node) || is_mips_lbu(node);
224 int mips_is_Store(const ir_node *node)
226 return is_mips_sw(node) || is_mips_sh(node) || is_mips_sb(node);
229 static ir_entity *mips_get_frame_entity(const void *self, const ir_node *node)
231 const mips_load_store_attr_t *attr;
234 if(!is_mips_irn(node))
236 if(!mips_is_Load(node) && !mips_is_Store(node))
239 attr = get_mips_load_store_attr_const(node);
240 return attr->stack_entity;
243 static void mips_set_frame_entity(const void *self, ir_node *node,
246 mips_load_store_attr_t *attr;
249 if(!is_mips_irn(node)) {
250 panic("trying to set frame entity on non load/store node %+F\n", node);
252 if(!mips_is_Load(node) && !mips_is_Store(node)) {
253 panic("trying to set frame entity on non load/store node %+F\n", node);
256 attr = get_irn_generic_attr(node);
257 attr->stack_entity = entity;
261 * This function is called by the generic backend to correct offsets for
262 * nodes accessing the stack.
264 static void mips_set_frame_offset(const void *self, ir_node *node, int offset)
266 mips_load_store_attr_t *attr;
269 if(!is_mips_irn(node)) {
270 panic("trying to set frame offset on non load/store node %+F\n", node);
272 if(!mips_is_Load(node) && !mips_is_Store(node)) {
273 panic("trying to set frame offset on non load/store node %+F\n", node);
276 attr = get_irn_generic_attr(node);
277 attr->offset += offset;
279 if(attr->offset < -32768 || attr->offset > 32767) {
280 panic("Out of stack space! (mips supports only 16bit offsets)");
284 static int mips_get_sp_bias(const void *self, const ir_node *irn)
291 /* fill register allocator interface */
293 static const arch_irn_ops_t mips_irn_ops = {
294 mips_get_irn_reg_req,
299 mips_get_frame_entity,
300 mips_set_frame_entity,
301 mips_set_frame_offset,
303 NULL, /* get_inverse */
304 NULL, /* get_op_estimated_cost */
305 NULL, /* possible_memory_operand */
306 NULL, /* perform_memory_operand */
309 /**************************************************
312 * ___ ___ __| | ___ __ _ ___ _ __ _| |_
313 * / __/ _ \ / _` |/ _ \/ _` |/ _ \ '_ \ | | _|
314 * | (_| (_) | (_| | __/ (_| | __/ | | | | | |
315 * \___\___/ \__,_|\___|\__, |\___|_| |_| |_|_|
318 **************************************************/
328 * Ext-Block walker: create a block schedule
330 static void create_block_list(ir_extblk *blk, void *env) {
334 for (i = 0, n = get_extbb_n_blocks(blk); i < n; ++i) {
335 ir_node *block = get_extbb_block(blk, i);
337 set_irn_link(block, NULL);
339 set_irn_link(list->end, block);
348 /* return the scheduled block at position pos */
349 ir_node *mips_get_sched_block(const mips_code_gen_t *cg, int pos) {
350 if (0 <= pos && pos < ARR_LEN(cg->bl_list))
351 return cg->bl_list[pos];
355 /* return the number of scheduled blocks */
356 int mips_get_sched_n_blocks(const mips_code_gen_t *cg) {
357 return ARR_LEN(cg->bl_list);
360 /* set a block schedule number */
361 void mips_set_block_sched_nr(ir_node *block, int nr) {
362 set_irn_link(block, INT_TO_PTR(nr));
365 /* get a block schedule number */
366 int mips_get_block_sched_nr(ir_node *block) {
367 return PTR_TO_INT(get_irn_link(block));
371 * Creates a block schedule for the given graph.
373 static void mips_create_block_sched(mips_code_gen_t *cg) {
375 ir_node **bl_list, *block;
379 DEL_ARR_F(cg->bl_list);
380 free_survive_dce(cg->bl_list_sdce);
383 /* calculate the block schedule here */
384 compute_extbb(cg->irg);
389 irg_extblock_walk_graph(cg->irg, NULL, create_block_list, &list);
392 bl_list = NEW_ARR_F(ir_node *, list.cnt);
393 cg->bl_list_sdce = new_survive_dce();
394 for (i = 0, block = list.start; block; block = get_irn_link(block)) {
396 survive_dce_register_irn(cg->bl_list_sdce, &bl_list[i]);
400 cg->bl_list = bl_list;
404 typedef struct _wenv_t {
409 * Walker: link all CopyB nodes
411 static void collect_copyb_nodes(ir_node *node, void *env) {
414 if (get_irn_op(node) == op_CopyB) {
415 set_irn_link(node, wenv->list);
421 static void replace_copyb_nodes(mips_code_gen_t *cg) {
424 ir_node *copy, *next;
425 ir_node *old_bl, *new_bl, *jmp, *new_jmp, *mem;
426 const ir_edge_t *edge;
428 /* build code for all copyB */
430 irg_walk_graph(cg->irg, NULL, collect_copyb_nodes, &env);
432 for (copy = env.list; copy; copy = next) {
433 next = get_irn_link(copy);
435 old_bl = get_nodes_block(copy);
437 jmp = get_Block_cfgpred(old_bl, 0);
438 new_jmp = new_r_Jmp(cg->irg, get_nodes_block(copy));
440 new_bl = new_r_Block(cg->irg, 1, &new_jmp);
441 set_nodes_block(jmp, new_bl);
443 mem = gen_code_for_CopyB(new_bl, copy);
445 /* fix copyB's out edges */
446 foreach_out_edge(copy, edge) {
447 ir_node *succ = get_edge_src_irn(edge);
449 assert(is_Proj(succ));
450 switch (get_Proj_proj(succ)) {
451 case pn_CopyB_M_regular:
452 case pn_CopyB_M_except:
456 exchange(succ, get_irg_bad(cg->irg));
465 * Transforms the standard firm graph into
468 static void mips_prepare_graph(void *self) {
469 mips_code_gen_t *cg = self;
472 // replace all copyb nodes in the block with a loop
473 // and mips store/load nodes
474 replace_copyb_nodes(cg);
476 // Calculate block schedule
477 mips_create_block_sched(cg);
479 /* enter the block number into every blocks link field */
480 for (bl_nr = 0, n = mips_get_sched_n_blocks(cg); bl_nr < n; ++bl_nr) {
481 ir_node *bl = mips_get_sched_block(cg, bl_nr);
482 mips_set_block_sched_nr(bl, bl_nr);
485 // walk the graph and transform firm nodes into mips nodes where possible
486 mips_transform_graph(cg);
487 dump_ir_block_graph_sched(cg->irg, "-transformed");
491 * Called immediately before emit phase.
493 static void mips_finish_irg(void *self) {
494 mips_code_gen_t *cg = self;
495 ir_graph *irg = cg->irg;
497 dump_ir_block_graph_sched(irg, "-mips-finished");
502 * These are some hooks which must be filled but are probably not needed.
504 static void mips_before_sched(void *self)
509 static void mips_before_ra(void *self)
514 static void mips_after_ra(void* self)
516 mips_code_gen_t *cg = self;
517 be_coalesce_spillslots(cg->birg);
518 irg_walk_blkwise_graph(cg->irg, NULL, mips_after_ra_walker, self);
522 * Emits the code, closes the output file and frees
523 * the code generator interface.
525 static void mips_emit_and_done(void *self)
527 mips_code_gen_t *cg = self;
528 ir_graph *irg = cg->irg;
531 mips_gen_routine(cg, irg);
535 /* de-allocate code generator */
536 del_set(cg->reg_set);
538 DEL_ARR_F(cg->bl_list);
539 free_survive_dce(cg->bl_list_sdce);
544 static void *mips_cg_init(be_irg_t *birg);
546 static const arch_code_generator_if_t mips_code_gen_if = {
548 NULL, /* get_pic_base */
549 NULL, /* before abi introduce */
552 mips_before_sched, /* before scheduling hook */
553 mips_before_ra, /* before register allocation hook */
560 * Initializes the code generator.
562 static void *mips_cg_init(be_irg_t *birg)
564 const arch_env_t *arch_env = be_get_birg_arch_env(birg);
565 mips_isa_t *isa = (mips_isa_t *) arch_env->isa;
566 mips_code_gen_t *cg = xmalloc(sizeof(*cg));
568 cg->impl = &mips_code_gen_if;
569 cg->irg = be_get_birg_irg(birg);
570 cg->reg_set = new_set(mips_cmp_irn_reg_assoc, 1024);
571 cg->arch_env = arch_env;
576 cur_reg_set = cg->reg_set;
580 return (arch_code_generator_t *)cg;
584 /*****************************************************************
585 * ____ _ _ _____ _____
586 * | _ \ | | | | |_ _|/ ____| /\
587 * | |_) | __ _ ___| | _____ _ __ __| | | | | (___ / \
588 * | _ < / _` |/ __| |/ / _ \ '_ \ / _` | | | \___ \ / /\ \
589 * | |_) | (_| | (__| < __/ | | | (_| | _| |_ ____) / ____ \
590 * |____/ \__,_|\___|_|\_\___|_| |_|\__,_| |_____|_____/_/ \_\
592 *****************************************************************/
594 static mips_isa_t mips_isa_template = {
597 &mips_gp_regs[REG_SP],
598 &mips_gp_regs[REG_FP],
599 -1, /* stack direction */
600 1, /* stack alignment for calls */
601 NULL, /* main environment */
603 5, /* reload costs */
609 * Initializes the backend ISA and opens the output file.
611 static void *mips_init(FILE *file_handle) {
612 static int inited = 0;
619 isa = xcalloc(1, sizeof(isa[0]));
620 memcpy(isa, &mips_isa_template, sizeof(isa[0]));
622 be_emit_init(file_handle);
624 mips_register_init();
625 mips_create_opcodes(&mips_irn_ops);
626 // mips_init_opcode_transforms();
628 /* we mark referenced global entities, so we can only emit those which
629 * are actually referenced. (Note: you mustn't use the type visited flag
630 * elsewhere in the backend)
632 inc_master_type_visited();
638 * Closes the output file and frees the ISA structure.
640 static void mips_done(void *self)
642 mips_isa_t *isa = self;
644 be_gas_emit_decls(isa->arch_isa.main_env, 1);
650 static unsigned mips_get_n_reg_class(const void *self)
656 static const arch_register_class_t *mips_get_reg_class(const void *self,
660 assert(i < N_CLASSES);
661 return &mips_reg_classes[i];
667 * Get the register class which shall be used to store a value of a given mode.
668 * @param self The this pointer.
669 * @param mode The mode in question.
670 * @return A register class which can hold values of the given mode.
672 const arch_register_class_t *mips_get_reg_class_for_mode(const void *self,
677 ASSERT_NO_FLOAT(mode);
678 return &mips_reg_classes[CLASS_mips_gp];
682 be_abi_call_flags_bits_t flags;
683 const arch_isa_t *isa;
684 const arch_env_t *arch_env;
686 // do special handling to support debuggers
690 static void *mips_abi_init(const be_abi_call_t *call, const arch_env_t *arch_env, ir_graph *irg)
692 mips_abi_env_t *env = xmalloc(sizeof(env[0]));
693 be_abi_call_flags_t fl = be_abi_call_get_flags(call);
694 env->flags = fl.bits;
696 env->arch_env = arch_env;
697 env->isa = arch_env->isa;
702 static void mips_abi_dont_save_regs(void *self, pset *s)
704 mips_abi_env_t *env = self;
706 if(env->flags.try_omit_fp)
707 pset_insert_ptr(s, env->isa->bp);
710 static const arch_register_t *mips_abi_prologue(void *self, ir_node** mem, pmap *reg_map)
712 mips_abi_env_t *env = self;
713 ir_graph *irg = env->irg;
714 ir_node *block = get_irg_start_block(env->irg);
715 ir_node *sp = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_SP]);
716 ir_node *fp = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_FP]);
717 int initialstackframesize;
721 * The calling conventions wants a stack frame of at least 24bytes size with
722 * a0-a3 saved in offset 0-12
723 * fp saved in offset 16
724 * ra saved in offset 20
727 ir_node *sync, *reg, *store;
728 initialstackframesize = 24;
730 // - setup first part of stackframe
731 sp = new_rd_mips_addu(NULL, irg, block, sp,
732 mips_create_Immediate(initialstackframesize));
733 mips_set_irn_reg(NULL, sp, &mips_gp_regs[REG_SP]);
734 set_mips_flags(sp, arch_irn_flags_ignore);
736 /* TODO: where to get an edge with a0-a3
738 for(i = 0; i < 4; ++i) {
739 ir_node *reg = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_A0 + i]);
740 ir_node *store = new_rd_mips_store_r(dbg, irg, block, *mem, sp, reg, mode_T);
741 attr = get_mips_attr(store);
742 attr->load_store_mode = mode_Iu;
743 attr->tv = new_tarval_from_long(i * 4, mode_Is);
745 mm[i] = new_r_Proj(irg, block, store, mode_M, pn_Store_M);
749 reg = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_FP]);
750 store = new_rd_mips_sw(NULL, irg, block, sp, reg, *mem, NULL, 16);
754 reg = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_RA]);
755 store = new_rd_mips_sw(NULL, irg, block, sp, reg, *mem, NULL, 20);
759 /* Note: ideally we would route these mem edges directly towards the
760 * epilogue, but this is currently not supported so we sync all mems
762 sync = new_r_Sync(irg, block, 2, mm+4);
765 ir_node *reg, *store;
766 initialstackframesize = 4;
768 // save old framepointer
769 sp = new_rd_mips_addu(NULL, irg, block, sp,
770 mips_create_Immediate(-initialstackframesize));
771 mips_set_irn_reg(NULL, sp, &mips_gp_regs[REG_SP]);
772 set_mips_flags(sp, arch_irn_flags_ignore);
774 reg = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_FP]);
775 store = new_rd_mips_sw(NULL, irg, block, sp, reg, *mem, NULL, 0);
780 // setup framepointer
781 fp = new_rd_mips_addu(NULL, irg, block, sp,
782 mips_create_Immediate(-initialstackframesize));
783 mips_set_irn_reg(NULL, fp, &mips_gp_regs[REG_FP]);
784 set_mips_flags(fp, arch_irn_flags_ignore);
786 be_abi_reg_map_set(reg_map, &mips_gp_regs[REG_FP], fp);
787 be_abi_reg_map_set(reg_map, &mips_gp_regs[REG_SP], sp);
789 return &mips_gp_regs[REG_SP];
792 static void mips_abi_epilogue(void *self, ir_node *block, ir_node **mem, pmap *reg_map)
794 mips_abi_env_t *env = self;
796 ir_graph *irg = env->irg;
797 ir_node *sp = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_SP]);
798 ir_node *fp = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_FP]);
800 int initial_frame_size = env->debug ? 24 : 4;
801 int fp_save_offset = env->debug ? 16 : 0;
804 sp = new_rd_mips_or(NULL, irg, block, fp, mips_create_zero());
805 mips_set_irn_reg(NULL, sp, &mips_gp_regs[REG_SP]);
806 set_mips_flags(sp, arch_irn_flags_ignore);
809 load = new_rd_mips_lw(NULL, irg, block, sp, *mem, NULL,
810 fp_save_offset - initial_frame_size);
811 set_mips_flags(load, arch_irn_flags_ignore);
813 fp = new_r_Proj(irg, block, load, mode_Iu, pn_mips_lw_res);
814 *mem = new_r_Proj(irg, block, load, mode_Iu, pn_mips_lw_M);
815 arch_set_irn_register(env->arch_env, fp, &mips_gp_regs[REG_FP]);
817 be_abi_reg_map_set(reg_map, &mips_gp_regs[REG_FP], fp);
818 be_abi_reg_map_set(reg_map, &mips_gp_regs[REG_SP], sp);
822 * Produces the type which sits between the stack args and the locals on the stack.
823 * it will contain the return address and space to store the old frame pointer.
824 * @return The Firm type modelling the ABI between type.
826 static ir_type *mips_abi_get_between_type(void *self) {
827 mips_abi_env_t *env = self;
829 static ir_type *debug_between_type = NULL;
830 static ir_type *opt_between_type = NULL;
831 static ir_entity *old_fp_ent = NULL;
833 if(env->debug && debug_between_type == NULL) {
834 ir_entity *a0_ent, *a1_ent, *a2_ent, *a3_ent;
835 ir_entity *ret_addr_ent;
836 ir_type *ret_addr_type = new_type_primitive(new_id_from_str("return_addr"), mode_P);
837 ir_type *old_fp_type = new_type_primitive(new_id_from_str("fp"), mode_P);
838 ir_type *old_param_type = new_type_primitive(new_id_from_str("param"), mode_Iu);
840 debug_between_type = new_type_class(new_id_from_str("mips_between_type"));
841 a0_ent = new_entity(debug_between_type, new_id_from_str("a0_ent"), old_param_type);
842 a1_ent = new_entity(debug_between_type, new_id_from_str("a1_ent"), old_param_type);
843 a2_ent = new_entity(debug_between_type, new_id_from_str("a2_ent"), old_param_type);
844 a3_ent = new_entity(debug_between_type, new_id_from_str("a3_ent"), old_param_type);
845 old_fp_ent = new_entity(debug_between_type, new_id_from_str("old_fp"), old_fp_type);
846 ret_addr_ent = new_entity(debug_between_type, new_id_from_str("ret_addr"), ret_addr_type);
848 set_entity_offset(a0_ent, 0);
849 set_entity_offset(a1_ent, 4);
850 set_entity_offset(a2_ent, 8);
851 set_entity_offset(a3_ent, 12);
852 set_entity_offset(old_fp_ent, 16);
853 set_entity_offset(ret_addr_ent, 20);
855 set_type_size_bytes(debug_between_type, 24);
856 } else if(!env->debug && opt_between_type == NULL) {
857 ir_type *old_fp_type = new_type_primitive(new_id_from_str("fp"), mode_P);
858 ir_entity *old_fp_ent;
860 opt_between_type = new_type_class(new_id_from_str("mips_between_type"));
861 old_fp_ent = new_entity(opt_between_type, new_id_from_str("old_fp"), old_fp_type);
862 set_entity_offset(old_fp_ent, 0);
863 set_type_size_bytes(opt_between_type, 4);
866 return env->debug ? debug_between_type : opt_between_type;
869 static const be_abi_callbacks_t mips_abi_callbacks = {
872 mips_abi_get_between_type,
873 mips_abi_dont_save_regs,
879 * Get the ABI restrictions for procedure calls.
880 * @param self The this pointer.
881 * @param method_type The type of the method (procedure) in question.
882 * @param abi The abi object to be modified
884 static void mips_get_call_abi(const void *self, ir_type *method_type,
889 int n = get_method_n_params(method_type);
893 const arch_register_t *reg;
894 be_abi_call_flags_t call_flags;
897 memset(&call_flags, 0, sizeof(call_flags));
898 call_flags.bits.left_to_right = 0;
899 call_flags.bits.store_args_sequential = 0;
900 call_flags.bits.try_omit_fp = 1;
901 call_flags.bits.fp_free = 0;
902 call_flags.bits.call_has_imm = 1;
904 /* set stack parameter passing style */
905 be_abi_call_set_flags(abi, call_flags, &mips_abi_callbacks);
907 /* collect the mode for each type */
908 modes = alloca(n * sizeof(modes[0]));
909 for (i = 0; i < n; i++) {
910 tp = get_method_param_type(method_type, i);
911 modes[i] = get_type_mode(tp);
914 // assigns parameters to registers or stack
915 for (i = 0; i < n; i++) {
916 // first 4 params in $a0-$a3, the others on the stack
918 reg = &mips_gp_regs[REG_A0 + i];
919 be_abi_call_param_reg(abi, i, reg);
921 /* default: all parameters on stack */
922 be_abi_call_param_stack(abi, i, modes[i], 4, 0, 0);
926 /* set return register */
927 /* default: return value is in R0 (and maybe R1) */
928 result_count = get_method_n_ress(method_type);
929 assert(result_count <= 2 && "More than 2 result values not supported");
930 for(i = 0; i < result_count; ++i) {
931 const arch_register_t* reg;
932 tp = get_method_res_type(method_type, i);
933 mode = get_type_mode(tp);
934 ASSERT_NO_FLOAT(mode);
936 reg = &mips_gp_regs[REG_V0 + i];
937 be_abi_call_res_reg(abi, i, reg);
942 * Initializes the code generator interface.
944 static const arch_code_generator_if_t *mips_get_code_generator_if(void *self)
947 return &mips_code_gen_if;
951 * Returns the necessary byte alignment for storing a register of given class.
953 static int mips_get_reg_class_alignment(const void *self,
954 const arch_register_class_t *cls)
956 ir_mode *mode = arch_register_class_mode(cls);
958 return get_mode_size_bytes(mode);
961 static const be_execution_unit_t ***mips_get_allowed_execution_units(
962 const void *self, const ir_node *irn)
971 static const be_machine_t *mips_get_machine(const void *self)
980 * Return irp irgs in the desired order.
982 static ir_graph **mips_get_irg_list(const void *self, ir_graph ***irg_list)
990 * Returns the libFirm configuration parameter for this backend.
992 static const backend_params *mips_get_libfirm_params(void) {
993 static backend_params p = {
994 1, /* need dword lowering */
995 0, /* don't support inline assembler yet */
996 NULL, /* no additional opcodes */
997 NULL, /* will be set later */
998 NULL, /* but yet no creator function */
999 NULL, /* context for create_intrinsic_fkt */
1000 NULL, /* no if conversion settings */
1006 const arch_isa_if_t mips_isa_if = {
1009 mips_get_n_reg_class,
1011 mips_get_reg_class_for_mode,
1013 mips_get_code_generator_if,
1014 mips_get_list_sched_selector,
1015 mips_get_ilp_sched_selector,
1016 mips_get_reg_class_alignment,
1017 mips_get_libfirm_params,
1018 mips_get_allowed_execution_units,
1023 void be_init_arch_mips(void)
1025 be_register_isa_if("mips", &mips_isa_if);
1028 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_mips);