2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief The main mips backend driver file.
23 * @author Matthias Braun, Mehdi
28 #include "pseudo_irg.h"
45 #include "../bearch_t.h"
46 #include "../benode_t.h"
47 #include "../belower.h"
48 #include "../besched_t.h"
49 #include "../beblocksched.h"
50 #include "../beirg_t.h"
53 #include "../bemachine.h"
54 #include "../bemodule.h"
55 #include "../bespillslots.h"
56 #include "../beemitter.h"
57 #include "../begnuas.h"
59 #include "bearch_mips_t.h"
61 #include "mips_new_nodes.h"
62 #include "gen_mips_regalloc_if.h"
63 #include "mips_transform.h"
64 #include "mips_emitter.h"
65 #include "mips_map_regs.h"
66 #include "mips_util.h"
67 #include "mips_scheduler.h"
69 #define DEBUG_MODULE "firm.be.mips.isa"
71 /* TODO: ugly, but we need it to get access to the registers assigned to Phi nodes */
72 static set *cur_reg_set = NULL;
74 /**************************************************
77 * _ __ ___ __ _ __ _| | | ___ ___ _| |_
78 * | '__/ _ \/ _` | / _` | | |/ _ \ / __| | | _|
79 * | | | __/ (_| | | (_| | | | (_) | (__ | | |
80 * |_| \___|\__, | \__,_|_|_|\___/ \___| |_|_|
83 **************************************************/
86 * Return register requirements for a mips node.
87 * If the node returns a tuple (mode_T) then the proj's
88 * will be asked for this information.
91 arch_register_req_t *mips_get_irn_reg_req(const ir_node *node, int pos)
93 long node_pos = pos == -1 ? 0 : pos;
94 ir_mode *mode = get_irn_mode(node);
96 if (is_Block(node) || mode == mode_X || mode == mode_M) {
97 return arch_no_register_req;
100 if (mode == mode_T && pos < 0) {
101 return arch_no_register_req;
105 /* in case of a proj, we need to get the correct OUT slot */
106 /* of the node corresponding to the proj number */
108 node_pos = mips_translate_proj_pos(node);
114 node = skip_Proj_const(node);
117 /* get requirements for our own nodes */
118 if (is_mips_irn(node)) {
119 const arch_register_req_t *req;
121 req = get_mips_in_req(node, pos);
123 req = get_mips_out_req(node, node_pos);
129 /* unknown should be translated by now */
130 assert(!is_Unknown(node));
132 return arch_no_register_req;
135 static void mips_set_irn_reg(ir_node *irn, const arch_register_t *reg)
141 if (get_irn_mode(irn) == mode_X) {
145 pos = mips_translate_proj_pos(irn);
146 irn = skip_Proj(irn);
149 if (is_mips_irn(irn)) {
150 const arch_register_t **slots;
152 slots = get_mips_slots(irn);
155 /* here we set the registers for the Phi nodes */
156 mips_set_firm_reg(irn, reg, cur_reg_set);
160 static const arch_register_t *mips_get_irn_reg(const ir_node *irn)
163 const arch_register_t *reg = NULL;
167 if (get_irn_mode(irn) == mode_X) {
171 pos = mips_translate_proj_pos(irn);
172 irn = skip_Proj_const(irn);
175 if (is_mips_irn(irn)) {
176 const arch_register_t **slots;
177 slots = get_mips_slots(irn);
181 reg = mips_get_firm_reg(irn, cur_reg_set);
187 static arch_irn_class_t mips_classify(const ir_node *irn)
189 irn = skip_Proj_const(irn);
192 return arch_irn_class_branch;
198 static arch_irn_flags_t mips_get_flags(const ir_node *irn)
200 irn = skip_Proj_const(irn);
202 if (!is_mips_irn(irn))
205 return get_mips_flags(irn);
208 int mips_is_Load(const ir_node *node)
210 return is_mips_lw(node) || is_mips_lh(node) || is_mips_lhu(node) ||
211 is_mips_lb(node) || is_mips_lbu(node);
214 int mips_is_Store(const ir_node *node)
216 return is_mips_sw(node) || is_mips_sh(node) || is_mips_sb(node);
219 static ir_entity *mips_get_frame_entity(const ir_node *node)
221 const mips_load_store_attr_t *attr;
223 if(!is_mips_irn(node))
225 if(!mips_is_Load(node) && !mips_is_Store(node))
228 attr = get_mips_load_store_attr_const(node);
229 return attr->stack_entity;
232 static void mips_set_frame_entity(ir_node *node, ir_entity *entity)
234 mips_load_store_attr_t *attr;
236 if(!is_mips_irn(node)) {
237 panic("trying to set frame entity on non load/store node %+F", node);
239 if(!mips_is_Load(node) && !mips_is_Store(node)) {
240 panic("trying to set frame entity on non load/store node %+F", node);
243 attr = get_irn_generic_attr(node);
244 attr->stack_entity = entity;
248 * This function is called by the generic backend to correct offsets for
249 * nodes accessing the stack.
251 static void mips_set_frame_offset(ir_node *node, int offset)
253 mips_load_store_attr_t *attr;
255 if(!is_mips_irn(node)) {
256 panic("trying to set frame offset on non load/store node %+F", node);
258 if(!mips_is_Load(node) && !mips_is_Store(node)) {
259 panic("trying to set frame offset on non load/store node %+F", node);
262 attr = get_irn_generic_attr(node);
263 attr->offset += offset;
265 if(attr->offset < -32768 || attr->offset > 32767) {
266 panic("Out of stack space! (mips supports only 16bit offsets)");
270 static int mips_get_sp_bias(const ir_node *irn)
276 /* fill register allocator interface */
278 static const arch_irn_ops_t mips_irn_ops = {
279 mips_get_irn_reg_req,
284 mips_get_frame_entity,
285 mips_set_frame_entity,
286 mips_set_frame_offset,
288 NULL, /* get_inverse */
289 NULL, /* get_op_estimated_cost */
290 NULL, /* possible_memory_operand */
291 NULL, /* perform_memory_operand */
294 /**************************************************
297 * ___ ___ __| | ___ __ _ ___ _ __ _| |_
298 * / __/ _ \ / _` |/ _ \/ _` |/ _ \ '_ \ | | _|
299 * | (_| (_) | (_| | __/ (_| | __/ | | | | | |
300 * \___\___/ \__,_|\___|\__, |\___|_| |_| |_|_|
303 **************************************************/
306 * Transforms the standard firm graph into
309 static void mips_prepare_graph(void *self) {
310 mips_code_gen_t *cg = self;
312 /* do local optimizations */
313 optimize_graph_df(cg->irg);
315 /* TODO: we often have dead code reachable through out-edges here. So for
316 * now we rebuild edges (as we need correct user count for code selection)
319 edges_deactivate(cg->irg);
320 edges_activate(cg->irg);
323 // walk the graph and transform firm nodes into mips nodes where possible
324 mips_transform_graph(cg);
325 dump_ir_block_graph_sched(cg->irg, "-transformed");
327 /* do local optimizations (mainly CSE) */
328 optimize_graph_df(cg->irg);
330 /* do code placement, to optimize the position of constants */
333 be_dump(cg->irg, "-place", dump_ir_block_graph_sched);
337 * Called immediately before emit phase.
339 static void mips_finish_irg(void *self) {
340 mips_code_gen_t *cg = self;
341 ir_graph *irg = cg->irg;
343 /* create block schedule, this also removes empty blocks which might
344 * produce critical edges */
345 cg->block_schedule = be_create_block_schedule(irg, cg->birg->exec_freq);
347 dump_ir_block_graph_sched(irg, "-mips-finished");
351 static void mips_before_ra(void *self)
356 static void mips_after_ra(void* self)
358 mips_code_gen_t *cg = self;
359 be_coalesce_spillslots(cg->birg);
360 irg_walk_blkwise_graph(cg->irg, NULL, mips_after_ra_walker, self);
364 * Emits the code, closes the output file and frees
365 * the code generator interface.
367 static void mips_emit_and_done(void *self)
369 mips_code_gen_t *cg = self;
370 ir_graph *irg = cg->irg;
373 mips_gen_routine(cg, irg);
377 /* de-allocate code generator */
378 del_set(cg->reg_set);
382 static void *mips_cg_init(be_irg_t *birg);
384 static const arch_code_generator_if_t mips_code_gen_if = {
386 NULL, /* get_pic_base */
387 NULL, /* before abi introduce */
390 mips_before_ra, /* before register allocation hook */
397 * Initializes the code generator.
399 static void *mips_cg_init(be_irg_t *birg)
401 const arch_env_t *arch_env = be_get_birg_arch_env(birg);
402 mips_isa_t *isa = (mips_isa_t *) arch_env;
403 mips_code_gen_t *cg = XMALLOCZ(mips_code_gen_t);
405 cg->impl = &mips_code_gen_if;
406 cg->irg = be_get_birg_irg(birg);
407 cg->reg_set = new_set(mips_cmp_irn_reg_assoc, 1024);
411 cur_reg_set = cg->reg_set;
415 return (arch_code_generator_t *)cg;
419 /*****************************************************************
420 * ____ _ _ _____ _____
421 * | _ \ | | | | |_ _|/ ____| /\
422 * | |_) | __ _ ___| | _____ _ __ __| | | | | (___ / \
423 * | _ < / _` |/ __| |/ / _ \ '_ \ / _` | | | \___ \ / /\ \
424 * | |_) | (_| | (__| < __/ | | | (_| | _| |_ ____) / ____ \
425 * |____/ \__,_|\___|_|\_\___|_| |_|\__,_| |_____|_____/_/ \_\
427 *****************************************************************/
429 static mips_isa_t mips_isa_template = {
432 &mips_gp_regs[REG_SP],
433 &mips_gp_regs[REG_FP],
434 -1, /* stack direction */
435 2, /* power of two stack alignment for calls, 2^2 == 4 */
436 NULL, /* main environment */
438 5, /* reload costs */
444 * Initializes the backend ISA and opens the output file.
446 static arch_env_t *mips_init(FILE *file_handle) {
447 static int inited = 0;
454 isa = XMALLOC(mips_isa_t);
455 memcpy(isa, &mips_isa_template, sizeof(isa[0]));
457 be_emit_init(file_handle);
459 mips_register_init();
460 mips_create_opcodes(&mips_irn_ops);
461 // mips_init_opcode_transforms();
463 /* we mark referenced global entities, so we can only emit those which
464 * are actually referenced. (Note: you mustn't use the type visited flag
465 * elsewhere in the backend)
467 inc_master_type_visited();
469 return &isa->arch_env;
473 * Closes the output file and frees the ISA structure.
475 static void mips_done(void *self)
477 mips_isa_t *isa = self;
479 be_gas_emit_decls(isa->arch_env.main_env, 1);
485 static unsigned mips_get_n_reg_class(const void *self)
491 static const arch_register_class_t *mips_get_reg_class(const void *self,
495 assert(i < N_CLASSES);
496 return &mips_reg_classes[i];
502 * Get the register class which shall be used to store a value of a given mode.
503 * @param self The this pointer.
504 * @param mode The mode in question.
505 * @return A register class which can hold values of the given mode.
507 const arch_register_class_t *mips_get_reg_class_for_mode(const void *self,
512 ASSERT_NO_FLOAT(mode);
513 return &mips_reg_classes[CLASS_mips_gp];
517 be_abi_call_flags_bits_t flags;
518 const arch_env_t *arch_env;
520 // do special handling to support debuggers
524 static void *mips_abi_init(const be_abi_call_t *call, const arch_env_t *arch_env, ir_graph *irg)
526 mips_abi_env_t *env = XMALLOC(mips_abi_env_t);
527 be_abi_call_flags_t fl = be_abi_call_get_flags(call);
528 env->flags = fl.bits;
530 env->arch_env = arch_env;
535 static const arch_register_t *mips_abi_prologue(void *self, ir_node** mem, pmap *reg_map, int *stack_bias)
537 mips_abi_env_t *env = self;
538 ir_graph *irg = env->irg;
539 ir_node *block = get_irg_start_block(env->irg);
540 ir_node *sp = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_SP]);
541 ir_node *fp = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_FP]);
542 int initialstackframesize;
548 * The calling conventions wants a stack frame of at least 24bytes size with
549 * a0-a3 saved in offset 0-12
550 * fp saved in offset 16
551 * ra saved in offset 20
554 ir_node *sync, *reg, *store;
555 initialstackframesize = 24;
557 // - setup first part of stackframe
558 sp = new_rd_mips_addu(NULL, irg, block, sp,
559 mips_create_Immediate(initialstackframesize));
560 mips_set_irn_reg(sp, &mips_gp_regs[REG_SP]);
561 set_mips_flags(sp, arch_irn_flags_ignore);
563 /* TODO: where to get an edge with a0-a3
565 for(i = 0; i < 4; ++i) {
566 ir_node *reg = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_A0 + i]);
567 ir_node *store = new_rd_mips_store_r(dbg, irg, block, *mem, sp, reg, mode_T);
568 attr = get_mips_attr(store);
569 attr->load_store_mode = mode_Iu;
570 attr->tv = new_tarval_from_long(i * 4, mode_Is);
572 mm[i] = new_r_Proj(irg, block, store, mode_M, pn_Store_M);
576 reg = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_FP]);
577 store = new_rd_mips_sw(NULL, irg, block, sp, reg, *mem, NULL, 16);
581 reg = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_RA]);
582 store = new_rd_mips_sw(NULL, irg, block, sp, reg, *mem, NULL, 20);
586 /* Note: ideally we would route these mem edges directly towards the
587 * epilogue, but this is currently not supported so we sync all mems
589 sync = new_r_Sync(irg, block, 2, mm+4);
592 ir_node *reg, *store;
593 initialstackframesize = 4;
595 // save old framepointer
596 sp = new_rd_mips_addu(NULL, irg, block, sp,
597 mips_create_Immediate(-initialstackframesize));
598 mips_set_irn_reg(sp, &mips_gp_regs[REG_SP]);
599 set_mips_flags(sp, arch_irn_flags_ignore);
601 reg = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_FP]);
602 store = new_rd_mips_sw(NULL, irg, block, sp, reg, *mem, NULL, 0);
607 // setup framepointer
608 fp = new_rd_mips_addu(NULL, irg, block, sp,
609 mips_create_Immediate(-initialstackframesize));
610 mips_set_irn_reg(fp, &mips_gp_regs[REG_FP]);
611 set_mips_flags(fp, arch_irn_flags_ignore);
613 be_abi_reg_map_set(reg_map, &mips_gp_regs[REG_FP], fp);
614 be_abi_reg_map_set(reg_map, &mips_gp_regs[REG_SP], sp);
616 return &mips_gp_regs[REG_SP];
619 static void mips_abi_epilogue(void *self, ir_node *block, ir_node **mem, pmap *reg_map)
621 mips_abi_env_t *env = self;
623 ir_graph *irg = env->irg;
624 ir_node *sp = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_SP]);
625 ir_node *fp = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_FP]);
627 int initial_frame_size = env->debug ? 24 : 4;
628 int fp_save_offset = env->debug ? 16 : 0;
631 sp = new_rd_mips_or(NULL, irg, block, fp, mips_create_zero());
632 mips_set_irn_reg(sp, &mips_gp_regs[REG_SP]);
633 set_mips_flags(sp, arch_irn_flags_ignore);
636 load = new_rd_mips_lw(NULL, irg, block, sp, *mem, NULL,
637 fp_save_offset - initial_frame_size);
638 set_mips_flags(load, arch_irn_flags_ignore);
640 fp = new_r_Proj(irg, block, load, mode_Iu, pn_mips_lw_res);
641 *mem = new_r_Proj(irg, block, load, mode_Iu, pn_mips_lw_M);
642 arch_set_irn_register(fp, &mips_gp_regs[REG_FP]);
644 be_abi_reg_map_set(reg_map, &mips_gp_regs[REG_FP], fp);
645 be_abi_reg_map_set(reg_map, &mips_gp_regs[REG_SP], sp);
649 * Produces the type which sits between the stack args and the locals on the stack.
650 * it will contain the return address and space to store the old frame pointer.
651 * @return The Firm type modelling the ABI between type.
653 static ir_type *mips_abi_get_between_type(void *self) {
654 mips_abi_env_t *env = self;
656 static ir_type *debug_between_type = NULL;
657 static ir_type *opt_between_type = NULL;
658 static ir_entity *old_fp_ent = NULL;
660 if(env->debug && debug_between_type == NULL) {
661 ir_entity *a0_ent, *a1_ent, *a2_ent, *a3_ent;
662 ir_entity *ret_addr_ent;
663 ir_type *ret_addr_type = new_type_primitive(new_id_from_str("return_addr"), mode_P);
664 ir_type *old_fp_type = new_type_primitive(new_id_from_str("fp"), mode_P);
665 ir_type *old_param_type = new_type_primitive(new_id_from_str("param"), mode_Iu);
667 debug_between_type = new_type_class(new_id_from_str("mips_between_type"));
668 a0_ent = new_entity(debug_between_type, new_id_from_str("a0_ent"), old_param_type);
669 a1_ent = new_entity(debug_between_type, new_id_from_str("a1_ent"), old_param_type);
670 a2_ent = new_entity(debug_between_type, new_id_from_str("a2_ent"), old_param_type);
671 a3_ent = new_entity(debug_between_type, new_id_from_str("a3_ent"), old_param_type);
672 old_fp_ent = new_entity(debug_between_type, new_id_from_str("old_fp"), old_fp_type);
673 ret_addr_ent = new_entity(debug_between_type, new_id_from_str("ret_addr"), ret_addr_type);
675 set_entity_offset(a0_ent, 0);
676 set_entity_offset(a1_ent, 4);
677 set_entity_offset(a2_ent, 8);
678 set_entity_offset(a3_ent, 12);
679 set_entity_offset(old_fp_ent, 16);
680 set_entity_offset(ret_addr_ent, 20);
682 set_type_size_bytes(debug_between_type, 24);
683 } else if(!env->debug && opt_between_type == NULL) {
684 ir_type *old_fp_type = new_type_primitive(new_id_from_str("fp"), mode_P);
685 ir_entity *old_fp_ent;
687 opt_between_type = new_type_class(new_id_from_str("mips_between_type"));
688 old_fp_ent = new_entity(opt_between_type, new_id_from_str("old_fp"), old_fp_type);
689 set_entity_offset(old_fp_ent, 0);
690 set_type_size_bytes(opt_between_type, 4);
693 return env->debug ? debug_between_type : opt_between_type;
696 static const be_abi_callbacks_t mips_abi_callbacks = {
699 mips_abi_get_between_type,
705 * Get the ABI restrictions for procedure calls.
706 * @param self The this pointer.
707 * @param method_type The type of the method (procedure) in question.
708 * @param abi The abi object to be modified
710 static void mips_get_call_abi(const void *self, ir_type *method_type,
715 int n = get_method_n_params(method_type);
719 const arch_register_t *reg;
720 be_abi_call_flags_t call_flags;
723 memset(&call_flags, 0, sizeof(call_flags));
724 call_flags.bits.left_to_right = 0;
725 call_flags.bits.store_args_sequential = 0;
726 call_flags.bits.try_omit_fp = 1;
727 call_flags.bits.fp_free = 0;
728 call_flags.bits.call_has_imm = 1;
730 /* set stack parameter passing style */
731 be_abi_call_set_flags(abi, call_flags, &mips_abi_callbacks);
733 /* collect the mode for each type */
734 modes = ALLOCAN(ir_mode*, n);
735 for (i = 0; i < n; i++) {
736 tp = get_method_param_type(method_type, i);
737 modes[i] = get_type_mode(tp);
740 // assigns parameters to registers or stack
741 for (i = 0; i < n; i++) {
742 // first 4 params in $a0-$a3, the others on the stack
744 reg = &mips_gp_regs[REG_A0 + i];
745 be_abi_call_param_reg(abi, i, reg);
747 /* default: all parameters on stack */
748 be_abi_call_param_stack(abi, i, modes[i], 4, 0, 0);
752 /* set return register */
753 /* default: return value is in R0 (and maybe R1) */
754 result_count = get_method_n_ress(method_type);
755 assert(result_count <= 2 && "More than 2 result values not supported");
756 for(i = 0; i < result_count; ++i) {
757 const arch_register_t* reg;
758 tp = get_method_res_type(method_type, i);
759 mode = get_type_mode(tp);
760 ASSERT_NO_FLOAT(mode);
762 reg = &mips_gp_regs[REG_V0 + i];
763 be_abi_call_res_reg(abi, i, reg);
768 * Initializes the code generator interface.
770 static const arch_code_generator_if_t *mips_get_code_generator_if(void *self)
773 return &mips_code_gen_if;
777 * Returns the necessary byte alignment for storing a register of given class.
779 static int mips_get_reg_class_alignment(const void *self,
780 const arch_register_class_t *cls)
782 ir_mode *mode = arch_register_class_mode(cls);
784 return get_mode_size_bytes(mode);
787 static const be_execution_unit_t ***mips_get_allowed_execution_units(
788 const void *self, const ir_node *irn)
793 panic("Unimplemented mips_get_allowed_execution_units()");
796 static const be_machine_t *mips_get_machine(const void *self)
800 panic("Unimplemented mips_get_machine()");
804 * Return irp irgs in the desired order.
806 static ir_graph **mips_get_irg_list(const void *self, ir_graph ***irg_list)
814 * Returns the libFirm configuration parameter for this backend.
816 static const backend_params *mips_get_libfirm_params(void) {
817 static backend_params p = {
818 1, /* need dword lowering */
819 0, /* don't support inline assembler yet */
820 0, /* no immediate floating point mode. */
821 NULL, /* no additional opcodes */
822 NULL, /* will be set later */
823 NULL, /* but yet no creator function */
824 NULL, /* context for create_intrinsic_fkt */
825 NULL, /* no if conversion settings */
826 NULL /* no immediate fp mode */
832 static asm_constraint_flags_t mips_parse_asm_constraint(const void *self,
837 return ASM_CONSTRAINT_FLAG_INVALID;
840 static int mips_is_valid_clobber(const void *self, const char *clobber)
847 const arch_isa_if_t mips_isa_if = {
850 mips_get_n_reg_class,
852 mips_get_reg_class_for_mode,
854 mips_get_code_generator_if,
855 mips_get_list_sched_selector,
856 mips_get_ilp_sched_selector,
857 mips_get_reg_class_alignment,
858 mips_get_libfirm_params,
859 mips_get_allowed_execution_units,
862 NULL, /* mark remat */
863 mips_parse_asm_constraint,
864 mips_is_valid_clobber
867 void be_init_arch_mips(void)
869 be_register_isa_if("mips", &mips_isa_if);
872 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_mips);