13 #include "../firm2arch_nodes_attr.h"
14 #include "../bearch_firm.h"
15 #include "../arch/archop.h" /* we need this for Min and Max nodes */
16 #include "transform.h"
17 #include "new_nodes.h"
19 extern ir_op *get_op_Mulh(void);
21 /* determine if one operator is an Imm */
22 ir_node *get_immediate_op(ir_node *op1, ir_node *op2) {
24 return is_Imm(op1) ? op1 : (is_Imm(op2) ? op2 : NULL);
25 else return is_Imm(op2) ? op2 : NULL;
28 /* determine if one operator is not an Imm */
29 ir_node *get_expr_op(ir_node *op1, ir_node *op2) {
30 return !is_Imm(op1) ? op1 : (!is_Imm(op2) ? op2 : NULL);
36 * Creates an ia32 Add with immediate.
39 * @param block the block the new node should belong to
40 * @param expr_op operator
41 * @param mode node mode
42 * @return the created ia23 Add_i node
44 ir_node *gen_imm_Add(dbg_info *dbg, ir_node *block, ir_node *expr_op, ir_node *const_op, ir_mode *mode) {
46 tarval *tv = get_Immop_tarval(const_op);
48 tarval_classification_t class_tv, class_negtv;
50 /* const_op: tarval or SymConst? */
52 /* optimize tarvals */
53 class_tv = classify_tarval(tv);
54 class_negtv = classify_tarval(tarval_neg(tv));
56 if (class_tv == TV_CLASSIFY_ONE) { /* + 1 == INC */
57 new_op = new_rd_ia32_Inc(dbg, current_ir_graph, block, expr_op, mode);
59 else if (class_tv == TV_CLASSIFY_ALL_ONE || class_negtv == TV_CLASSIFY_ONE) { /* + (-1) == Sub */
60 new_op = new_rd_ia32_Dec(dbg, current_ir_graph, block, expr_op, mode);
69 new_op = new_rd_ia32_Lea_i(dbg, current_ir_graph, block, expr_op, mode);
75 * Creates an ia32 Add.
77 * @param dbg firm node dbg
78 * @param block the block the new node should belong to
79 * @param op1 first operator
80 * @param op2 second operator
81 * @param mode node mode
82 * @return the created ia32 Add node
84 ir_node *gen_Add(firm_dbg_module_t *mod, dbg_info *dbg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) {
85 /* try to optimize with LEA */
86 ir_node *shli_op = is_ia32_Shl_i(op1) ? op1 : (is_ia32_Shl_i(op2) ? op2 : NULL);
87 ir_node *expr_op = shli_op == op1 ? op2 : (shli_op == op2 ? op1 : NULL);
92 tarval *tv = get_Immop_tarval(shli_op);
95 switch (get_tarval_long(tv)) {
99 // If the other operand of the LEA is an LEA_i (that means LEA ofs(%regop1)),
100 // we can skip it and transform the whole sequence into LEA ofs(%regop1, %regop2, shl_val),
101 if (is_ia32_Lea_i(expr_op)) {
102 offs = get_Immop_tarval(expr_op);
103 expr_op = get_irn_n(expr_op, 0);
106 new_op = new_rd_ia32_Lea(dbg, current_ir_graph, block, expr_op, get_irn_n(shli_op, 0), mode);
107 set_Immop_attr_tv(new_op, tv);
110 set_ia32_Lea_offs(new_op, offs);
125 new_op = new_rd_ia32_Lea(dbg, current_ir_graph, block, op1, op2, mode);
126 set_Immop_attr_tv(new_op, get_tarval_one(mode_Iu));
127 set_ia32_Lea_offs(new_op, NULL);
136 * Creates an ia32 Mul with immediate.
138 * @param dbg firm dbg
139 * @param block the block the new node should belong to
140 * @param expr_op operator
141 * @param mode node mode
142 * @return the created ia23 Mul_i node
144 ir_node *gen_imm_Mul(dbg_info *dbg, ir_node *block, ir_node *expr_op, ir_node *const_op, ir_mode *mode) {
145 return new_rd_ia32_Mul_i(dbg, current_ir_graph, block, expr_op, mode);
149 * Creates an ia32 Mul.
151 * @param dbg firm node dbg
152 * @param block the block the new node should belong to
153 * @param op1 first operator
154 * @param op2 second operator
155 * @param mode node mode
156 * @return the created ia32 Mul node
158 ir_node *gen_Mul(firm_dbg_module_t *mod, dbg_info *dbg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) {
159 return new_rd_ia32_Mul(dbg, current_ir_graph, block, op1, op2, mode);
165 * Creates an ia32 Mulh with immediate.
166 * Note: Mul produces a 64Bit result and Mulh returns the upper 32 bit of
167 * this result while Mul returns the lower 32 bit.
169 * @param dbg firm dbg
170 * @param block the block the new node should belong to
171 * @param expr_op operator
172 * @param mode node mode
173 * @return the created ia23 Mulh_i node
175 ir_node *gen_imm_Mulh(dbg_info *dbg, ir_node *block, ir_node *expr_op, ir_node *const_op, ir_mode *mode) {
176 return new_rd_ia32_Mulh_i(dbg, current_ir_graph, block, expr_op, mode);
180 * Creates an ia32 Mulh.
181 * Note: Mul produces a 64Bit result and Mulh returns the upper 32 bit of
182 * this result while Mul returns the lower 32 bit.
184 * @param dbg firm node dbg
185 * @param block the block the new node should belong to
186 * @param op1 first operator
187 * @param op2 second operator
188 * @param mode node mode
189 * @return the created ia32 Mulh node
191 ir_node *gen_Mulh(firm_dbg_module_t *mod, dbg_info *dbg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) {
192 return new_rd_ia32_Mulh(dbg, current_ir_graph, block, op1, op2, mode);
198 * Creates an ia32 And with immediate.
200 * @param dbg firm dbg
201 * @param block the block the new node should belong to
202 * @param expr_op operator
203 * @param mode node mode
204 * @return the created ia23 And_i node
206 ir_node *gen_imm_And(dbg_info *dbg, ir_node *block, ir_node *expr_op, ir_node *const_op, ir_mode *mode) {
207 return new_rd_ia32_And_i(dbg, current_ir_graph, block, expr_op, mode);
211 * Creates an ia32 And.
213 * @param dbg firm node dbg
214 * @param block the block the new node should belong to
215 * @param op1 first operator
216 * @param op2 second operator
217 * @param mode node mode
218 * @return the created ia32 And node
220 ir_node *gen_And(firm_dbg_module_t *mod, dbg_info *dbg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) {
221 return new_rd_ia32_And(dbg, current_ir_graph, block, op1, op2, mode);
227 * Creates an ia32 Or with immediate.
229 * @param dbg firm dbg
230 * @param block the block the new node should belong to
231 * @param expr_op operator
232 * @param mode node mode
233 * @return the created ia23 Or_i node
235 ir_node *gen_imm_Or(dbg_info *dbg, ir_node *block, ir_node *expr_op, ir_node *const_op, ir_mode *mode) {
236 return new_rd_ia32_Or_i(dbg, current_ir_graph, block, expr_op, mode);
240 * Creates an ia32 Or.
242 * @param dbg firm node dbg
243 * @param block the block the new node should belong to
244 * @param op1 first operator
245 * @param op2 second operator
246 * @param mode node mode
247 * @return the created ia32 Or node
249 ir_node *gen_Or(firm_dbg_module_t *mod, dbg_info *dbg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) {
250 return new_rd_ia32_Or(dbg, current_ir_graph, block, op1, op2, mode);
256 * Creates an ia32 Eor with immediate.
258 * @param dbg firm dbg
259 * @param block the block the new node should belong to
260 * @param expr_op operator
261 * @param mode node mode
262 * @return the created ia23 Eor_i node
264 ir_node *gen_imm_Eor(dbg_info *dbg, ir_node *block, ir_node *expr_op, ir_node *const_op, ir_mode *mode) {
265 return new_rd_ia32_Eor_i(dbg, current_ir_graph, block, expr_op, mode);
269 * Creates an ia32 Eor.
271 * @param dbg firm node dbg
272 * @param block the block the new node should belong to
273 * @param op1 first operator
274 * @param op2 second operator
275 * @param mode node mode
276 * @return the created ia32 Eor node
278 ir_node *gen_Eor(firm_dbg_module_t *mod, dbg_info *dbg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) {
279 return new_rd_ia32_Eor(dbg, current_ir_graph, block, op1, op2, mode);
285 * Creates an ia32 Max with immediate.
287 * @param dbg firm dbg
288 * @param block the block the new node should belong to
289 * @param expr_op operator
290 * @param mode node mode
291 * @return the created ia23 Max_i node
293 ir_node *gen_imm_Max(dbg_info *dbg, ir_node *block, ir_node *expr_op, ir_node *const_op, ir_mode *mode) {
294 return new_rd_ia32_Max_i(dbg, current_ir_graph, block, expr_op, mode);
298 * Creates an ia32 Max.
300 * @param dbg firm dbg
301 * @param block the block the new node should belong to
302 * @param expr_op operator
303 * @param mode node mode
304 * @return the created ia23 Max node
306 ir_node *gen_Max(firm_dbg_module_t *mod, dbg_info *dbg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) {
307 return new_rd_ia32_Max(dbg, current_ir_graph, block, op1, op2, mode);
313 * Creates an ia32 Min with immediate.
315 * @param dbg firm dbg
316 * @param block the block the new node should belong to
317 * @param expr_op operator
318 * @param mode node mode
319 * @return the created ia23 Min_i node
321 ir_node *gen_imm_Min(dbg_info *dbg, ir_node *block, ir_node *expr_op, ir_node *const_op, ir_mode *mode) {
322 return new_rd_ia32_Min_i(dbg, current_ir_graph, block, expr_op, mode);
326 * Creates an ia32 Min.
328 * @param dbg firm dbg
329 * @param block the block the new node should belong to
330 * @param expr_op operator
331 * @param mode node mode
332 * @return the created ia23 Min node
334 ir_node *gen_Min(firm_dbg_module_t *mod, dbg_info *dbg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) {
335 return new_rd_ia32_Min(dbg, current_ir_graph, block, op1, op2, mode);
341 * Creates an ia32 Cmp with immediate.
343 * @param dbg firm dbg
344 * @param block the block the new node should belong to
345 * @param expr_op operator
346 * @param mode node mode
347 * @return the created ia23 Cmp_i node
349 ir_node *gen_imm_Cmp(dbg_info *dbg, ir_node *block, ir_node *expr_op, ir_node *const_op, ir_mode *mode) {
350 return new_rd_ia32_Cmp_i(dbg, current_ir_graph, block, expr_op, mode);
354 * Creates an ia32 Cmp.
356 * @param dbg firm node dbg
357 * @param block the block the new node should belong to
358 * @param op1 first operator
359 * @param op2 second operator
360 * @param mode node mode
361 * @return the created ia32 Cmp node
363 ir_node *gen_Cmp(firm_dbg_module_t *mod, dbg_info *dbg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) {
364 return new_rd_ia32_Cmp(dbg, current_ir_graph, block, op1, op2, mode);
370 * Creates an ia32 Sub with immediate.
372 * @param dbg firm dbg
373 * @param block the block the new node should belong to
374 * @param expr_op operator
375 * @param mode node mode
376 * @return the created ia23 Sub_i node
378 ir_node *gen_imm_Sub(dbg_info *dbg, ir_node *block, ir_node *expr_op, ir_node *const_op, ir_mode *mode) {
380 tarval *tv = get_Immop_tarval(const_op);
382 tarval_classification_t class_tv, class_negtv;
384 /* const_op: tarval or SymConst? */
386 /* optimize tarvals */
387 class_tv = classify_tarval(tv);
388 class_negtv = classify_tarval(tarval_neg(tv));
390 if (class_tv == TV_CLASSIFY_ONE) { /* - 1 == DEC */
391 new_op = new_rd_ia32_Dec(dbg, current_ir_graph, block, expr_op, mode);
393 else if (class_negtv == TV_CLASSIFY_ONE) { /* - (-1) == Sub */
394 new_op = new_rd_ia32_Inc(dbg, current_ir_graph, block, expr_op, mode);
403 new_op = new_rd_ia32_Sub_i(dbg, current_ir_graph, block, expr_op, mode);
409 * Creates an ia32 Sub.
411 * @param dbg firm node dbg
412 * @param block the block the new node should belong to
413 * @param op1 first operator
414 * @param op2 second operator
415 * @param mode node mode
416 * @return the created ia32 Sub node
418 ir_node *gen_Sub(firm_dbg_module_t *mod, dbg_info *dbg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) {
421 /* transform "const - expr" into "-expr + const" */
422 if (is_Imm(op1) && !is_Imm(op2)) {
423 DBG((mod, LEVEL_1, "optimizing c-e into -e+c ... "));
425 sub = new_rd_ia32_Minus(dbg, current_ir_graph, block, op2, mode);
426 sub = gen_imm_Add(dbg, block, sub, op1, mode);
427 set_Immop_attr(sub, op1);
430 sub = new_rd_ia32_Sub(dbg, current_ir_graph, block, op1, op2, mode);
439 * Creates an ia32 Mod with immediate.
441 * @param dbg firm dbg
442 * @param block the block the new node should belong to
443 * @param expr_op operator
444 * @param mode node mode
445 * @return the created ia23 Mod_i node
447 ir_node *gen_imm_Mod(dbg_info *dbg, ir_node *block, ir_node *expr_op, ir_node *const_op, ir_mode *mode) {
448 return new_rd_ia32_Mod_i(dbg, current_ir_graph, block, expr_op, mode);
452 * Creates an ia32 Mod.
454 * @param dbg firm node dbg
455 * @param block the block the new node should belong to
456 * @param op1 first operator
457 * @param op2 second operator
458 * @param mode node mode
459 * @return the created ia32 Mod node
461 ir_node *gen_Mod(firm_dbg_module_t *mod, dbg_info *dbg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) {
462 return new_rd_ia32_Mod(dbg, current_ir_graph, block, op1, op2, mode);
468 * Creates an ia32 Div with immediate.
470 * @param dbg firm dbg
471 * @param block the block the new node should belong to
472 * @param expr_op operator
473 * @param mode node mode
474 * @return the created ia23 Div_i node
476 ir_node *gen_imm_Div(dbg_info *dbg, ir_node *block, ir_node *expr_op, ir_node *const_op, ir_mode *mode) {
477 return new_rd_ia32_Div_i(dbg, current_ir_graph, block, expr_op, mode);
481 * Creates an ia32 Div.
483 * @param dbg firm node dbg
484 * @param block the block the new node should belong to
485 * @param op1 first operator
486 * @param op2 second operator
487 * @param mode node mode
488 * @return the created ia32 Div node
490 ir_node *gen_Div(firm_dbg_module_t *mod, dbg_info *dbg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) {
491 return new_rd_ia32_Div(dbg, current_ir_graph, block, op1, op2, mode);
497 * Creates an ia32 DivMod with immediate.
499 * @param dbg firm dbg
500 * @param block the block the new node should belong to
501 * @param expr_op operator
502 * @param mode node mode
503 * @return the created ia23 DivMod_i node
505 ir_node *gen_imm_DivMod(dbg_info *dbg, ir_node *block, ir_node *expr_op, ir_node *const_op, ir_mode *mode) {
506 return new_rd_ia32_DivMod_i(dbg, current_ir_graph, block, expr_op, mode);
510 * Creates an ia32 DivMod.
512 * @param dbg firm node dbg
513 * @param block the block the new node should belong to
514 * @param op1 first operator
515 * @param op2 second operator
516 * @param mode node mode
517 * @return the created ia32 DivMod node
519 ir_node *gen_DivMod(firm_dbg_module_t *mod, dbg_info *dbg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) {
520 return new_rd_ia32_DivMod(dbg, current_ir_graph, block, op1, op2, mode);
526 * Creates an ia32 Shl with immediate.
528 * @param dbg firm dbg
529 * @param block the block the new node should belong to
530 * @param expr_op operator
531 * @param mode node mode
532 * @return the created ia23 Shl_i node
534 ir_node *gen_imm_Shl(dbg_info *dbg, ir_node *block, ir_node *expr_op, ir_node *const_op, ir_mode *mode) {
535 return new_rd_ia32_Shl_i(dbg, current_ir_graph, block, expr_op, mode);
539 * Creates an ia32 Shl.
541 * @param dbg firm node dbg
542 * @param block the block the new node should belong to
543 * @param op1 first operator
544 * @param op2 second operator
545 * @param mode node mode
546 * @return the created ia32 Shl node
548 ir_node *gen_Shl(firm_dbg_module_t *mod, dbg_info *dbg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) {
549 return new_rd_ia32_Shl(dbg, current_ir_graph, block, op1, op2, mode);
555 * Creates an ia32 Shr with immediate.
557 * @param dbg firm dbg
558 * @param block the block the new node should belong to
559 * @param expr_op operator
560 * @param mode node mode
561 * @return the created ia23 Shr_i node
563 ir_node *gen_imm_Shr(dbg_info *dbg, ir_node *block, ir_node *expr_op, ir_node *const_op, ir_mode *mode) {
564 return new_rd_ia32_Shr_i(dbg, current_ir_graph, block, expr_op, mode);
568 * Creates an ia32 Shr.
570 * @param dbg firm node dbg
571 * @param block the block the new node should belong to
572 * @param op1 first operator
573 * @param op2 second operator
574 * @param mode node mode
575 * @return the created ia32 Shr node
577 ir_node *gen_Shr(firm_dbg_module_t *mod, dbg_info *dbg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) {
578 return new_rd_ia32_Shr(dbg, current_ir_graph, block, op1, op2, mode);
584 * Creates an ia32 Shrs with immediate.
586 * @param dbg firm dbg
587 * @param block the block the new node should belong to
588 * @param expr_op operator
589 * @param mode node mode
590 * @return the created ia23 Shrs_i node
592 ir_node *gen_imm_Shrs(dbg_info *dbg, ir_node *block, ir_node *expr_op, ir_node *const_op, ir_mode *mode) {
593 return new_rd_ia32_Shrs_i(dbg, current_ir_graph, block, expr_op, mode);
597 * Creates an ia32 Shrs.
599 * @param dbg firm node dbg
600 * @param block the block the new node should belong to
601 * @param op1 first operator
602 * @param op2 second operator
603 * @param mode node mode
604 * @return the created ia32 Shrs node
606 ir_node *gen_Shrs(firm_dbg_module_t *mod, dbg_info *dbg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) {
607 return new_rd_ia32_Shrs(dbg, current_ir_graph, block, op1, op2, mode);
613 * Creates an ia32 Rot with immediate.
615 * @param dbg firm dbg
616 * @param block the block the new node should belong to
617 * @param expr_op operator
618 * @param mode node mode
619 * @return the created ia23 Rot_i node
621 ir_node *gen_imm_Rot(dbg_info *dbg, ir_node *block, ir_node *expr_op, ir_node *const_op, ir_mode *mode) {
622 return new_rd_ia32_Rot_i(dbg, current_ir_graph, block, expr_op, mode);
626 * Creates an ia32 Rot.
628 * @param dbg firm node dbg
629 * @param block the block the new node should belong to
630 * @param op1 first operator
631 * @param op2 second operator
632 * @param mode node mode
633 * @return the created ia32 Rot node
635 ir_node *gen_Rot(firm_dbg_module_t *mod, dbg_info *dbg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) {
636 return new_rd_ia32_Rot(dbg, current_ir_graph, block, op1, op2, mode);
642 * Transforms commutative operations (op_Add, op_Mul, op_And, op_Or, op_Eor, op_Cmp)
643 * and non-commutative operations with com == 0 (op_Sub, op_Mod, op_Div, op_DivMod, op_Shl, op_Shr, op_Shrs, op_Rot)
645 * @param mod the debug module
646 * @param block the block node belongs to
647 * @param node the node to transform
648 * @param op1 first operator
649 * @param op2 second operator
650 * @param mode node mode
651 * @param com flag if op is commutative
652 * @return the created assembler node
654 ir_node *gen_arith_Op(firm_dbg_module_t *mod, ir_node *block, ir_node *node, ir_node *op1, ir_node *op2, ir_mode *mode, int com) {
655 dbg_info *dbg = get_irn_dbg_info(node);
656 ir_node *imm_op = NULL;
657 ir_node *expr_op = NULL;
658 ir_node *asm_node = NULL;
660 #define GENOP(a) case iro_##a: asm_node = gen_##a(mod, dbg, block, op1, op2, mode); break
661 #define GENOPI(a) case iro_##a: asm_node = gen_imm_##a(dbg, block, expr_op, imm_op, mode); break
664 imm_op = get_immediate_op(op1, op2);
666 imm_op = get_immediate_op(NULL, op2);
668 expr_op = get_expr_op(op1, op2);
670 /* TODO: Op(Imm, Imm) support */
671 if (is_Imm(op1) && is_Imm(op2)) {
672 DBG((mod, LEVEL_1, "found unexpected %s(Imm, Imm), creating binop ... ", get_irn_opname(node)));
676 DBG((mod, LEVEL_1, "(op1: %s -- op2: %s) ... ", get_irn_opname(op1), get_irn_opname(op2)));
679 DBG((mod, LEVEL_1, "%s with imm ... ", get_irn_opname(node)));
681 switch(get_irn_opcode(node)) {
698 if (get_irn_op(node) == get_op_Mulh()) {
699 asm_node = gen_imm_Mulh(dbg, block, expr_op, imm_op, mode);
701 else if (get_irn_op(node) == get_op_Max()) {
702 asm_node = gen_imm_Max(dbg, block, expr_op, imm_op, mode);
704 else if (get_irn_op(node) == get_op_Min()) {
705 asm_node = gen_imm_Min(dbg, block, expr_op, imm_op, mode);
708 assert("binop_i: THIS SHOULD NOT HAPPEN");
711 set_Immop_attr(asm_node, imm_op);
714 DBG((mod, LEVEL_1, "%s as binop ... ", get_irn_opname(node)));
716 switch(get_irn_opcode(node)) {
733 if (get_irn_op(node) == get_op_Mulh()) {
734 asm_node = gen_Mulh(mod, dbg, block, op1, op2, mode);
736 else if (get_irn_op(node) == get_op_Max()) {
737 asm_node = gen_Max(mod, dbg, block, op1, op2, mode);
739 else if (get_irn_op(node) == get_op_Min()) {
740 asm_node = gen_Min(mod, dbg, block, op1, op2, mode);
743 assert("binop: THIS SHOULD NOT HAPPEN");
753 * Transforms a Minus node.
755 * @param mod the debug module
756 * @param block the block the new node should belong to
757 * @param node the ir Minus node
759 * @param mode node mode
760 * @return the created ia32 Minus node
762 ir_node *gen_Minus(firm_dbg_module_t *mod, ir_node *block, ir_node *node, ir_node *op, ir_mode *mode) {
763 if (is_ia32_Minus(op)) {
764 DBG((mod, LEVEL_1, "optimizing --(e) to e ..."));
765 return get_irn_n(op, 0);
768 return new_rd_ia32_Minus(get_irn_dbg_info(node), current_ir_graph, block, op, mode);
774 * Transforms a Conv node.
776 * @param mod the debug module
777 * @param block the block the new node should belong to
778 * @param node the ir Conv node
780 * @param mode node mode
781 * @return the created ia32 Conv node
783 ir_node *gen_Conv(firm_dbg_module_t *mod, ir_node *block, ir_node *node, ir_node *op, ir_mode *mode) {
784 return new_rd_ia32_Conv(get_irn_dbg_info(node), current_ir_graph, block, op, mode);
790 * Transforms a Not node.
792 * @param mod the debug module
793 * @param block the block the new node should belong to
794 * @param node the ir Not node
796 * @param mode node mode
797 * @return the created ia32 Not node
799 ir_node *gen_Not(firm_dbg_module_t *mod, ir_node *block, ir_node *node, ir_node *op, ir_mode *mode) {
800 return new_rd_ia32_Not(get_irn_dbg_info(node), current_ir_graph, block, op, mode);
806 * Transforms an Abs node.
808 * @param mod the debug module
809 * @param block the block the new node should belong to
810 * @param node the ir Abs node
812 * @param mode node mode
813 * @return the created ia32 Abs node
815 ir_node *gen_Abs(firm_dbg_module_t *mod, ir_node *block, ir_node *node, ir_node *op, ir_mode *mode) {
816 return new_rd_ia32_Abs(get_irn_dbg_info(node), current_ir_graph, block, op, mode);
824 * @param mod the debug module
825 * @param block the block the new node should belong to
826 * @param node the ir Load node
827 * @param mode node mode
828 * @return the created ia32 Load node
830 ir_node *gen_Load(firm_dbg_module_t *mod, ir_node *block, ir_node *node, ir_mode *mode) {
831 return new_rd_ia32_Load(get_irn_dbg_info(node), current_ir_graph, block, get_Load_mem(node), get_Load_ptr(node), mode);
837 * Transforms a Store.
839 * @param mod the debug module
840 * @param block the block the new node should belong to
841 * @param node the ir Store node
842 * @param mode node mode
843 * @return the created ia32 Store node
845 ir_node *gen_Store(firm_dbg_module_t *mod, ir_node *block, ir_node *node, ir_mode *mode) {
846 return new_rd_ia32_Store(get_irn_dbg_info(node), current_ir_graph, block, get_Store_mem(node), get_Store_ptr(node), get_Store_value(node), mode);
854 * @param mod the debug module
855 * @param block the block the new node should belong to
856 * @param node the ir Call node
857 * @param dummy mode doesn't matter
858 * @return the created ia32 Store node
860 ir_node *gen_Call(firm_dbg_module_t *mod, ir_node *block, ir_node *node, ir_mode *dummy) {
861 return new_rd_ia32_Call(get_irn_dbg_info(node), current_ir_graph, block, node);
867 * Transforms the given firm node (and maybe some other related nodes)
868 * into one or more assembler nodes.
870 * @param node the firm node
871 * @param env the debug module
873 void transform_node(ir_node *node, void *env) {
874 firm_dbg_module_t *mod = (firm_dbg_module_t *)env;
875 opcode code = get_irn_opcode(node);
876 ir_node *asm_node = NULL;
883 block = get_nodes_block(node);
884 mode = get_irn_mode(node);
886 #define BINOP_COM(a) case iro_##a: asm_node = gen_arith_Op(mod, block, node, get_irn_n(node, 0), get_irn_n(node, 1), mode, 1); break
887 #define BINOP_NCOM(a) case iro_##a: asm_node = gen_arith_Op(mod, block, node, get_irn_n(node, 0), get_irn_n(node, 1), mode, 0); break
888 #define UNOP(a) case iro_##a: asm_node = gen_##a(mod, block, node, get_irn_n(node, 0), mode); break
889 #define GEN(a) case iro_##a: asm_node = gen_##a(mod, block, node, mode); break
890 #define IGN(a) case iro_##a: break
891 #define BAD(a) case iro_##a: goto bad
893 DBG((mod, LEVEL_1, "transforming node %s (%ld) ... ", get_irn_opname(node), get_irn_node_nr(node)));
955 if (get_irn_op(node) == get_op_Mulh() ||
956 get_irn_op(node) == get_op_Max() ||
957 get_irn_op(node) == get_op_Min())
959 asm_node = gen_arith_Op(mod, block, node, get_irn_n(node, 0), get_irn_n(node, 1), mode, 1);
963 fprintf(stderr, "Not implemented: %s\n", get_irn_opname(node));
968 exchange(node, asm_node);
969 DBG((mod, LEVEL_1, "created node %u\n", get_irn_node_nr(asm_node)));
972 DBG((mod, LEVEL_1, "ignored\n"));