16 #include "../benode_t.h"
17 #include "bearch_ia32_t.h"
19 #include "ia32_nodes_attr.h"
20 #include "../arch/archop.h" /* we need this for Min and Max nodes */
21 #include "ia32_transform.h"
22 #include "ia32_new_nodes.h"
24 #include "gen_ia32_regalloc_if.h"
26 extern ir_op *get_op_Mulh(void);
28 static int maxnum_gpreg_args = 3; /* maximum number of int arguments passed in registers; default 3 */
29 static int maxnum_fpreg_args = 5; /* maximum number of float arguments passed in registers; default 5 */
31 static const ia32_register_req_t **current_gpreg_param_req;
32 static const ia32_register_req_t **current_fpreg_param_req;
34 /* this is the order of the assigned registers usesd for parameter passing */
36 const ia32_register_req_t *gpreg_param_req_std[] = {
37 &ia32_default_req_ia32_general_purpose_eax,
38 &ia32_default_req_ia32_general_purpose_ecx,
39 &ia32_default_req_ia32_general_purpose_edx,
40 &ia32_default_req_ia32_general_purpose_ebx,
41 &ia32_default_req_ia32_general_purpose_edi,
42 &ia32_default_req_ia32_general_purpose_esi
45 const ia32_register_req_t *gpreg_param_req_this[] = {
46 &ia32_default_req_ia32_general_purpose_ecx,
47 &ia32_default_req_ia32_general_purpose_eax,
48 &ia32_default_req_ia32_general_purpose_edx,
49 &ia32_default_req_ia32_general_purpose_ebx,
50 &ia32_default_req_ia32_general_purpose_edi,
51 &ia32_default_req_ia32_general_purpose_esi
54 const ia32_register_req_t *fpreg_param_req_std[] = {
55 &ia32_default_req_ia32_floating_point_xmm0,
56 &ia32_default_req_ia32_floating_point_xmm1,
57 &ia32_default_req_ia32_floating_point_xmm2,
58 &ia32_default_req_ia32_floating_point_xmm3,
59 &ia32_default_req_ia32_floating_point_xmm4,
60 &ia32_default_req_ia32_floating_point_xmm5,
61 &ia32_default_req_ia32_floating_point_xmm6,
62 &ia32_default_req_ia32_floating_point_xmm7
65 const ia32_register_req_t *fpreg_param_req_this[] = {
66 NULL, /* in case of a "this" pointer, the first parameter must not be a float */
67 &ia32_default_req_ia32_floating_point_xmm0,
68 &ia32_default_req_ia32_floating_point_xmm1,
69 &ia32_default_req_ia32_floating_point_xmm2,
70 &ia32_default_req_ia32_floating_point_xmm3,
71 &ia32_default_req_ia32_floating_point_xmm4,
72 &ia32_default_req_ia32_floating_point_xmm5,
73 &ia32_default_req_ia32_floating_point_xmm6,
74 &ia32_default_req_ia32_floating_point_xmm7
77 /* this is a struct to minimize the number of parameters
78 passed to each gen_xxx function */
79 typedef struct _transform_env_t {
80 const arch_env_t *arch_env; /**<< The arch_env */
81 firm_dbg_module_t *mod; /**<< The firm debugger */
82 dbg_info *dbg; /**<< The node debug info */
83 ir_graph *irg; /**<< The irg, the node should be created in */
84 ir_node *block; /**<< The block, the node should belong to */
85 ir_node *irn; /**<< The irn, to be transformed */
86 ir_mode *mode; /**<< The mode of the irn */
90 /****************************************************************************************************
92 * | | | | / _| | | (_)
93 * _ __ ___ __| | ___ | |_ _ __ __ _ _ __ ___| |_ ___ _ __ _ __ ___ __ _| |_ _ ___ _ __
94 * | '_ \ / _ \ / _` |/ _ \ | __| '__/ _` | '_ \/ __| _/ _ \| '__| '_ ` _ \ / _` | __| |/ _ \| '_ \
95 * | | | | (_) | (_| | __/ | |_| | | (_| | | | \__ \ || (_) | | | | | | | | (_| | |_| | (_) | | | |
96 * |_| |_|\___/ \__,_|\___| \__|_| \__,_|_| |_|___/_| \___/|_| |_| |_| |_|\__,_|\__|_|\___/|_| |_|
98 ****************************************************************************************************/
102 /* determine if one operator is an Imm */
103 static ir_node *get_immediate_op(ir_node *op1, ir_node *op2) {
105 return is_ia32_Const(op1) ? op1 : (is_ia32_Const(op2) ? op2 : NULL);
106 else return is_ia32_Const(op2) ? op2 : NULL;
109 /* determine if one operator is not an Imm */
110 static ir_node *get_expr_op(ir_node *op1, ir_node *op2) {
111 return !is_ia32_Const(op1) ? op1 : (!is_ia32_Const(op2) ? op2 : NULL);
117 * Creates an ia32 Add with immediate.
119 * @param dbg firm dbg
120 * @param block the block the new node should belong to
121 * @param expr_op operator
122 * @param mode node mode
123 * @return the created ia23 Add_i node
125 static ir_node *gen_imm_Add(transform_env_t *env, ir_node *expr_op, ir_node *const_op) {
127 tarval *tv = get_ia32_Immop_tarval(const_op);
129 tarval_classification_t class_tv, class_negtv;
130 firm_dbg_module_t *mod = env->mod;
131 dbg_info *dbg = env->dbg;
132 ir_mode *mode = env->mode;
133 ir_graph *irg = env->irg;
134 ir_node *block = env->block;
136 /* const_op: tarval or SymConst? */
138 /* optimize tarvals */
139 class_tv = classify_tarval(tv);
140 class_negtv = classify_tarval(tarval_neg(tv));
142 if (class_tv == TV_CLASSIFY_ONE) { /* + 1 == INC */
143 DBG((env->mod, LEVEL_2, "optimizing Add(1) to Inc ... "));
144 new_op = new_rd_ia32_Inc(dbg, irg, block, expr_op, mode);
146 else if (class_tv == TV_CLASSIFY_ALL_ONE || class_negtv == TV_CLASSIFY_ONE) { /* + (-1) == DEC */
147 DBG((mod, LEVEL_2, "optimizing Add(-1) to Dec ... "));
148 new_op = new_rd_ia32_Dec(dbg, irg, block, expr_op, mode);
157 new_op = new_rd_ia32_Lea_i(dbg, irg, block, expr_op, mode);
163 * Creates an ia32 Add.
165 * @param dbg firm node dbg
166 * @param block the block the new node should belong to
167 * @param op1 first operator
168 * @param op2 second operator
169 * @param mode node mode
170 * @return the created ia32 Add node
172 static ir_node *gen_Add(transform_env_t *env, ir_node *op1, ir_node *op2) {
177 firm_dbg_module_t *mod = env->mod;
178 dbg_info *dbg = env->dbg;
179 ir_mode *mode = env->mode;
180 ir_graph *irg = env->irg;
181 ir_node *block = env->block;
183 if (mode_is_float(mode)) {
184 return new_rd_ia32_fAdd(dbg, irg, block, op1, op2, mode);
187 /* try to optimize with LEA */
189 shli_op = is_ia32_Shl_i(op1) ? op1 : (is_ia32_Shl_i(op2) ? op2 : NULL);
190 expr_op = shli_op == op1 ? op2 : (shli_op == op2 ? op1 : NULL);
193 tarval *tv = get_ia32_Immop_tarval(shli_op);
196 switch (get_tarval_long(tv)) {
200 // If the other operand of the LEA is an LEA_i (that means LEA ofs(%regop1)),
201 // we can skip it and transform the whole sequence into LEA ofs(%regop1, %regop2, shl_val),
202 if (is_ia32_Lea_i(expr_op)) {
203 offs = get_ia32_Immop_tarval(expr_op);
204 expr_op = get_irn_n(expr_op, 0);
207 new_op = new_rd_ia32_Lea(dbg, irg, block, expr_op, get_irn_n(shli_op, 0), mode);
208 set_ia32_Immop_tarval(new_op, tv);
209 set_ia32_am_offs(new_op, offs);
224 new_op = new_rd_ia32_Lea(dbg, irg, block, op1, op2, mode);
225 set_ia32_Immop_tarval(new_op, get_tarval_null(mode_Iu));
226 set_ia32_am_offs(new_op, NULL);
235 * Generates an ia32 Mul node.
237 * @param env The transformation environment
238 * @param op1 The first faktor
239 * @param op2 The second factor
240 * @param mul_flav flavour_Mul/Mulh
241 * @return The ready-to-go Mul node
243 ir_node *generate_Mul(transform_env_t *env, ir_node *op1, ir_node *op2, op_flavour_t mul_flav, int is_imm_op) {
244 ir_node *in_keep[1], *res;
245 long pn_good, pn_bad;
246 dbg_info *dbg = env->dbg;
247 ir_graph *irg = env->irg;
248 ir_node *block = env->block;
249 ir_mode *mode = env->mode;
254 mul = new_rd_ia32_Mul_i(dbg, irg, block, op1, mode_T);
255 set_ia32_Immop_attr(mul, op2);
258 mul = new_rd_ia32_Mul(dbg, irg, block, op1, op2, mode_T);
260 set_ia32_flavour(mul, mul_flav);
262 /* create the mul infrastructure */
263 if (mul_flav == flavour_Mul) {
272 res = new_rd_Proj(dbg, irg, block, mul, mode, pn_good);
273 in_keep[0] = new_rd_Proj(dbg, irg, block, mul, mode, pn_bad);
275 be_new_Keep(&ia32_reg_classes[CLASS_ia32_general_purpose], irg, block, 1, in_keep);
283 * Creates an ia32 Mul with immediate.
285 * @param dbg firm dbg
286 * @param block the block the new node should belong to
287 * @param expr_op operator
288 * @param mode node mode
289 * @return the created ia23 Mul_i node
291 static ir_node *gen_imm_Mul(transform_env_t *env, ir_node *expr_op, ir_node *const_op) {
292 /* Mul with immediate only possible with int, so we don't need to check for float */
293 return generate_Mul(env, expr_op, const_op, flavour_Mul, 1);
297 * Creates an ia32 Mul.
299 * @param dbg firm node dbg
300 * @param block the block the new node should belong to
301 * @param op1 first operator
302 * @param op2 second operator
303 * @param mode node mode
304 * @return the created ia32 Mul node
306 ir_node *gen_Mul(transform_env_t *env, ir_node *op1, ir_node *op2) {
307 if (mode_is_float(env->mode)) {
308 return new_rd_ia32_fMul(env->dbg, env->irg, env->block, op1, op2, env->mode);
311 return generate_Mul(env, op1, op2, flavour_Mul, 0);
318 * Creates an ia32 Mulh with immediate.
319 * Note: Mul produces a 64Bit result and Mulh returns the upper 32 bit of
320 * this result while Mul returns the lower 32 bit.
322 * @param dbg firm dbg
323 * @param block the block the new node should belong to
324 * @param expr_op operator
325 * @param mode node mode
326 * @return the created ia23 Mulh_i node
328 static ir_node *gen_imm_Mulh(transform_env_t *env, ir_node *expr_op, ir_node *const_op) {
329 return generate_Mul(env, expr_op, const_op, flavour_Mulh, 1);
333 * Creates an ia32 Mulh.
334 * Note: Mul produces a 64Bit result and Mulh returns the upper 32 bit of
335 * this result while Mul returns the lower 32 bit.
337 * @param dbg firm node dbg
338 * @param block the block the new node should belong to
339 * @param op1 first operator
340 * @param op2 second operator
341 * @param mode node mode
342 * @return the created ia32 Mulh node
344 static ir_node *gen_Mulh(transform_env_t *env, ir_node *op1, ir_node *op2) {
345 return generate_Mul(env, op1, op2, flavour_Mulh, 0);
351 * Creates an ia32 And with immediate.
353 * @param dbg firm dbg
354 * @param block the block the new node should belong to
355 * @param expr_op operator
356 * @param mode node mode
357 * @return the created ia23 And_i node
359 static ir_node *gen_imm_And(transform_env_t *env, ir_node *expr_op, ir_node *const_op) {
360 return new_rd_ia32_And_i(env->dbg, env->irg, env->block, expr_op, env->mode);
364 * Creates an ia32 And.
366 * @param dbg firm node dbg
367 * @param block the block the new node should belong to
368 * @param op1 first operator
369 * @param op2 second operator
370 * @param mode node mode
371 * @return the created ia32 And node
373 static ir_node *gen_And(transform_env_t *env, ir_node *op1, ir_node *op2) {
374 return new_rd_ia32_And(env->dbg, env->irg, env->block, op1, op2, env->mode);
380 * Creates an ia32 Or with immediate.
382 * @param dbg firm dbg
383 * @param block the block the new node should belong to
384 * @param expr_op operator
385 * @param mode node mode
386 * @return the created ia23 Or_i node
388 static ir_node *gen_imm_Or(transform_env_t *env, ir_node *expr_op, ir_node *const_op) {
389 return new_rd_ia32_Or_i(env->dbg, env->irg, env->block, expr_op, env->mode);
393 * Creates an ia32 Or.
395 * @param dbg firm node dbg
396 * @param block the block the new node should belong to
397 * @param op1 first operator
398 * @param op2 second operator
399 * @param mode node mode
400 * @return the created ia32 Or node
402 static ir_node *gen_Or(transform_env_t *env, ir_node *op1, ir_node *op2) {
403 return new_rd_ia32_Or(env->dbg, env->irg, env->block, op1, op2, env->mode);
409 * Creates an ia32 Eor with immediate.
411 * @param dbg firm dbg
412 * @param block the block the new node should belong to
413 * @param expr_op operator
414 * @param mode node mode
415 * @return the created ia23 Eor_i node
417 static ir_node *gen_imm_Eor(transform_env_t *env, ir_node *expr_op, ir_node *const_op) {
418 return new_rd_ia32_Eor_i(env->dbg, env->irg, env->block, expr_op, env->mode);
422 * Creates an ia32 Eor.
424 * @param dbg firm node dbg
425 * @param block the block the new node should belong to
426 * @param op1 first operator
427 * @param op2 second operator
428 * @param mode node mode
429 * @return the created ia32 Eor node
431 static ir_node *gen_Eor(transform_env_t *env, ir_node *op1, ir_node *op2) {
432 return new_rd_ia32_Eor(env->dbg, env->irg, env->block, op1, op2, env->mode);
438 * Creates an ia32 Max.
440 * @param dbg firm dbg
441 * @param block the block the new node should belong to
442 * @param expr_op operator
443 * @param mode node mode
444 * @return the created ia23 Max node
446 static ir_node *gen_Max(transform_env_t *env, ir_node *op1, ir_node *op2) {
447 return new_rd_ia32_Max(env->dbg, env->irg, env->block, op1, op2, env->mode);
453 * Creates an ia32 Min.
455 * @param dbg firm dbg
456 * @param block the block the new node should belong to
457 * @param expr_op operator
458 * @param mode node mode
459 * @return the created ia23 Min node
461 static ir_node *gen_Min(transform_env_t *env, ir_node *op1, ir_node *op2) {
462 return new_rd_ia32_Min(env->dbg, env->irg, env->block, op1, op2, env->mode);
468 * Creates an ia32 Sub with immediate.
470 * @param dbg firm dbg
471 * @param block the block the new node should belong to
472 * @param expr_op operator
473 * @param mode node mode
474 * @return the created ia23 Sub_i node
476 static ir_node *gen_imm_Sub(transform_env_t *env, ir_node *expr_op, ir_node *const_op) {
478 tarval *tv = get_ia32_Immop_tarval(const_op);
480 tarval_classification_t class_tv, class_negtv;
481 firm_dbg_module_t *mod = env->mod;
482 dbg_info *dbg = env->dbg;
483 ir_mode *mode = env->mode;
484 ir_graph *irg = env->irg;
485 ir_node *block = env->block;
487 /* const_op: tarval or SymConst? */
489 /* optimize tarvals */
490 class_tv = classify_tarval(tv);
491 class_negtv = classify_tarval(tarval_neg(tv));
493 if (class_tv == TV_CLASSIFY_ONE) { /* - 1 == DEC */
494 DBG((mod, LEVEL_2, "optimizing Sub(1) to Dec ... "));
495 new_op = new_rd_ia32_Dec(dbg, irg, block, expr_op, mode);
497 else if (class_negtv == TV_CLASSIFY_ONE) { /* - (-1) == Sub */
498 DBG((mod, LEVEL_2, "optimizing Sub(-1) to Inc ... "));
499 new_op = new_rd_ia32_Inc(dbg, irg, block, expr_op, mode);
508 new_op = new_rd_ia32_Sub_i(dbg, irg, block, expr_op, mode);
514 * Creates an ia32 Sub.
516 * @param dbg firm node dbg
517 * @param block the block the new node should belong to
518 * @param op1 first operator
519 * @param op2 second operator
520 * @param mode node mode
521 * @return the created ia32 Sub node
523 static ir_node *gen_Sub(transform_env_t *env, ir_node *op1, ir_node *op2) {
524 if (mode_is_float(env->mode)) {
525 return new_rd_ia32_fSub(env->dbg, env->irg, env->block, op1, op2, env->mode);
527 return new_rd_ia32_Sub(env->dbg, env->irg, env->block, op1, op2, env->mode);
533 * Generates an ia32 DivMod with additional infrastructure for the
534 * register allocator if needed.
536 * @param env The transformation environment
537 * @param dividend -no comment- :)
538 * @param divisor -no comment- :)
539 * @param dm_flav flavour_Div/Mod/DivMod
540 * @return The created ia32 DivMod node
542 static ir_node *generate_DivMod(transform_env_t *env, ir_node *dividend, ir_node *divisor, op_flavour_t dm_flav) {
544 ir_node *edx_node, *cltd;
546 dbg_info *dbg = env->dbg;
547 ir_graph *irg = env->irg;
548 ir_node *block = env->block;
549 ir_mode *mode = env->mode;
550 ir_node *irn = env->irn;
551 ir_node *mem = get_DivMod_mem(irn);
553 if (mode_is_signed(mode)) {
554 /* in signed mode, we need to sign extend the dividend */
555 cltd = new_rd_ia32_Cltd(dbg, irg, block, dividend, mode_T);
556 dividend = new_rd_Proj(dbg, irg, block, cltd, mode_Is, pn_EAX);
557 edx_node = new_rd_Proj(dbg, irg, block, cltd, mode_Is, pn_EDX);
560 edx_node = new_rd_ia32_Const(dbg, irg, block, mode_Iu);
561 set_ia32_Const_type(edx_node, asmop_Const);
562 set_ia32_Immop_tarval(edx_node, get_tarval_null(mode_Iu));
565 res = new_rd_ia32_DivMod(dbg, irg, block, dividend, divisor, edx_node, mem, mode);
567 set_ia32_flavour(res, dm_flav);
568 set_ia32_n_res(res, 2);
570 /* Only one proj is used -> We must add a second proj and */
571 /* connect this one to a Keep node to eat up the second */
572 /* destroyed register. */
573 if (get_irn_n_edges(irn) == 1) {
574 proj = get_edge_src_irn(get_irn_out_edge_first(irn));
575 assert(is_Proj(proj) && "non-Proj to Div/Mod node");
577 if (get_Proj_proj(proj) == pn_DivMod_res_div) {
578 in_keep[0] = new_rd_Proj(dbg, irg, block, res, mode_Is, pn_DivMod_res_mod);
581 in_keep[0] = new_rd_Proj(dbg, irg, block, res, mode_Is, pn_DivMod_res_div);
584 be_new_Keep(&ia32_reg_classes[CLASS_ia32_general_purpose], irg, block, 1, in_keep);
592 * Wrapper for generate_DivMod. Sets flavour_Mod.
594 static ir_node *gen_Mod(transform_env_t *env, ir_node *op1, ir_node *op2) {
595 return generate_DivMod(env, op1, op2, flavour_Mod);
601 * Wrapper for generate_DivMod. Sets flavour_Div.
603 static ir_node *gen_Div(transform_env_t *env, ir_node *op1, ir_node *op2) {
604 return generate_DivMod(env, op1, op2, flavour_Div);
610 * Wrapper for generate_DivMod. Sets flavour_DivMod.
612 static ir_node *gen_DivMod(transform_env_t *env, ir_node *op1, ir_node *op2) {
613 return generate_DivMod(env, op1, op2, flavour_DivMod);
619 * Creates an ia32 floating Div.
621 * @param dbg firm node dbg
622 * @param block the block the new node should belong to
623 * @param op1 first operator
624 * @param op2 second operator
625 * @param mode node mode
626 * @return the created ia32 fDiv node
628 static ir_node *gen_Quot(transform_env_t *env, ir_node *op1, ir_node *op2) {
629 return new_rd_ia32_fDiv(env->dbg, env->irg, env->block, op1, op2, env->mode);
635 * Creates an ia32 Shl with immediate.
637 * @param dbg firm dbg
638 * @param block the block the new node should belong to
639 * @param expr_op operator
640 * @param mode node mode
641 * @return the created ia23 Shl_i node
643 static ir_node *gen_imm_Shl(transform_env_t *env, ir_node *expr_op, ir_node *const_op) {
644 return new_rd_ia32_Shl_i(env->dbg, env->irg, env->block, expr_op, env->mode);
648 * Creates an ia32 Shl.
650 * @param dbg firm node dbg
651 * @param block the block the new node should belong to
652 * @param op1 first operator
653 * @param op2 second operator
654 * @param mode node mode
655 * @return the created ia32 Shl node
657 static ir_node *gen_Shl(transform_env_t *env, ir_node *op1, ir_node *op2) {
658 return new_rd_ia32_Shl(env->dbg, env->irg, env->block, op1, op2, env->mode);
664 * Creates an ia32 Shr with immediate.
666 * @param dbg firm dbg
667 * @param block the block the new node should belong to
668 * @param expr_op operator
669 * @param mode node mode
670 * @return the created ia23 Shr_i node
672 static ir_node *gen_imm_Shr(transform_env_t *env, ir_node *expr_op, ir_node *const_op) {
673 return new_rd_ia32_Shr_i(env->dbg, env->irg, env->block, expr_op, env->mode);
677 * Creates an ia32 Shr.
679 * @param dbg firm node dbg
680 * @param block the block the new node should belong to
681 * @param op1 first operator
682 * @param op2 second operator
683 * @param mode node mode
684 * @return the created ia32 Shr node
686 static ir_node *gen_Shr(transform_env_t *env, ir_node *op1, ir_node *op2) {
687 return new_rd_ia32_Shr(env->dbg, env->irg, env->block, op1, op2, env->mode);
693 * Creates an ia32 Shrs with immediate.
695 * @param dbg firm dbg
696 * @param block the block the new node should belong to
697 * @param expr_op operator
698 * @param mode node mode
699 * @return the created ia23 Shrs_i node
701 static ir_node *gen_imm_Shrs(transform_env_t *env, ir_node *expr_op, ir_node *const_op) {
702 return new_rd_ia32_Shrs_i(env->dbg, env->irg, env->block, expr_op, env->mode);
706 * Creates an ia32 Shrs.
708 * @param dbg firm node dbg
709 * @param block the block the new node should belong to
710 * @param op1 first operator
711 * @param op2 second operator
712 * @param mode node mode
713 * @return the created ia32 Shrs node
715 static ir_node *gen_Shrs(transform_env_t *env, ir_node *op1, ir_node *op2) {
716 return new_rd_ia32_Shrs(env->dbg, env->irg, env->block, op1, op2, env->mode);
722 * Creates an ia32 RotL.
724 * @param dbg firm node dbg
725 * @param block the block the new node should belong to
726 * @param op1 first operator
727 * @param op2 second operator
728 * @param mode node mode
729 * @return the created ia32 RotL node
731 static ir_node *gen_RotL(transform_env_t *env, ir_node *op1, ir_node *op2) {
732 return new_rd_ia32_RotL(env->dbg, env->irg, env->block, op1, op2, env->mode);
738 * Creates an ia32 RotR.
739 * NOTE: There is no RotR with immediate because this would always be a RotL
740 * "imm-mode_size_bits" which can be pre-calculated.
742 * @param dbg firm node dbg
743 * @param block the block the new node should belong to
744 * @param op1 first operator
745 * @param op2 second operator
746 * @param mode node mode
747 * @return the created ia32 RotR node
749 static ir_node *gen_RotR(transform_env_t *env, ir_node *op1, ir_node *op2) {
750 return new_rd_ia32_RotR(env->dbg, env->irg, env->block, op1, op2, env->mode);
756 * Transforms a Rot with immediate into an ia32 RotL with immediate
757 * as the Firm Rot is a RotL (see NOTE on RotR with immediate above).
759 * @param dbg firm node dbg
760 * @param block the block the new node should belong to
761 * @param op1 first operator
762 * @param op2 second operator
763 * @param mode node mode
764 * @return the created ia32 RotL node
766 static ir_node *gen_imm_Rot(transform_env_t *env, ir_node *expr_op, ir_node *const_op) {
767 return new_rd_ia32_RotL_i(env->dbg, env->irg, env->block, expr_op, env->mode);
771 * Creates an ia32 RotR or RotL (depending on the found pattern).
773 * @param dbg firm node dbg
774 * @param block the block the new node should belong to
775 * @param op1 first operator
776 * @param op2 second operator
777 * @param mode node mode
778 * @return the created ia32 RotL or RotR node
780 static ir_node *gen_Rot(transform_env_t *env, ir_node *op1, ir_node *op2) {
781 ir_node *rotate = NULL;
783 /* Firm has only Rot (which is a RotL), so we are looking for a right (op2)
784 operand "-e+mode_size_bits" (it's an already modified "mode_size_bits-e",
785 that means we can create a RotR instead of an Add and a RotL */
787 if (is_ia32_Add_i(op2)) {
788 ir_node *minus = get_irn_n(op2, 0); // is there an op_Minus?
790 if (is_ia32_Minus(minus)) {
791 tarval *tv = get_ia32_Immop_tarval(op2);
792 long bits = get_mode_size_bits(env->mode);
794 if (tarval_is_long(tv) && get_tarval_long(tv) == bits) {
795 DBG((env->mod, LEVEL_1, "optimizing RotL into RotR ... "));
796 rotate = gen_RotR(env, op1, get_irn_n(minus, 0));
802 rotate = gen_RotL(env, op1, op2);
810 * Transforms commutative operations (op_Add, op_And, op_Or, op_Eor)
811 * and non-commutative operations with com == 0 (op_Sub, op_Shl, op_Shr, op_Shrs, op_Rot)
813 * @param mod the debug module
814 * @param block the block node belongs to
815 * @param node the node to transform
816 * @param op1 first operator
817 * @param op2 second operator
818 * @param mode node mode
819 * @param com flag if op is commutative
820 * @return the created assembler node
822 static ir_node *gen_arith_Op(transform_env_t *env, ir_node *op1, ir_node *op2, int com) {
823 firm_dbg_module_t *mod = env->mod;
824 dbg_info *dbg = env->dbg;
825 ir_node *node = env->irn;
826 ir_node *imm_op = NULL;
827 ir_node *expr_op = NULL;
828 ir_node *asm_node = NULL;
829 opcode opc = get_irn_opcode(node);
830 ir_op *op = get_irn_op(node);
834 #undef GENOPI_SETATTR
835 #define GENOP(a) case iro_##a: asm_node = gen_##a(env, op1, op2); break
836 #define GENOPI(a) case iro_##a: asm_node = gen_imm_##a(env, expr_op, imm_op); break
837 #define GENOPI_SETATTR(a) case iro_##a: asm_node = gen_imm_##a(env, expr_op, imm_op); set_ia32_Immop_attr(asm_node, imm_op); break
840 imm_op = get_immediate_op(op1, op2);
842 imm_op = get_immediate_op(NULL, op2);
844 expr_op = get_expr_op(op1, op2);
846 /* TODO: Op(Const, Const) support */
847 if (is_ia32_Const(op1) && is_ia32_Const(op2)) {
848 DBG((mod, LEVEL_2, "found unexpected %s(Const, Const), creating binop ... ", get_irn_opname(node)));
852 /* There are arithmetic operations which can't take an immediate */
857 DBG((mod, LEVEL_2, "Div/Mod/DivMod imm not available, creating binop ... "));
861 if (op == get_op_Min() || op == get_op_Max()) {
862 DBG((mod, LEVEL_2, "MIN/MAX imm not available, creating binop ... "));
868 DBG((mod, LEVEL_1, "(op1: %s -- op2: %s) ... ", get_irn_opname(op1), get_irn_opname(op2)));
870 if (!mode_is_float(env->mode) && imm_op) {
871 DBG((mod, LEVEL_1, "%s with imm ... ", get_irn_opname(node)));
883 GENOPI_SETATTR(Shrs);
886 if (op == get_op_Mulh()) {
887 asm_node = gen_imm_Mulh(env, expr_op, imm_op);
890 assert("binop_i: THIS SHOULD NOT HAPPEN");
895 DBG((mod, LEVEL_1, "%s as binop ... ", get_irn_opname(node)));
916 if (op == get_op_Max()) {
917 asm_node = gen_Max(env, op1, op2);
919 else if (op == get_op_Min()) {
920 asm_node = gen_Min(env, op1, op2);
922 else if (op == get_op_Mulh()) {
923 asm_node = gen_Mulh(env, op1, op2);
926 assert("binop: THIS SHOULD NOT HAPPEN");
935 #undef GENOPI_SETATTR
940 * Transforms a Minus node.
942 * @param mod the debug module
943 * @param block the block the new node should belong to
944 * @param node the ir Minus node
946 * @param mode node mode
947 * @return the created ia32 Minus node
949 static ir_node *gen_Minus(transform_env_t *env, ir_node *op) {
950 if (is_ia32_Minus(op) || is_ia32_fMinus(op)) {
951 DBG((env->mod, LEVEL_1, "optimizing --(e) to e ..."));
952 return get_irn_n(op, 0);
955 if (mode_is_float(env->mode)) {
956 return new_rd_ia32_fMinus(env->dbg, env->irg, env->block, op, env->mode);
958 return new_rd_ia32_Minus(env->dbg, env->irg, env->block, op, env->mode);
965 * Transforms a Conv node.
967 * @param mod the debug module
968 * @param block the block the new node should belong to
969 * @param node the ir Conv node
971 * @param mode node mode
972 * @return the created ia32 Conv node
974 static ir_node *gen_Conv(transform_env_t *env, ir_node *op) {
975 return new_rd_ia32_Conv(env->dbg, env->irg, env->block, op, env->mode);
981 * Transforms a Not node.
983 * @param mod the debug module
984 * @param block the block the new node should belong to
985 * @param node the ir Not node
987 * @param mode node mode
988 * @return the created ia32 Not node
990 static ir_node *gen_Not(transform_env_t *env, ir_node *op) {
991 return new_rd_ia32_Not(env->dbg, env->irg, env->block, op, env->mode);
997 * Transforms an Abs node.
999 * @param mod the debug module
1000 * @param block the block the new node should belong to
1001 * @param node the ir Abs node
1002 * @param op operator
1003 * @param mode node mode
1004 * @return the created ia32 Abs node
1006 static ir_node *gen_Abs(transform_env_t *env, ir_node *op) {
1007 ir_node *res, *p_eax, *p_edx;
1008 firm_dbg_module_t *mod = env->mod;
1009 dbg_info *dbg = env->dbg;
1010 ir_mode *mode = env->mode;
1011 ir_graph *irg = env->irg;
1012 ir_node *block = env->block;
1014 res = new_rd_ia32_Cltd(dbg, irg, block, op, mode_T);
1015 p_eax = new_rd_Proj(dbg, irg, block, res, mode, pn_EAX);
1016 p_edx = new_rd_Proj(dbg, irg, block, res, mode, pn_EDX);
1017 res = new_rd_ia32_Eor(dbg, irg, block, p_eax, p_edx, mode);
1018 res = new_rd_ia32_Sub(dbg, irg, block, res, p_edx, mode);
1026 * Transforms a Load.
1028 * @param mod the debug module
1029 * @param block the block the new node should belong to
1030 * @param node the ir Load node
1031 * @param mode node mode
1032 * @return the created ia32 Load node
1034 static ir_node *gen_Load(transform_env_t *env) {
1035 ir_node *node = env->irn;
1037 if (mode_is_float(env->mode)) {
1038 return new_rd_ia32_fLoad(env->dbg, env->irg, env->block, get_Load_ptr(node), get_Load_mem(node), env->mode);
1040 return new_rd_ia32_Load(env->dbg, env->irg, env->block, get_Load_ptr(node), get_Load_mem(node), env->mode);
1046 * Transforms a Store.
1048 * @param mod the debug module
1049 * @param block the block the new node should belong to
1050 * @param node the ir Store node
1051 * @param mode node mode
1052 * @return the created ia32 Store node
1054 ir_node *gen_Store(transform_env_t *env) {
1055 ir_node *node = env->irn;
1057 if (mode_is_float(env->mode)) {
1058 return new_rd_ia32_fStore(env->dbg, env->irg, env->block, get_Store_ptr(node), get_Store_value(node), get_Store_mem(node), env->mode);
1060 return new_rd_ia32_Store(env->dbg, env->irg, env->block, get_Store_ptr(node), get_Store_value(node), get_Store_mem(node), env->mode);
1066 * Check all parameters and determine the maximum number of parameters
1067 * to pass in gp regs resp. in fp regs.
1069 static void get_n_regparam_class(int n, ir_node **param, int *n_int, int *n_float) {
1072 for (i = 0; i < n; i++) {
1073 if (mode_is_int(get_irn_mode(param[i])))
1074 *n_int = *n_int + 1;
1075 else if (mode_is_float(get_irn_mode(param[i])))
1076 *n_float = *n_float + 1;
1078 /* test for maximum */
1079 if (*n_int == maxnum_gpreg_args)
1082 if (*n_float == maxnum_fpreg_args)
1088 * Transforms a Call and its arguments corresponding to the calling convention.
1090 * @param mod the debug module
1091 * @param block the block the new node should belong to
1092 * @param node the ir Call node
1093 * @param dummy mode doesn't matter
1094 * @return the created ia32 Call node
1096 static ir_node *gen_Call(transform_env_t *env) {
1097 const ia32_register_req_t **in_req;
1099 ir_node *new_call, *sync;
1101 int i, j, n_new_call_in;
1103 firm_dbg_module_t *mod = env->mod;
1104 dbg_info *dbg = env->dbg;
1105 ir_graph *irg = env->irg;
1106 ir_node *block = env->block;
1107 ir_node *call = env->irn;
1108 ir_node **stack_param = NULL;
1109 ir_node **param = get_Call_param_arr(call);
1110 ir_node *call_Mem = get_Call_mem(call);
1111 unsigned cc = get_method_calling_convention(get_Call_type(call));
1112 int n = get_Call_n_params(call);
1113 int n_gpregparam = 0;
1114 int n_fpregparam = 0;
1120 if (cc & cc_reg_param)
1121 get_n_regparam_class(n, param, &n_gpregparam, &n_fpregparam);
1123 /* do we need to pass arguments on stack? */
1124 if (n - n_gpregparam - n_fpregparam > 0)
1125 stack_param = calloc(n - n_gpregparam - n_fpregparam, sizeof(ir_node *));
1127 /* we need at least one in, either for the stack params or the call_Mem */
1128 n_new_call_in = 1 + n_gpregparam + n_fpregparam;
1130 current_gpreg_param_req = gpreg_param_req_std;
1131 current_fpreg_param_req = fpreg_param_req_std;
1133 if (cc & cc_this_call) {
1134 current_gpreg_param_req = gpreg_param_req_this;
1135 current_fpreg_param_req = fpreg_param_req_this;
1138 /* the call has one IN for all stack parameter and one IN for each reg param */
1139 in = calloc(n_new_call_in, sizeof(ir_node *));
1140 in_req = calloc(n_new_call_in, sizeof(arch_register_req_t *));
1142 /* loop over all parameters and determine whether its a int or float register parameter */
1143 for (i = 0; i < n && !done && (cc & cc_reg_param); i++) {
1144 mode = get_irn_mode(param[i]);
1146 if (mode_is_int(mode) && cur_gp_idx < maxnum_gpreg_args) {
1147 /* param can be passed in general purpose register and we have some registers left */
1148 in[cur_gp_idx + cur_fp_idx] = param[i];
1149 in_req[cur_gp_idx] = current_gpreg_param_req[cur_gp_idx];
1152 else if (mode_is_float(mode) && cur_fp_idx < maxnum_fpreg_args) {
1153 /* param can be passed in floating point register and we have some registers left */
1154 assert(current_gpreg_param_req[cur_fp_idx] && "'this' pointer cannot be passed as float");
1155 in[cur_gp_idx + cur_fp_idx] = param[i];
1156 in_req[cur_fp_idx] = current_gpreg_param_req[cur_fp_idx];
1160 /* maximum number of register parameters in one class reached? */
1161 if (cur_gp_idx >= maxnum_gpreg_args || cur_fp_idx >= maxnum_fpreg_args) {
1167 /* create remaining stack parameters */
1168 if (cc & cc_last_on_top) {
1169 for (i = stack_idx; i < n; i++) {
1170 /* pass it on stack */
1171 if (mode_is_float(get_irn_mode(param[i]))) {
1172 stack_param[i - stack_idx] = new_rd_ia32_fStackArg(get_irn_dbg_info(param[i]), irg,
1173 block, call_Mem, param[i], mode_M);
1176 stack_param[i - stack_idx] = new_rd_ia32_StackArg(get_irn_dbg_info(param[i]), irg,
1177 block, call_Mem, param[i], mode_M);
1182 for (i = n - 1, j = 0; i >= stack_idx; i--, j++) {
1183 /* pass it on stack */
1184 if (mode_is_float(get_irn_mode(param[i]))) {
1185 stack_param[j] = new_rd_ia32_fStackArg(get_irn_dbg_info(param[i]), irg,
1186 block, call_Mem, param[i], mode_M);
1189 stack_param[j] = new_rd_ia32_StackArg(get_irn_dbg_info(param[i]), irg,
1190 block, call_Mem, param[i], mode_M);
1196 sync = new_r_Sync(irg, block, n - n_gpregparam - n_fpregparam, stack_param);
1197 in[n_new_call_in - 1] = sync;
1200 in[n_new_call_in - 1] = call_Mem;
1203 /* create the new node */
1204 new_call = new_rd_ia32_Call(dbg, irg, block, n_new_call_in, in);
1205 set_ia32_Immop_attr(new_call, get_Call_ptr(call));
1206 set_ia32_n_res(new_call, 1);
1208 /* set register requirements for in and out */
1209 attr = get_ia32_attr(new_call);
1210 attr->in_req = in_req;
1211 attr->out_req = calloc(1, sizeof(ia32_register_req_t *));
1212 attr->out_req[0] = &ia32_default_req_ia32_general_purpose_eax;
1213 attr->slots = calloc(1, sizeof(arch_register_t *));
1215 /* stack parameter has no OUT register */
1216 attr->in_req[n_new_call_in - 1] = &ia32_default_req_none;
1224 * creates a unique ident by adding a number to a tag
1226 * @param tag the tag string, must contain a %d if a number
1229 static ident *unique_id(const char *tag)
1231 static unsigned id = 0;
1234 snprintf(str, sizeof(str), tag, ++id);
1235 return new_id_from_str(str);
1239 * Transforms a SymConst.
1241 * @param mod the debug module
1242 * @param block the block the new node should belong to
1243 * @param node the ir SymConst node
1244 * @param mode mode of the SymConst
1245 * @return the created ia32 Const node
1247 static ir_node *gen_SymConst(transform_env_t *env) {
1249 firm_dbg_module_t *mod = env->mod;
1250 dbg_info *dbg = env->dbg;
1251 ir_mode *mode = env->mode;
1252 ir_graph *irg = env->irg;
1253 ir_node *block = env->block;
1255 if (mode_is_float(mode)) {
1256 cnst = new_rd_ia32_fConst(dbg, irg, block, mode);
1260 cnst = new_rd_ia32_Const(dbg, irg, block, mode);
1263 set_ia32_Const_attr(cnst, env->irn);
1268 * Transforms a Const.
1270 * @param mod the debug module
1271 * @param block the block the new node should belong to
1272 * @param node the ir Const node
1273 * @param mode mode of the Const
1274 * @return the created ia32 Const node
1276 static ir_node *gen_Const(transform_env_t *env) {
1280 symconst_symbol sym;
1281 firm_dbg_module_t *mod = env->mod;
1282 dbg_info *dbg = env->dbg;
1283 ir_mode *mode = env->mode;
1284 ir_graph *irg = env->irg;
1285 ir_node *block = env->block;
1286 ir_node *node = env->irn;
1288 if (mode_is_float(mode)) {
1289 tp = get_Const_type(node);
1290 if (tp == firm_unknown_type) {
1291 tp = new_type_primitive(unique_id("tp_ia32_float_%u"), mode);
1294 ent = new_entity(get_glob_type(), unique_id("ia32FloatCnst_%u"), tp);
1296 set_entity_ld_ident(ent, get_entity_ident(ent));
1297 set_entity_visibility(ent, visibility_local);
1298 set_entity_variability(ent, variability_constant);
1299 set_entity_allocation(ent, allocation_static);
1301 set_atomic_ent_value(ent, node);
1305 cnst = new_rd_SymConst(dbg, irg, block, sym, symconst_addr_ent);
1307 cnst = gen_SymConst(env);
1310 cnst = new_rd_ia32_Const(dbg, irg, block, mode);
1311 set_ia32_Const_attr(cnst, node);
1320 * Transforms a Cond -> Proj[b] -> Cmp into a CondJmp or CondJmp_i
1322 * @param mod the debug module
1323 * @param block the block the new node should belong to
1324 * @param node the ir Cond node
1325 * @param mode mode of the Cond
1326 * @return The transformed node.
1328 static ir_node *gen_Cond(transform_env_t *env) {
1329 firm_dbg_module_t *mod = env->mod;
1330 dbg_info *dbg = env->dbg;
1331 ir_mode *mode = env->mode;
1332 ir_graph *irg = env->irg;
1333 ir_node *block = env->block;
1334 ir_node *node = env->irn;
1335 ir_node *sel = get_Cond_selector(node);
1336 ir_mode *sel_mode = get_irn_mode(sel);
1337 ir_node *res = NULL;
1338 ir_node *pred = NULL;
1339 ir_node *cmp_a, *cmp_b, *cnst, *expr;
1341 if (is_Proj(sel) && sel_mode == mode_b) {
1342 pred = get_Proj_pred(sel);
1344 /* get both compare operators */
1345 cmp_a = get_Cmp_left(pred);
1346 cmp_b = get_Cmp_right(pred);
1348 /* check if we can use a CondJmp with immediate */
1349 cnst = get_immediate_op(cmp_a, cmp_b);
1350 expr = get_expr_op(cmp_a, cmp_b);
1353 res = new_rd_ia32_CondJmp_i(dbg, irg, block, expr, mode_T);
1354 set_ia32_Immop_attr(res, cnst);
1357 res = new_rd_ia32_CondJmp(dbg, irg, block, cmp_a, cmp_b, mode_T);
1360 set_ia32_pncode(res, get_Proj_proj(sel));
1363 res = new_rd_ia32_SwitchJmp(dbg, irg, block, sel, mode_T);
1364 set_ia32_pncode(res, get_Cond_defaultProj(node));
1373 * Transform the argument projs from a start node corresponding to the
1374 * calling convention.
1375 * It transforms "Proj Arg x -> ProjT -> Start <- ProjM" into
1376 * "RegParam x -> ProjT -> Start" OR
1377 * "StackParam x -> ProjM -> Start"
1378 * whether parameter is passed in register or on stack.
1380 * @param mod the debug module
1381 * @param block the block the nodes should belong to
1382 * @param proj the ProjT node which points to Start
1383 * @param start the Start node
1384 * @return Should be always NULL
1386 static ir_node *gen_Proj_Start(transform_env_t *env, ir_node *proj, ir_node *start) {
1387 const ir_edge_t *edge;
1388 ir_node *succ, *irn;
1393 ir_node *proj_M = get_irg_initial_mem(current_ir_graph);
1394 entity *irg_ent = get_irg_entity(current_ir_graph);
1395 ir_type *tp = get_entity_type(irg_ent);
1400 firm_dbg_module_t *mod = env->mod;
1401 dbg_info *dbg = env->dbg;
1402 ir_graph *irg = env->irg;
1403 ir_node *block = env->block;
1405 assert(is_Method_type(tp) && "irg type is not a method");
1407 switch(get_Proj_proj(proj)) {
1408 case pn_Start_T_args:
1409 /* We cannot use get_method_n_params here as the function might
1410 be variadic or one argument is not used. */
1411 n = get_irn_n_edges(proj);
1413 /* we are done here when there are no parameters */
1417 /* temporary remember all proj arg x */
1418 projargs = calloc(n, sizeof(ir_node *));
1421 foreach_out_edge((const ir_node *)proj, edge) {
1422 succ = get_edge_src_irn(edge);
1423 assert(is_Proj(succ) && "non-Proj from a Proj_T (pn_Start_T_args).");
1424 projargs[i++] = succ;
1427 cc = get_method_calling_convention(tp);
1429 /* get the correct order in case of 'this' call */
1430 current_gpreg_param_req = gpreg_param_req_std;
1431 current_fpreg_param_req = fpreg_param_req_std;
1432 if (cc & cc_this_call) {
1433 current_gpreg_param_req = gpreg_param_req_this;
1434 current_fpreg_param_req = fpreg_param_req_this;
1437 /* loop over all parameters and check whether its a int or float */
1438 for (i = 0; i < n && !done && (cc & cc_reg_param); i++) {
1439 mode = get_irn_mode(projargs[i]);
1441 if (mode_is_int(mode) && cur_gp_idx < maxnum_gpreg_args) {
1442 /* parameter got passed in general purpose register */
1443 irn = new_rd_ia32_RegParam(get_irn_dbg_info(proj), irg, block, proj, mode);
1444 set_ia32_pncode(irn, get_Proj_proj(projargs[i]));
1445 set_ia32_req_out(irn, current_gpreg_param_req[cur_gp_idx], 0);
1448 else if (mode_is_float(mode) && cur_fp_idx < maxnum_fpreg_args) {
1449 /* parameter got passed in floating point register*/
1450 irn = new_rd_ia32_RegParam(get_irn_dbg_info(proj), irg, block, proj, mode);
1451 set_ia32_pncode(irn, get_Proj_proj(projargs[i]));
1452 set_ia32_req_out(irn, current_fpreg_param_req[cur_fp_idx], 0);
1456 /* kill the old "Proj Arg" and replace with the new Arg */
1457 exchange(projargs[i], irn);
1459 if (cur_gp_idx >= maxnum_gpreg_args || cur_fp_idx >= maxnum_fpreg_args) {
1465 /* create all remaining stack parameters */
1466 for (i = stack_idx; i < n; i++) {
1467 mode = get_irn_mode(projargs[i]);
1469 if (mode_is_float(mode))
1470 irn = new_rd_ia32_fStackParam(get_irn_dbg_info(projargs[i]), irg, block, proj_M, mode);
1472 irn = new_rd_ia32_StackParam(get_irn_dbg_info(projargs[i]), irg, block, proj_M, mode);
1474 set_ia32_pncode(irn, get_Proj_proj(projargs[i]));
1476 /* kill the old "Proj Arg" and replace with the new stack param */
1477 exchange(projargs[i], irn);
1483 case pn_Start_P_frame_base:
1484 case pn_Start_X_initial_exec:
1486 case pn_Start_P_globals:
1487 case pn_Start_P_value_arg_base:
1490 assert(0 && "unsupported Proj(Start)");
1497 * Transform some Proj's (Proj_Proj, Proj_Start, Proj_Cmp, Proj_Cond, Proj_Call).
1498 * All others are ignored.
1500 * @param mod the debug module
1501 * @param block the block the new node should belong to
1502 * @param node the ir Proj node
1503 * @param mode mode of the Proj
1504 * @return The transformed node.
1506 static ir_node *gen_Proj(transform_env_t *env) {
1507 ir_node *new_node = NULL;
1508 ir_node *pred = get_Proj_pred(env->irn);
1510 if (env->mode == mode_M)
1513 if (get_irn_op(pred) == op_Start) {
1514 new_node = gen_Proj_Start(env, env->irn, pred);
1522 /*********************************************************
1525 * _ __ ___ __ _ _ _ __ __| |_ __ ___ _____ _ __
1526 * | '_ ` _ \ / _` | | '_ \ / _` | '__| \ \ / / _ \ '__|
1527 * | | | | | | (_| | | | | | | (_| | | | |\ V / __/ |
1528 * |_| |_| |_|\__,_|_|_| |_| \__,_|_| |_| \_/ \___|_|
1530 *********************************************************/
1535 * Transforms the given firm node (and maybe some other related nodes)
1536 * into one or more assembler nodes.
1538 * @param node the firm node
1539 * @param env the debug module
1541 void ia32_transform_node(ir_node *node, void *env) {
1542 ia32_code_gen_t *cgenv = (ia32_code_gen_t *)env;
1543 opcode code = get_irn_opcode(node);
1544 ir_node *asm_node = NULL;
1545 transform_env_t tenv;
1550 tenv.arch_env = cgenv->arch_env;
1551 tenv.block = get_nodes_block(node);
1552 tenv.dbg = get_irn_dbg_info(node);
1553 tenv.irg = current_ir_graph;
1555 tenv.mod = cgenv->mod;
1556 tenv.mode = get_irn_mode(node);
1558 #define UNOP(a) case iro_##a: asm_node = gen_##a(&tenv, get_##a##_op(node)); break
1559 #define BINOP(a) case iro_##a: asm_node = gen_##a(&tenv, get_##a##_left(node), get_##a##_right(node)); break
1560 #define BINOP_COM(a) case iro_##a: asm_node = gen_arith_Op(&tenv, get_##a##_left(node), get_##a##_right(node), 1); break
1561 #define BINOP_NCOM(a) case iro_##a: asm_node = gen_arith_Op(&tenv, get_##a##_left(node), get_##a##_right(node), 0); break
1562 #define GEN(a) case iro_##a: asm_node = gen_##a(&tenv); break
1563 #define IGN(a) case iro_##a: break
1564 #define BAD(a) case iro_##a: goto bad
1566 DBG((tenv.mod, LEVEL_1, "transforming node %s (%ld) ... ", get_irn_opname(node), get_irn_node_nr(node)));
1627 if (get_irn_op(node) == get_op_Max() ||
1628 get_irn_op(node) == get_op_Min() ||
1629 get_irn_op(node) == get_op_Mulh())
1631 asm_node = gen_arith_Op(&tenv, get_irn_n(node, 0), get_irn_n(node, 1), 1);
1635 fprintf(stderr, "Not implemented: %s\n", get_irn_opname(node));
1640 exchange(node, asm_node);
1641 DBG((tenv.mod, LEVEL_1, "created node %+F[%p]\n", asm_node, asm_node));
1644 DBG((tenv.mod, LEVEL_1, "ignored\n"));